KR20070052272A - 프로세서 자원의 가상화를 위한 시스템 및 방법 - Google Patents
프로세서 자원의 가상화를 위한 시스템 및 방법 Download PDFInfo
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- KR20070052272A KR20070052272A KR1020077002319A KR20077002319A KR20070052272A KR 20070052272 A KR20070052272 A KR 20070052272A KR 1020077002319 A KR1020077002319 A KR 1020077002319A KR 20077002319 A KR20077002319 A KR 20077002319A KR 20070052272 A KR20070052272 A KR 20070052272A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
Abstract
Description
Claims (10)
- 컴퓨터로 구현되는 방법에 있어서,제2 프로세서의 로컬 기억부에 위치된 데이터에 대응하는 데이터 요구를 제1 프로세서로부터 수신하는 단계와;데이터 요구에 대응하는 실제 어드레스를 식별하는 단계와;데이터를 상기 실제 어드레스에 대응하는 상기 제1 프로세서에 제공하는 단계를 포함하는 방법.
- 제1항에 있어서, 상기 실제 어드레스는 소프트 카피 영역에 대응하고, 소프트 카피 영역은 캐쉬, 커널(kernel) 및 디스크로 구성된 그룹으로부터 선택된 것인, 방법.
- 제1항에 있어서, 상기 데이터 요구는 유효 어드레스를 포함하고, 상기 방법은, 페이지 테이블 엔트리를 이용하여 유효 어드레스를 실제 어드레스로 변환하는 단계를 더 포함하며, 상기 페이지 테이블 엔트리는 페이지 테이블에 위치한 것인, 방법.
- 제1항에 있어서, 스레드 요구(thread request)를 수신하는 단계와;상기 제2 프로세서에 대응하는 프로세서 상태를 판정하는 단계와;상기 판정에 기초하여 상기 제2 프로세서의 로컬 기억부로부터의 데이터를 소프트 카피 영역에 카피하는 단계를 더 포함하는, 방법.
- 제1항에 있어서,하나 이상의 정책을 검색하는 단계와;하나 이상의 정책에 기초하여 데이터의 복원 여부를 결정하는 단계와;상기 결정에 응답하여 데이터를 복원하는 단계를 포함하고,상기 복원 단계는,소프트 카피 영역으로부터 데이터를 검색하는 단계와;상기 데이터를 로컬 기억부에 세이브하는 단계와;페이지 테이블 엔트리를 복원에 대응하게 변경하는 단계를 더 포함하는 것인, 방법.
- 제1항에 있어서, 로컬 기억부는 제2 프로세서에 위치하는 레지스터들에 대응하는 것인, 방법.
- 제1항에 있어서, 제1 프로세서는 처리 유닛이고, 제2 프로세서는 시너지스틱 프로세싱 유닛(synergistic processing unit)인 것인, 방법.
- 프로그램 제품에 있어서,컴퓨터에서 실행될 때 청구항 제1항 내지 제7항 중 어느 한 항의 단계들을 수행할 수 있는 컴퓨터 프로그램 코드를 가진 컴퓨터 동작가능 매체를 포함한 프로그램 제품.
- 정보 취급 시스템에 있어서,복수의 프로세서와;상기 복수의 프로세서에 의해 액세스가능한 하나 이상의 비휘발성 기억 장치와;상기 복수의 프로세서에 의해 액세스가능한 공유 메모리와;스레드에 데이터를 제공하기 위한 데이터 관리 도구를 포함하고,상기 데이터 관리 도구는, 청구항 제1항 내지 제7항 중 어느 한 항의 방법 단계들을 수행할 수 있는 소프트웨어 코드를 포함하는 것인, 정보 취급 시스템.
- 제9항에 있어서, 제1 프로세서와 제2 프로세서는 이종(heterogeneous)의 것인 정보 취급 시스템.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/955,093 US7290112B2 (en) | 2004-09-30 | 2004-09-30 | System and method for virtualization of processor resources |
US10/955,093 | 2004-09-30 |
Publications (2)
Publication Number | Publication Date |
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KR20070052272A true KR20070052272A (ko) | 2007-05-21 |
KR100968188B1 KR100968188B1 (ko) | 2010-07-06 |
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KR1020077002319A KR100968188B1 (ko) | 2004-09-30 | 2005-08-24 | 프로세서 자원의 가상화를 위한 시스템 및 방법 |
Country Status (10)
Country | Link |
---|---|
US (1) | US7290112B2 (ko) |
EP (1) | EP1805629B1 (ko) |
JP (1) | JP4639233B2 (ko) |
KR (1) | KR100968188B1 (ko) |
CN (1) | CN100421089C (ko) |
BR (1) | BRPI0515920B1 (ko) |
CA (1) | CA2577865C (ko) |
MX (1) | MX2007003679A (ko) |
TW (1) | TWI340900B (ko) |
WO (1) | WO2006034931A1 (ko) |
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Cited By (3)
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KR101031409B1 (ko) * | 2006-12-29 | 2011-04-26 | 인텔 코오퍼레이션 | 동적으로 가상 머신을 생성하기 위한 방법, 제조물품 및 시스템 |
US9015446B2 (en) | 2008-12-10 | 2015-04-21 | Nvidia Corporation | Chipset support for non-uniform memory access among heterogeneous processing units |
US9032101B1 (en) | 2008-12-10 | 2015-05-12 | Nvidia Corporation | Chipset support for binding and migrating hardware devices among heterogeneous processing units |
Also Published As
Publication number | Publication date |
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WO2006034931A1 (en) | 2006-04-06 |
CN100421089C (zh) | 2008-09-24 |
TW200630797A (en) | 2006-09-01 |
BRPI0515920B1 (pt) | 2018-03-20 |
BRPI0515920A2 (pt) | 2009-08-04 |
EP1805629B1 (en) | 2012-09-26 |
KR100968188B1 (ko) | 2010-07-06 |
TWI340900B (en) | 2011-04-21 |
JP4639233B2 (ja) | 2011-02-23 |
US7290112B2 (en) | 2007-10-30 |
MX2007003679A (es) | 2007-04-19 |
CA2577865C (en) | 2011-09-27 |
CN1989492A (zh) | 2007-06-27 |
JP2008515069A (ja) | 2008-05-08 |
CA2577865A1 (en) | 2006-04-06 |
US20060069878A1 (en) | 2006-03-30 |
EP1805629A1 (en) | 2007-07-11 |
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