BRPI0510683A - detecção de modo intercalador em um receptor de vìdeo digital - Google Patents

detecção de modo intercalador em um receptor de vìdeo digital

Info

Publication number
BRPI0510683A
BRPI0510683A BRPI0510683-4A BRPI0510683A BRPI0510683A BR PI0510683 A BRPI0510683 A BR PI0510683A BR PI0510683 A BRPI0510683 A BR PI0510683A BR PI0510683 A BRPI0510683 A BR PI0510683A
Authority
BR
Brazil
Prior art keywords
digital video
mode detection
video receiver
detected
frame synchronization
Prior art date
Application number
BRPI0510683-4A
Other languages
English (en)
Inventor
Ivonete Markman
Weixiao Liu
Original Assignee
Thomson Licensing
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing filed Critical Thomson Licensing
Publication of BRPI0510683A publication Critical patent/BRPI0510683A/pt

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/44—Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/85—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression
    • H04N19/89—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression involving methods or arrangements for detection of transmission errors at the decoder

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

DETECçãO DE MODO INTERCALADOR EM UM RECEPTOR DE VìDEO DIGITAL Um método e aparelho para decodificar dados digitais recebidos representando vídeo, áudio, informação ou uma combinação dos mesmos. Após um bloqueio de sincronização de quadro de correção de erro de envio (FEC) ser detectado (410), um contador é incrementado correspondendo ao número de palavras de controle idênticas (425) decodificadas a partir dos dados recebidos. Se o número de palavras de controle idênticas estiver acima de um valor limite, a palavra de controle é usada para operar o decodificador em um modo correspondendo à palavra de controle (435). Caso contrário, o sistema repete a operação de determinar se um bloqueio de sincronização de quadro FEC é detectado.
BRPI0510683-4A 2004-05-13 2005-01-24 detecção de modo intercalador em um receptor de vìdeo digital BRPI0510683A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US57060304P 2004-05-13 2004-05-13
PCT/US2005/002216 WO2005115010A1 (en) 2004-05-13 2005-01-24 Interleaver mode detection in a digital video receiver

Publications (1)

Publication Number Publication Date
BRPI0510683A true BRPI0510683A (pt) 2008-04-22

Family

ID=34960379

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0510683-4A BRPI0510683A (pt) 2004-05-13 2005-01-24 detecção de modo intercalador em um receptor de vìdeo digital

Country Status (6)

Country Link
US (1) US7849380B2 (pt)
EP (1) EP1763959B1 (pt)
JP (1) JP4719740B2 (pt)
CN (1) CN1954617B (pt)
BR (1) BRPI0510683A (pt)
WO (1) WO2005115010A1 (pt)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8179954B2 (en) * 2007-10-30 2012-05-15 Sony Corporation Odd interleaving only of an odd-even interleaver when half or less data subcarriers are active in a digital video broadcasting (DVB) standard
US20060140224A1 (en) * 2004-12-27 2006-06-29 William Yoshida Generating a half rate/quarter rate flag stream for enhanced VSB decoder
CA2691831A1 (en) * 2007-06-28 2008-12-31 Samsung Electronics Co., Ltd. Response to atsc mobile/handheld rfp a-vsb mcast and, a-vsb physical and link layers with single frequency network
CN102217266B (zh) * 2008-11-19 2014-05-07 Lg电子株式会社 用于发送和接收信号的装置以及用于发送和接收信号的方法
CN101989884B (zh) * 2009-08-05 2013-01-30 启＊科技股份有限公司 消息编成的方法
US9203757B2 (en) * 2012-03-22 2015-12-01 Texas Instruments Incorporated Network throughput using multiple reed-solomon blocks
JP5940966B2 (ja) * 2012-11-28 2016-06-29 日本電信電話株式会社 光伝送システム、光送信器、光受信器、光送信方法、光受信方法
US9479827B2 (en) * 2014-10-21 2016-10-25 Arris Enterprises, Inc. Channel scanning based upon interleaver depth
CA2970121C (en) * 2014-12-12 2022-05-31 Sony Corporation Transmitter and receiver using channel bundling

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5951637A (ja) * 1982-09-17 1984-03-26 Nec Corp フアクシミリ通信制御信号送出方法
JP2754012B2 (ja) * 1988-06-23 1998-05-20 キヤノン株式会社 ファクシミリ通信方法
JPH06162377A (ja) * 1992-11-20 1994-06-10 Hochiki Corp 無線防災装置
US5583562A (en) * 1993-12-03 1996-12-10 Scientific-Atlanta, Inc. System and method for transmitting a plurality of digital services including imaging services
JP2669320B2 (ja) * 1993-12-21 1997-10-27 日本電気株式会社 ディジタルトランクの動作モード設定システム
US5666170A (en) 1995-07-12 1997-09-09 Thomson Consumer Electronics, Inc. Apparatus for decoding video signals encoded in different formats
FI105961B (fi) 1998-12-14 2000-10-31 Nokia Networks Oy Vastaanottomenetelmä ja vastaanotin
JP4170489B2 (ja) 1999-01-05 2008-10-22 マスプロ電工株式会社 有線放送システム
EP1061746A1 (en) * 1999-06-14 2000-12-20 Sony International (Europe) GmbH Channel decoder for a digital broadcast receiver
JP4314733B2 (ja) * 2000-08-22 2009-08-19 沖電気工業株式会社 通信接続装置およびデータ出力制御方法
US7088398B1 (en) * 2001-12-24 2006-08-08 Silicon Image, Inc. Method and apparatus for regenerating a clock for auxiliary data transmitted over a serial link with video data
JP2003224545A (ja) * 2002-01-29 2003-08-08 Kobe Steel Ltd データ通信システム，データ通信プログラム

Also Published As

Publication number Publication date
EP1763959A1 (en) 2007-03-21
JP2007537658A (ja) 2007-12-20
US7849380B2 (en) 2010-12-07
EP1763959B1 (en) 2017-05-24
WO2005115010A1 (en) 2005-12-01
US20080034271A1 (en) 2008-02-07
CN1954617A (zh) 2007-04-25
CN1954617B (zh) 2011-04-13
JP4719740B2 (ja) 2011-07-06

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 5A E 6A ANUIDADE(S).

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE A 8.6 NA RPI 2099 DE 29/03/2011.

B15K Others concerning applications: alteration of classification

Ipc: H04N 19/44 (2014.01), H04N 19/89 (2014.01)