BR9005264A - Processos para traducao do endereco virtual de um operando em uma instrucao nao-privilegiada e de execucao de instrucoes,tais como a instrucao para controlar a copia de uma pagina de dados em,ou entre,meios multiplos e processo de execucao de programas que englobem as atividades mencionadas - Google Patents

Processos para traducao do endereco virtual de um operando em uma instrucao nao-privilegiada e de execucao de instrucoes,tais como a instrucao para controlar a copia de uma pagina de dados em,ou entre,meios multiplos e processo de execucao de programas que englobem as atividades mencionadas

Info

Publication number
BR9005264A
BR9005264A BR909005264A BR9005264A BR9005264A BR 9005264 A BR9005264 A BR 9005264A BR 909005264 A BR909005264 A BR 909005264A BR 9005264 A BR9005264 A BR 9005264A BR 9005264 A BR9005264 A BR 9005264A
Authority
BR
Brazil
Prior art keywords
instruction
programs
media
page
privileged
Prior art date
Application number
BR909005264A
Other languages
English (en)
Inventor
Geoffrey O Blandy
David B Emmes
Ronald F Hill
David B Lindquist
Kenneth E Plambeck
Casper A Scalzi
Richard John Schmalz
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR9005264A publication Critical patent/BR9005264A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/145—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Magnetic Resonance Imaging Apparatus (AREA)
  • Nitrogen Condensed Heterocyclic Rings (AREA)
  • Communication Control (AREA)
  • Storage Device Security (AREA)
  • Medicines That Contain Protein Lipid Enzymes And Other Medicines (AREA)
  • Debugging And Monitoring (AREA)
  • Medicines Containing Plant Substances (AREA)
  • Devices For Executing Special Programs (AREA)
BR909005264A 1989-10-20 1990-10-18 Processos para traducao do endereco virtual de um operando em uma instrucao nao-privilegiada e de execucao de instrucoes,tais como a instrucao para controlar a copia de uma pagina de dados em,ou entre,meios multiplos e processo de execucao de programas que englobem as atividades mencionadas BR9005264A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/424,797 US5237668A (en) 1989-10-20 1989-10-20 Process using virtual addressing in a non-privileged instruction to control the copying of a page of data in or between multiple media

Publications (1)

Publication Number Publication Date
BR9005264A true BR9005264A (pt) 1991-09-17

Family

ID=23683911

Family Applications (1)

Application Number Title Priority Date Filing Date
BR909005264A BR9005264A (pt) 1989-10-20 1990-10-18 Processos para traducao do endereco virtual de um operando em uma instrucao nao-privilegiada e de execucao de instrucoes,tais como a instrucao para controlar a copia de uma pagina de dados em,ou entre,meios multiplos e processo de execucao de programas que englobem as atividades mencionadas

Country Status (7)

Country Link
US (1) US5237668A (pt)
EP (1) EP0423453B1 (pt)
JP (1) JPH03137747A (pt)
AT (1) ATE146886T1 (pt)
BR (1) BR9005264A (pt)
CA (1) CA2024444C (pt)
DE (1) DE69029504T2 (pt)

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US5842225A (en) * 1995-02-27 1998-11-24 Sun Microsystems, Inc. Method and apparatus for implementing non-faulting load instruction
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US5900019A (en) * 1996-05-23 1999-05-04 International Business Machines Corporation Apparatus for protecting memory storage blocks from I/O accesses
US5802397A (en) * 1996-05-23 1998-09-01 International Business Machines Corporation System for storage protection from unintended I/O access using I/O protection key by providing no control by I/O key entries over access by CP entity
US5787309A (en) * 1996-05-23 1998-07-28 International Business Machines Corporation Apparatus for protecting storage blocks from being accessed by unwanted I/O programs using I/O program keys and I/O storage keys having M number of bits
US5860144A (en) * 1996-08-09 1999-01-12 Oracle Corporation Addressing method and system for providing access of a very large size physical memory buffer to a number of processes
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US6516342B1 (en) 1998-07-17 2003-02-04 International Business Machines Corporation Method and apparatus for extending memory using a memory server
JP2001167040A (ja) * 1999-12-14 2001-06-22 Hitachi Ltd 記憶サブシステム及び記憶制御装置
US6684209B1 (en) * 2000-01-14 2004-01-27 Hitachi, Ltd. Security method and system for storage subsystem
JP4651230B2 (ja) * 2001-07-13 2011-03-16 株式会社日立製作所 記憶システム及び論理ユニットへのアクセス制御方法
US7657727B2 (en) * 2000-01-14 2010-02-02 Hitachi, Ltd. Security for logical unit in storage subsystem
JP4719957B2 (ja) * 2000-05-24 2011-07-06 株式会社日立製作所 記憶制御装置及び記憶システム並びに記憶システムのセキュリティ設定方法
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US20060253682A1 (en) * 2005-05-05 2006-11-09 International Business Machines Corporation Managing computer memory in a computing environment with dynamic logical partitioning
US7506132B2 (en) * 2005-12-22 2009-03-17 International Business Machines Corporation Validity of address ranges used in semi-synchronous memory copy operations
US7454585B2 (en) * 2005-12-22 2008-11-18 International Business Machines Corporation Efficient and flexible memory copy operation
JP2008077144A (ja) * 2006-09-19 2008-04-03 Ricoh Co Ltd 仮想化システム、メモリ管理方法及び制御プログラム
US8417916B2 (en) * 2008-01-11 2013-04-09 International Business Machines Corporation Perform frame management function instruction for setting storage keys and clearing blocks of main storage
US8335906B2 (en) 2008-01-11 2012-12-18 International Business Machines Corporation Perform frame management function instruction for clearing blocks of main storage
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US11151267B2 (en) * 2019-02-25 2021-10-19 International Business Machines Corporation Move data and set storage key based on key function control
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Also Published As

Publication number Publication date
JPH0531179B2 (pt) 1993-05-11
JPH03137747A (ja) 1991-06-12
CA2024444A1 (en) 1991-04-21
US5237668A (en) 1993-08-17
EP0423453A3 (en) 1992-04-29
DE69029504T2 (de) 1997-07-17
CA2024444C (en) 1995-08-15
DE69029504D1 (de) 1997-02-06
EP0423453A2 (en) 1991-04-24
ATE146886T1 (de) 1997-01-15
EP0423453B1 (en) 1996-12-27

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