BR8802439A - Sistema de memoria cache - Google Patents

Sistema de memoria cache

Info

Publication number
BR8802439A
BR8802439A BR8802439A BR8802439A BR8802439A BR 8802439 A BR8802439 A BR 8802439A BR 8802439 A BR8802439 A BR 8802439A BR 8802439 A BR8802439 A BR 8802439A BR 8802439 A BR8802439 A BR 8802439A
Authority
BR
Brazil
Prior art keywords
cache memory
memory system
cache
memory
Prior art date
Application number
BR8802439A
Other languages
English (en)
Inventor
Kazue Yamaguchi
Hideki Osone
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of BR8802439A publication Critical patent/BR8802439A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0855—Overlapped cache accessing, e.g. pipeline
    • G06F12/0859—Overlapped cache accessing, e.g. pipeline with reload from main memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
BR8802439A 1987-05-18 1988-05-18 Sistema de memoria cache BR8802439A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62120602A JPS63284648A (ja) 1987-05-18 1987-05-18 キャッシュメモリ制御方法

Publications (1)

Publication Number Publication Date
BR8802439A true BR8802439A (pt) 1988-12-13

Family

ID=14790317

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8802439A BR8802439A (pt) 1987-05-18 1988-05-18 Sistema de memoria cache

Country Status (6)

Country Link
EP (1) EP0292188B1 (pt)
JP (1) JPS63284648A (pt)
AU (1) AU587935B2 (pt)
BR (1) BR8802439A (pt)
DE (1) DE3850608T2 (pt)
ES (1) ES2056926T3 (pt)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE200357T1 (de) * 1991-07-08 2001-04-15 Seiko Epson Corp Risc-prozessor mit dehnbarer architektur
US5778434A (en) * 1995-06-07 1998-07-07 Seiko Epson Corporation System and method for processing multiple requests and out of order returns
JP3071752B2 (ja) 1998-03-24 2000-07-31 三菱電機株式会社 ブリッジ方法、バスブリッジ及びマルチプロセッサシステム
CN1168025C (zh) * 1999-03-10 2004-09-22 国际商业机器公司 用于多线程处理机的指令高速缓存器
JP4504132B2 (ja) * 2004-07-30 2010-07-14 富士通株式会社 記憶制御装置、中央処理装置、情報処理装置及び記憶制御装置の制御方法
US8555001B2 (en) 2008-08-25 2013-10-08 Nec Corporation Cache memory, including miss status/information and a method using the same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3015013A1 (de) * 1980-04-18 1981-10-22 Grünzweig + Hartmann und Glasfaser AG, 6700 Ludwigshafen Waermedaemmantel fuer einen rohrbogen
JPS588366A (ja) * 1981-07-09 1983-01-18 Toshiba Corp メモリモジユ−ルシステム
US4551799A (en) * 1983-02-28 1985-11-05 Honeywell Information Systems Inc. Verification of real page numbers of stack stored prefetched instructions from instruction cache
JPS615357A (ja) * 1984-06-07 1986-01-11 Fujitsu Ltd デ−タ処理装置

Also Published As

Publication number Publication date
DE3850608T2 (de) 1994-11-24
EP0292188A2 (en) 1988-11-23
AU1588388A (en) 1988-12-15
DE3850608D1 (de) 1994-08-18
EP0292188B1 (en) 1994-07-13
AU587935B2 (en) 1989-08-31
EP0292188A3 (en) 1990-09-26
ES2056926T3 (es) 1994-10-16
JPH0516061B2 (pt) 1993-03-03
JPS63284648A (ja) 1988-11-21

Similar Documents

Publication Publication Date Title
BR8707625A (pt) Sistema de tele-enlace
BR8606258A (pt) Sistema de memoria
BR8800020A (pt) Sistema de refrigeracao
BR8806104A (pt) Sistema de aquecimento de pocos
BR8704061A (pt) Sistema
BR8902393A (pt) Sistema de microcomputador
PT84603B (pt) Sistema de armazenamento
DE3851555D1 (de) Funkrufsystem.
BR8406290A (pt) Sistema de memoria intermediaria
PT89099A (pt) Sistema de antenas distribuidas
IT8848001A0 (it) Sistema radar
ES2018577B3 (es) Sistema de almacenamiento.
PT87599A (pt) Sistema de manipulacao de cinzas secas
BR8802439A (pt) Sistema de memoria cache
BR8805685A (pt) Sistema de video
ES2022061A4 (es) Sistema de apoyo
BR8801278A (pt) Sistema de microcomputador
BR8903477A (pt) Sistema de suspensao
DE3887862T2 (de) Cache-Speichervorrichtung.
IT1233058B (it) Sistema di sospensione
BR8707662A (pt) Sistema de leitura
BR8506010A (pt) Sistema multiprocessador
BR8705895A (pt) Sistema undercarpet
BR8704719A (pt) Sistema hidro-vacuo
BR8504581A (pt) Sistema de suporte

Legal Events

Date Code Title Description
FB36 Technical and formal requirements: requirement - article 36 of industrial property law
FF Decision: granting
FG9A Patent or certificate of addition granted
B21A Extinguishment of a patent or of a certificate of addition of invention: extinguishment - article 78, item i of industrial property law

Free format text: PATENTE EXTINTA EM 29/06/2009