BR8800696A - Conexao entre o processador e o processador de instrucao especial em um sistema de processamento de dados digital - Google Patents

Conexao entre o processador e o processador de instrucao especial em um sistema de processamento de dados digital

Info

Publication number
BR8800696A
BR8800696A BR8800696A BR8800696A BR8800696A BR 8800696 A BR8800696 A BR 8800696A BR 8800696 A BR8800696 A BR 8800696A BR 8800696 A BR8800696 A BR 8800696A BR 8800696 A BR8800696 A BR 8800696A
Authority
BR
Brazil
Prior art keywords
processor
connection
data processing
processing system
digital data
Prior art date
Application number
BR8800696A
Other languages
English (en)
Inventor
Paul I Rubinfeld
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of BR8800696A publication Critical patent/BR8800696A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
BR8800696A 1987-02-24 1988-02-12 Conexao entre o processador e o processador de instrucao especial em um sistema de processamento de dados digital BR8800696A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US1751787A 1987-02-24 1987-02-24

Publications (1)

Publication Number Publication Date
BR8800696A true BR8800696A (pt) 1988-10-04

Family

ID=21783031

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8800696A BR8800696A (pt) 1987-02-24 1988-02-12 Conexao entre o processador e o processador de instrucao especial em um sistema de processamento de dados digital

Country Status (9)

Country Link
EP (1) EP0280821A3 (pt)
JP (1) JPS63208151A (pt)
KR (1) KR920004401B1 (pt)
CN (1) CN1019152B (pt)
AU (1) AU606083B2 (pt)
BR (1) BR8800696A (pt)
CA (1) CA1295749C (pt)
IN (1) IN171198B (pt)
MX (1) MX160485A (pt)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR890007159A (ko) * 1987-10-30 1989-06-19 미다 가쓰시게 데이타 처리장치 및 그것을 갖는 데이타 처리 시스템
US4982428A (en) * 1988-12-29 1991-01-01 At&T Bell Laboratories Arrangement for canceling interference in transmission systems
FR2649982B1 (fr) * 1989-07-20 1991-09-27 Inst Nat Sante Rech Med Membrane biologique artificielle
JP2884831B2 (ja) * 1991-07-03 1999-04-19 株式会社日立製作所 処理装置
US6505290B1 (en) 1997-09-05 2003-01-07 Motorola, Inc. Method and apparatus for interfacing a processor to a coprocessor
ATE463786T1 (de) * 2004-07-09 2010-04-15 Michael Colin George Chapman Hochleistungsfähiger benutzer-konfigurierbarer prozessor
CN104424033B (zh) * 2013-09-02 2018-10-12 联想(北京)有限公司 一种电子设备及数据处理方法
CN108268281B (zh) * 2017-01-04 2021-12-07 中科创达软件股份有限公司 处理器协同方法及电路

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4509116A (en) * 1982-04-21 1985-04-02 Digital Equipment Corporation Special instruction processing unit for data processing system
JPS62243531A (ja) * 1986-04-17 1987-10-24 松下精工株式会社 食器乾燥機

Also Published As

Publication number Publication date
AU606083B2 (en) 1991-01-31
KR920004401B1 (ko) 1992-06-04
CN87107291A (zh) 1988-09-07
MX160485A (es) 1990-03-12
IN171198B (pt) 1992-08-15
AU8003687A (en) 1988-08-25
EP0280821A2 (en) 1988-09-07
CA1295749C (en) 1992-02-11
KR880010364A (ko) 1988-10-08
CN1019152B (zh) 1992-11-18
EP0280821A3 (en) 1990-11-07
JPS63208151A (ja) 1988-08-29

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Legal Events

Date Code Title Description
FD3 Appl. lapsed due to non-payment of renewal fee