BR8707011A - Aparelho tendo uma pluralidade de processadores e processo para a locacao de memoria a um processo num sistema que tem uma pluralidade de processadores - Google Patents

Aparelho tendo uma pluralidade de processadores e processo para a locacao de memoria a um processo num sistema que tem uma pluralidade de processadores

Info

Publication number
BR8707011A
BR8707011A BR8707011A BR8707011A BR8707011A BR 8707011 A BR8707011 A BR 8707011A BR 8707011 A BR8707011 A BR 8707011A BR 8707011 A BR8707011 A BR 8707011A BR 8707011 A BR8707011 A BR 8707011A
Authority
BR
Brazil
Prior art keywords
processor
appliance
processor plurality
memory location
memory
Prior art date
Application number
BR8707011A
Other languages
English (en)
Inventor
Thomas Patrick Bischop
Mark Henry Davis
Robert Wayne Fish
James Stuart Peterson
Grover Timothy Surratt
Original Assignee
American Telephone & Telegraph
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone & Telegraph filed Critical American Telephone & Telegraph
Publication of BR8707011A publication Critical patent/BR8707011A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
BR8707011A 1986-12-22 1987-12-21 Aparelho tendo uma pluralidade de processadores e processo para a locacao de memoria a um processo num sistema que tem uma pluralidade de processadores BR8707011A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/941,703 US4811216A (en) 1986-12-22 1986-12-22 Multiprocessor memory management method

Publications (1)

Publication Number Publication Date
BR8707011A true BR8707011A (pt) 1988-08-09

Family

ID=25476930

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8707011A BR8707011A (pt) 1986-12-22 1987-12-21 Aparelho tendo uma pluralidade de processadores e processo para a locacao de memoria a um processo num sistema que tem uma pluralidade de processadores

Country Status (8)

Country Link
US (1) US4811216A (pt)
EP (1) EP0273612B1 (pt)
JP (1) JPS63239551A (pt)
KR (1) KR970001901B1 (pt)
BR (1) BR8707011A (pt)
CA (1) CA1297199C (pt)
DE (1) DE3751446T2 (pt)
HK (1) HK103796A (pt)

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US5327570A (en) * 1991-07-22 1994-07-05 International Business Machines Corporation Multiprocessor system having local write cache within each data processor node
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US6058460A (en) * 1996-06-28 2000-05-02 Sun Microsystems, Inc. Memory allocation in a multithreaded environment
US5813042A (en) * 1997-02-19 1998-09-22 International Business Machines Corp. Methods and systems for control of memory
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Also Published As

Publication number Publication date
EP0273612A3 (en) 1991-05-29
KR970001901B1 (ko) 1997-02-18
DE3751446T2 (de) 1996-02-15
CA1297199C (en) 1992-03-10
JPS63239551A (ja) 1988-10-05
DE3751446D1 (de) 1995-09-14
JPH0551942B2 (pt) 1993-08-04
EP0273612A2 (en) 1988-07-06
EP0273612B1 (en) 1995-08-09
HK103796A (en) 1996-06-21
KR880008187A (ko) 1988-08-30
US4811216A (en) 1989-03-07

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