BR8605249A - Metodo para fazer aberturas submicrometricas de mascara empregando tecnicas de paredes laterais e desprendimento - Google Patents
Metodo para fazer aberturas submicrometricas de mascara empregando tecnicas de paredes laterais e desprendimentoInfo
- Publication number
- BR8605249A BR8605249A BR8605249A BR8605249A BR8605249A BR 8605249 A BR8605249 A BR 8605249A BR 8605249 A BR8605249 A BR 8605249A BR 8605249 A BR8605249 A BR 8605249A BR 8605249 A BR8605249 A BR 8605249A
- Authority
- BR
- Brazil
- Prior art keywords
- submichrometric
- mask
- openings
- making
- side wall
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0331—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers for lift-off processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/945—Special, e.g. metal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/947—Subphotolithographic processing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/951—Lift-off
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/799,053 US4654119A (en) | 1985-11-18 | 1985-11-18 | Method for making submicron mask openings using sidewall and lift-off techniques |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BR8605249A true BR8605249A (pt) | 1987-07-28 |
Family
ID=25174932
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR8605249A BR8605249A (pt) | 1985-11-18 | 1986-10-28 | Metodo para fazer aberturas submicrometricas de mascara empregando tecnicas de paredes laterais e desprendimento |
Country Status (8)
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4842633A (en) * | 1987-08-25 | 1989-06-27 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing molds for molding optical glass elements and diffraction gratings |
| DE3888184D1 (de) * | 1988-11-17 | 1994-04-07 | Ibm | Verfahren zur Herstellung von Masken mit Strukturen im Submikrometerbereich. |
| US5858256A (en) * | 1996-07-11 | 1999-01-12 | The Board Of Trustees Of The Leland Stanford, Jr. University | Method of forming small aperture |
| US5956583A (en) * | 1997-06-30 | 1999-09-21 | Fuller; Robert T. | Method for forming complementary wells and self-aligned trench with a single mask |
| US20060191863A1 (en) * | 2005-02-25 | 2006-08-31 | Benjamin Szu-Min Lin | Method for fabricating etch mask and patterning process using the same |
| JP4589983B2 (ja) * | 2007-06-07 | 2010-12-01 | 東京エレクトロン株式会社 | 微細パターンの形成方法 |
| JP2009094125A (ja) * | 2007-10-04 | 2009-04-30 | Elpida Memory Inc | 半導体装置の製造方法 |
| JP2013004669A (ja) * | 2011-06-15 | 2013-01-07 | Toshiba Corp | パターン形成方法、電子デバイスの製造方法及び電子デバイス |
| CN105226002B (zh) * | 2014-07-04 | 2019-05-21 | 北大方正集团有限公司 | 自对准沟槽型功率器件及其制造方法 |
| US11056722B2 (en) | 2018-02-08 | 2021-07-06 | International Business Machines Corporation | Tool and method of fabricating a self-aligned solid state thin film battery |
| US10720670B2 (en) | 2018-02-08 | 2020-07-21 | International Business Machines Corporation | Self-aligned 3D solid state thin film battery |
| US10679853B2 (en) | 2018-02-08 | 2020-06-09 | International Business Machines Corporation | Self-aligned, over etched hard mask fabrication method and structure |
| JP2024119252A (ja) * | 2023-02-22 | 2024-09-03 | 東京エレクトロン株式会社 | 基板処理方法、基板処理システム及び保護膜 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3982943A (en) * | 1974-03-05 | 1976-09-28 | Ibm Corporation | Lift-off method of fabricating thin films and a structure utilizable as a lift-off mask |
| US4209349A (en) * | 1978-11-03 | 1980-06-24 | International Business Machines Corporation | Method for forming a narrow dimensioned mask opening on a silicon body utilizing reactive ion etching |
| US4274909A (en) * | 1980-03-17 | 1981-06-23 | International Business Machines Corporation | Method for forming ultra fine deep dielectric isolation |
| JPS57130431A (en) * | 1981-02-06 | 1982-08-12 | Fujitsu Ltd | Manufacture of semiconductor device |
| US4387145A (en) * | 1981-09-28 | 1983-06-07 | Fairchild Camera & Instrument Corp. | Lift-off shadow mask |
| US4430791A (en) * | 1981-12-30 | 1984-02-14 | International Business Machines Corporation | Sub-micrometer channel length field effect transistor process |
| JPS5870534A (ja) * | 1982-09-27 | 1983-04-27 | フエアチアイルド・カメラ・アンド・インストルメント・コ−ポレ−シヨン | リフトオフ・シヤドウマスクの形成方法 |
| DE3242113A1 (de) * | 1982-11-13 | 1984-05-24 | Ibm Deutschland Gmbh, 7000 Stuttgart | Verfahren zur herstellung einer duennen dielektrischen isolation in einem siliciumhalbleiterkoerper |
| US4572765A (en) * | 1983-05-02 | 1986-02-25 | Fairchild Camera & Instrument Corporation | Method of fabricating integrated circuit structures using replica patterning |
| KR890003903B1 (ko) * | 1983-06-29 | 1989-10-10 | 가부시끼가이샤 히다찌세이사꾸쇼 | 패턴 형성 방법 |
| US4575924A (en) * | 1984-07-02 | 1986-03-18 | Texas Instruments Incorporated | Process for fabricating quantum-well devices utilizing etch and refill techniques |
-
1985
- 1985-11-18 US US06/799,053 patent/US4654119A/en not_active Expired - Fee Related
-
1986
- 1986-05-22 CA CA000509770A patent/CA1227456A/en not_active Expired
- 1986-06-13 AU AU58846/86A patent/AU576086B2/en not_active Ceased
- 1986-10-03 EP EP86113666A patent/EP0223032A3/en not_active Ceased
- 1986-10-15 JP JP61243327A patent/JPS62126637A/ja active Granted
- 1986-10-28 BR BR8605249A patent/BR8605249A/pt not_active IP Right Cessation
- 1986-11-14 CN CN86107855A patent/CN86107855B/zh not_active Expired
- 1986-12-03 IN IN937/MAS/86A patent/IN168426B/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| IN168426B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1991-03-30 |
| CN86107855B (zh) | 1988-06-29 |
| US4654119A (en) | 1987-03-31 |
| EP0223032A2 (en) | 1987-05-27 |
| EP0223032A3 (en) | 1990-06-27 |
| JPS62126637A (ja) | 1987-06-08 |
| AU576086B2 (en) | 1988-08-11 |
| CN86107855A (zh) | 1987-08-19 |
| AU5884686A (en) | 1987-05-21 |
| CA1227456A (en) | 1987-09-29 |
| JPH0543287B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1993-07-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| B21A | Patent or certificate of addition expired [chapter 21.1 patent gazette] |
Free format text: PATENTE EXTINTA EM 28/10/2001 |
|
| B15K | Others concerning applications: alteration of classification |
Ipc: H01L 21/033 (2006.01) |