BR7406237D0 - Processo de fabricacao de um dispositivo de circuito integrado - Google Patents

Processo de fabricacao de um dispositivo de circuito integrado

Info

Publication number
BR7406237D0
BR7406237D0 BR6237/74A BR623774A BR7406237D0 BR 7406237 D0 BR7406237 D0 BR 7406237D0 BR 6237/74 A BR6237/74 A BR 6237/74A BR 623774 A BR623774 A BR 623774A BR 7406237 D0 BR7406237 D0 BR 7406237D0
Authority
BR
Brazil
Prior art keywords
manufacturing
integrated circuit
circuit device
integrated
circuit
Prior art date
Application number
BR6237/74A
Other languages
English (en)
Inventor
A Dingwall
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of BR7406237D0 publication Critical patent/BR7406237D0/pt

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823878Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/043Dual dielectric
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/053Field effect transistors fets
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/106Masks, special
BR6237/74A 1973-08-06 1974-07-30 Processo de fabricacao de um dispositivo de circuito integrado BR7406237D0 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US385668A US3888706A (en) 1973-08-06 1973-08-06 Method of making a compact guard-banded mos integrated circuit device using framelike diffusion-masking structure

Publications (1)

Publication Number Publication Date
BR7406237D0 true BR7406237D0 (pt) 1975-05-27

Family

ID=23522375

Family Applications (1)

Application Number Title Priority Date Filing Date
BR6237/74A BR7406237D0 (pt) 1973-08-06 1974-07-30 Processo de fabricacao de um dispositivo de circuito integrado

Country Status (11)

Country Link
US (1) US3888706A (pt)
JP (1) JPS5223231B2 (pt)
BE (1) BE818546A (pt)
BR (1) BR7406237D0 (pt)
CA (1) CA1012657A (pt)
DE (1) DE2436486A1 (pt)
FR (1) FR2240527B1 (pt)
GB (1) GB1471355A (pt)
IT (1) IT1015393B (pt)
NL (1) NL7410215A (pt)
SE (1) SE393221B (pt)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5286083A (en) * 1976-01-12 1977-07-16 Hitachi Ltd Production of complimentary isolation gate field effect transistor
US4135955A (en) * 1977-09-21 1979-01-23 Harris Corporation Process for fabricating high voltage cmos with self-aligned guard rings utilizing selective diffusion and local oxidation
US4950618A (en) * 1989-04-14 1990-08-21 Texas Instruments, Incorporated Masking scheme for silicon dioxide mesa formation
JP2920546B2 (ja) * 1989-12-06 1999-07-19 セイコーインスツルメンツ株式会社 同極ゲートmisトランジスタの製造方法
EP0505877A2 (en) * 1991-03-27 1992-09-30 Seiko Instruments Inc. Impurity doping method with adsorbed diffusion source
US5356664A (en) * 1992-09-15 1994-10-18 Minnesota Mining And Manufacturing Company Method of inhibiting algae growth on asphalt shingles
US7541247B2 (en) * 2007-07-16 2009-06-02 International Business Machines Corporation Guard ring structures for high voltage CMOS/low voltage CMOS technology using LDMOS (lateral double-diffused metal oxide semiconductor) device fabrication

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3475234A (en) * 1967-03-27 1969-10-28 Bell Telephone Labor Inc Method for making mis structures
US3576478A (en) * 1969-07-22 1971-04-27 Philco Ford Corp Igfet comprising n-type silicon substrate, silicon oxide gate insulator and p-type polycrystalline silicon gate electrode
US3646665A (en) * 1970-05-22 1972-03-07 Gen Electric Complementary mis-fet devices and method of fabrication
US3730787A (en) * 1970-08-26 1973-05-01 Bell Telephone Labor Inc Method of fabricating semiconductor integrated circuits using deposited doped oxides as a source of dopant impurities
US3673471A (en) * 1970-10-08 1972-06-27 Fairchild Camera Instr Co Doped semiconductor electrodes for mos type devices
NL173110C (nl) * 1971-03-17 1983-12-01 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht.

Also Published As

Publication number Publication date
FR2240527B1 (pt) 1978-11-24
DE2436486A1 (de) 1975-02-20
IT1015393B (it) 1977-05-10
JPS5223231B2 (pt) 1977-06-22
AU7192274A (en) 1976-02-05
US3888706A (en) 1975-06-10
NL7410215A (nl) 1975-02-10
GB1471355A (en) 1977-04-27
SE7410035L (pt) 1975-02-07
JPS5046082A (pt) 1975-04-24
CA1012657A (en) 1977-06-21
FR2240527A1 (pt) 1975-03-07
BE818546A (fr) 1974-12-02
SE393221B (sv) 1977-05-02

Similar Documents

Publication Publication Date Title
IT1007147B (it) Circuito integrato
IT1072608B (it) Processo per la fabbricazione di dispositivi semiconduttori
FR2278208A1 (fr) Circuit integre
AR204224A1 (es) Circuito integrado
IT958927B (it) Circuito integrato
BE788874A (fr) Module de circuit integre
IT1021265B (it) Circuito integrato
DE2559729A1 (de) Integrierte schaltung
SE7600217L (sv) Anordning for framstellning av termoplastror
IT1012351B (it) Circuito integrato semiconduttore
IT1022974B (it) Processo perfezionato per la fabbricazione di dispositivi semiconduttori
IT1065020B (it) Circuito integrato
IT1067765B (it) Circuito integrato
SE402839B (sv) Halvledaranordning och forfarande for dess framstellning
SE7602370L (sv) Optoelektronisk kretselement
BR7406237D0 (pt) Processo de fabricacao de um dispositivo de circuito integrado
BR7405237D0 (pt) Processo de preparacao da o odietilditiofosforilmetil-3 clro-6 benzoxazolona (fosalona)
SE7412165L (sv) Integrerad krets
SE392365B (sv) Elektronmikroskop med en ringformig blendare
BR7409999A (pt) Processo de obtencao de poli-n-aiquil-iminoalanos
SE406990B (sv) Integrerad kretsanordning
BR7310179D0 (pt) Processo de fabricacao de compostos halogenofenolsulfonicos
IT1123671B (it) Processo per la fabbricazione di dispositivi semiconduttori
BR7406383D0 (pt) Processo de revelacao fotografica
IT1070023B (it) Processo di fabbricazione di transistori complementari