BR112017006167A2 - estrutura de liberação de ligação de sistema microeletromecânico (mems) e método de transferência de wafer para integração de circuito integrado tridimensional (ci em 3d) - Google Patents
estrutura de liberação de ligação de sistema microeletromecânico (mems) e método de transferência de wafer para integração de circuito integrado tridimensional (ci em 3d)Info
- Publication number
- BR112017006167A2 BR112017006167A2 BR112017006167A BR112017006167A BR112017006167A2 BR 112017006167 A2 BR112017006167 A2 BR 112017006167A2 BR 112017006167 A BR112017006167 A BR 112017006167A BR 112017006167 A BR112017006167 A BR 112017006167A BR 112017006167 A2 BR112017006167 A2 BR 112017006167A2
- Authority
- BR
- Brazil
- Prior art keywords
- mems
- integrated circuit
- microelectromechanical system
- release structure
- transfer method
- Prior art date
Links
- 230000010354 integration Effects 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
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- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8221—Three dimensional integrated circuits stacked in different levels
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
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- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
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- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
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- H01L2225/06503—Stacked arrangements of devices
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- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Geometry (AREA)
- Micromachines (AREA)
- Pressure Sensors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
a presente invenção refere-se a uma estrutura de liberação de ligação de sistema microeletromecânico (mems) para fabricar dispositivos de um circuito integrado tridimensional (ci em 3d) com dois ou mais níveis. a estrutura de liberação de ligação de mems inclui uma camada de liberação sacrificial de mems que pode ter uma estrutura de pilar ou coluna, ou, alternativamente, uma camada sacrificial contínua para ligação e liberação.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/498,965 US9922956B2 (en) | 2014-09-26 | 2014-09-26 | Microelectromechanical system (MEMS) bond release structure and method of wafer transfer for three-dimensional integrated circuit (3D IC) integration |
PCT/US2015/048930 WO2016048649A1 (en) | 2014-09-26 | 2015-09-08 | Microelectromechanical system (mems) bond release structure and method of wafer transfer for three-dimensional integrated circuit (3d ic) integration |
Publications (1)
Publication Number | Publication Date |
---|---|
BR112017006167A2 true BR112017006167A2 (pt) | 2018-04-10 |
Family
ID=54186292
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112017006167A BR112017006167A2 (pt) | 2014-09-26 | 2015-09-08 | estrutura de liberação de ligação de sistema microeletromecânico (mems) e método de transferência de wafer para integração de circuito integrado tridimensional (ci em 3d) |
Country Status (10)
Country | Link |
---|---|
US (1) | US9922956B2 (pt) |
EP (1) | EP3198634A1 (pt) |
JP (1) | JP2017536248A (pt) |
KR (1) | KR20170066354A (pt) |
CN (1) | CN106688077A (pt) |
BR (1) | BR112017006167A2 (pt) |
HK (1) | HK1232339A1 (pt) |
SG (1) | SG11201700918RA (pt) |
TW (1) | TWI585820B (pt) |
WO (1) | WO2016048649A1 (pt) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3007224A1 (en) * | 2014-10-08 | 2016-04-13 | Nxp B.V. | Metallisation for semiconductor device |
US10049915B2 (en) * | 2015-01-09 | 2018-08-14 | Silicon Genesis Corporation | Three dimensional integrated circuit |
JP6784969B2 (ja) * | 2015-10-22 | 2020-11-18 | 天馬微電子有限公司 | 薄膜デバイスとその製造方法 |
FR3053159B1 (fr) * | 2016-06-23 | 2019-05-10 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de fabrication d'une structure de transistors comportant une etape de bouchage |
US10438838B2 (en) * | 2016-09-01 | 2019-10-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure and related method |
US10714446B2 (en) | 2017-03-30 | 2020-07-14 | Intel Corporation | Apparatus with multi-wafer based device comprising embedded active and/or passive devices and method for forming such |
US11211328B2 (en) * | 2017-10-16 | 2021-12-28 | SK Hynix Inc. | Semiconductor memory device of three-dimensional structure |
DE102019102323A1 (de) * | 2018-02-02 | 2019-08-08 | Infineon Technologies Ag | Waferverbund und Verfahren zur Herstellung von Halbleiterbauteilen |
US20190371681A1 (en) * | 2018-06-01 | 2019-12-05 | Synaptics Incorporated | Stacked wafer integrated circuit |
US10504873B1 (en) * | 2018-06-25 | 2019-12-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | 3DIC structure with protective structure and method of fabricating the same and package |
US10734285B2 (en) * | 2018-06-28 | 2020-08-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | Bonding support structure (and related process) for wafer stacking |
KR102538181B1 (ko) | 2018-10-24 | 2023-06-01 | 삼성전자주식회사 | 반도체 패키지 |
US10796976B2 (en) | 2018-10-31 | 2020-10-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method of forming the same |
US10804202B2 (en) * | 2019-02-18 | 2020-10-13 | Sandisk Technologies Llc | Bonded assembly including a semiconductor-on-insulator die and methods for making the same |
US11195818B2 (en) * | 2019-09-12 | 2021-12-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Backside contact for thermal displacement in a multi-wafer stacked integrated circuit |
US11063022B2 (en) * | 2019-09-17 | 2021-07-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package and manufacturing method of reconstructed wafer |
US11158580B2 (en) | 2019-10-18 | 2021-10-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor devices with backside power distribution network and frontside through silicon via |
US10910272B1 (en) * | 2019-10-22 | 2021-02-02 | Sandisk Technologies Llc | Reusable support substrate for formation and transfer of semiconductor devices and methods of using the same |
US11239204B2 (en) * | 2019-11-25 | 2022-02-01 | Sandisk Technologies Llc | Bonded assembly containing laterally bonded bonding pads and methods of forming the same |
US11088116B2 (en) * | 2019-11-25 | 2021-08-10 | Sandisk Technologies Llc | Bonded assembly containing horizontal and vertical bonding interfaces and methods of forming the same |
US11270988B2 (en) * | 2020-01-20 | 2022-03-08 | Monolithic 3D Inc. | 3D semiconductor device(s) and structure(s) with electronic control units |
US11488939B2 (en) * | 2020-01-20 | 2022-11-01 | Monolithic 3D Inc. | 3D semiconductor devices and structures with at least one vertical bus |
US12021028B2 (en) * | 2020-01-20 | 2024-06-25 | Monolithic 3D Inc. | 3D semiconductor devices and structures with electronic circuit units |
US11315903B2 (en) * | 2020-03-05 | 2022-04-26 | Nanya Technology Corporation | Semiconductor device with connecting structure and method for fabricating the same |
US11127628B1 (en) * | 2020-03-16 | 2021-09-21 | Nanya Technology Corporation | Semiconductor device with connecting structure having a step-shaped conductive feature and method for fabricating the same |
US11715755B2 (en) | 2020-06-15 | 2023-08-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structure and method for forming integrated high density MIM capacitor |
KR20220017175A (ko) * | 2020-08-04 | 2022-02-11 | 에스케이하이닉스 주식회사 | 웨이퍼 대 웨이퍼 본딩 구조를 갖는 반도체 장치 및 그 제조방법 |
US11817392B2 (en) | 2020-09-28 | 2023-11-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated circuit |
US11552055B2 (en) * | 2020-11-20 | 2023-01-10 | Qualcomm Incorporated | Integrated circuit (IC) packages employing front side back-end-of-line (FS-BEOL) to back side back-end-of-line (BS-BEOL) stacking for three-dimensional (3D) die stacking, and related fabrication methods |
US11682652B2 (en) * | 2021-03-10 | 2023-06-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Notched wafer and bonding support structure to improve wafer stacking |
CN113912005B (zh) * | 2021-10-08 | 2023-02-03 | 天津大学 | 一种基于柔性铰链结构的xy全解耦微运动平台 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6888608B2 (en) | 1995-09-06 | 2005-05-03 | Kabushiki Kaisha Toshiba | Liquid crystal display device |
US6525415B2 (en) | 1999-12-28 | 2003-02-25 | Fuji Xerox Co., Ltd. | Three-dimensional semiconductor integrated circuit apparatus and manufacturing method therefor |
US7045878B2 (en) | 2001-05-18 | 2006-05-16 | Reveo, Inc. | Selectively bonded thin film layer and substrate layer for processing of useful devices |
US7420147B2 (en) | 2001-09-12 | 2008-09-02 | Reveo, Inc. | Microchannel plate and method of manufacturing microchannel plate |
US7435651B2 (en) * | 2005-09-12 | 2008-10-14 | Texas Instruments Incorporated | Method to obtain uniform nitrogen profile in gate dielectrics |
US7785938B2 (en) | 2006-04-28 | 2010-08-31 | Semiconductor Energy Laboratory Co., Ltd | Semiconductor integrated circuit, manufacturing method thereof, and semiconductor device using semiconductor integrated circuit |
WO2008036837A2 (en) | 2006-09-20 | 2008-03-27 | The Board Of Trustees Of The University Of Illinois | Release strategies for making transferable semiconductor structures, devices and device components |
US20080291767A1 (en) | 2007-05-21 | 2008-11-27 | International Business Machines Corporation | Multiple wafer level multiple port register file cell |
US7897428B2 (en) | 2008-06-03 | 2011-03-01 | International Business Machines Corporation | Three-dimensional integrated circuits and techniques for fabrication thereof |
US8742476B1 (en) | 2012-11-27 | 2014-06-03 | Monolithic 3D Inc. | Semiconductor device and structure |
US8330559B2 (en) | 2010-09-10 | 2012-12-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer level packaging |
JP6004285B2 (ja) * | 2010-12-24 | 2016-10-05 | クォルコム・インコーポレイテッド | 半導体デバイスのためのトラップリッチ層 |
US8563396B2 (en) | 2011-01-29 | 2013-10-22 | International Business Machines Corporation | 3D integration method using SOI substrates and structures produced thereby |
US8970045B2 (en) | 2011-03-31 | 2015-03-03 | Soitec | Methods for fabrication of semiconductor structures including interposers with conductive vias, and related structures and devices |
US8368152B2 (en) | 2011-04-18 | 2013-02-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | MEMS device etch stop |
US8729673B1 (en) | 2011-09-21 | 2014-05-20 | Sandia Corporation | Structured wafer for device processing |
US8906803B2 (en) | 2013-03-15 | 2014-12-09 | Sandia Corporation | Method of forming through substrate vias (TSVs) and singulating and releasing die having the TSVs from a mechanical support substrate |
-
2014
- 2014-09-26 US US14/498,965 patent/US9922956B2/en not_active Expired - Fee Related
-
2015
- 2015-09-08 BR BR112017006167A patent/BR112017006167A2/pt not_active Application Discontinuation
- 2015-09-08 SG SG11201700918RA patent/SG11201700918RA/en unknown
- 2015-09-08 CN CN201580048185.6A patent/CN106688077A/zh active Pending
- 2015-09-08 KR KR1020177007903A patent/KR20170066354A/ko unknown
- 2015-09-08 EP EP15767645.3A patent/EP3198634A1/en not_active Withdrawn
- 2015-09-08 WO PCT/US2015/048930 patent/WO2016048649A1/en active Application Filing
- 2015-09-08 JP JP2017514278A patent/JP2017536248A/ja active Pending
- 2015-09-21 TW TW104131176A patent/TWI585820B/zh not_active IP Right Cessation
-
2017
- 2017-06-14 HK HK17105914.3A patent/HK1232339A1/zh unknown
Also Published As
Publication number | Publication date |
---|---|
TW201633366A (zh) | 2016-09-16 |
EP3198634A1 (en) | 2017-08-02 |
HK1232339A1 (zh) | 2018-01-05 |
US20160093591A1 (en) | 2016-03-31 |
KR20170066354A (ko) | 2017-06-14 |
JP2017536248A (ja) | 2017-12-07 |
SG11201700918RA (en) | 2017-04-27 |
US9922956B2 (en) | 2018-03-20 |
TWI585820B (zh) | 2017-06-01 |
WO2016048649A1 (en) | 2016-03-31 |
CN106688077A (zh) | 2017-05-17 |
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