BR112016024898A2 - estrutura de potência escalonada em uma rede de distribuição de potência (pdn) - Google Patents

estrutura de potência escalonada em uma rede de distribuição de potência (pdn)

Info

Publication number
BR112016024898A2
BR112016024898A2 BR112016024898A BR112016024898A BR112016024898A2 BR 112016024898 A2 BR112016024898 A2 BR 112016024898A2 BR 112016024898 A BR112016024898 A BR 112016024898A BR 112016024898 A BR112016024898 A BR 112016024898A BR 112016024898 A2 BR112016024898 A2 BR 112016024898A2
Authority
BR
Brazil
Prior art keywords
pdn
regions
metal layer
distribution network
integrated device
Prior art date
Application number
BR112016024898A
Other languages
English (en)
Inventor
David Paynter Charles
Kae Zang Ruey
David Lane Ryan
Li Yue
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112016024898A2 publication Critical patent/BR112016024898A2/pt

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H01L23/5286—Arrangements of power or ground buses
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224—Patterned shielding planes, ground planes or power planes
    • H05K1/0225—Single or multiple openings in a shielding, ground or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0236—Electromagnetic band-gap structures
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0091—Apparatus for coating printed circuits using liquid non-metallic coating compositions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09309—Core having two or more power planes; Capacitive laminate of two power planes

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Geometry (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

alguns recursos inovadores pertencem a um dispositivo integrado que inclui uma primeira camada de metal e uma segunda camada de metal. a primeira camada de metal inclui um primeiro conjunto de regiões. o primeiro conjunto de regiões inclui uma primeira estrutura de netlist para uma rede de distribuição de potência (pdn) do dispositivo integrado. a segunda camada de metal inclui um segundo conjunto de regiões. o segundo conjunto de regiões inclui uma segunda estrutura de netlist da pdn do dispositivo integrado. em algumas implantações, a segunda camada de metal inclui adicionalmente um terceiro conjunto de regiões que compreende a primeira estrutura de netlist para a pdn do dispositivo integrado. em algumas implantações, a primeira camada de metal inclui um terceiro conjunto de regiões que inclui uma terceira estrutura de netlist para a pdn do dispositivo integrado. o terceiro conjunto de regiões não é sobreposto ao primeiro conjunto de regiões da primeira camada de metal.
BR112016024898A 2014-04-29 2015-04-28 estrutura de potência escalonada em uma rede de distribuição de potência (pdn) BR112016024898A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/264,836 US10231324B2 (en) 2014-04-29 2014-04-29 Staggered power structure in a power distribution network (PDN)
PCT/US2015/028061 WO2015168160A1 (en) 2014-04-29 2015-04-28 Staggered power structure in a power distribution network (pdn)

Publications (1)

Publication Number Publication Date
BR112016024898A2 true BR112016024898A2 (pt) 2017-08-15

Family

ID=53175170

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112016024898A BR112016024898A2 (pt) 2014-04-29 2015-04-28 estrutura de potência escalonada em uma rede de distribuição de potência (pdn)

Country Status (7)

Country Link
US (1) US10231324B2 (pt)
EP (1) EP3138127B1 (pt)
JP (1) JP2017515305A (pt)
KR (1) KR20160146751A (pt)
CN (1) CN106256020B (pt)
BR (1) BR112016024898A2 (pt)
WO (1) WO2015168160A1 (pt)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102410661B1 (ko) 2015-11-13 2022-06-20 삼성디스플레이 주식회사 터치 패널 및 이를 포함하는 표시 장치
IT202000029210A1 (it) 2020-12-01 2022-06-01 St Microelectronics Srl Dispositivo a semiconduttore e corrispondente procedimento

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3432963B2 (ja) 1995-06-15 2003-08-04 沖電気工業株式会社 半導体集積回路
US6484302B1 (en) 2000-07-11 2002-11-19 Hewlett-Packard Company Auto-contactor system and method for generating variable size contacts
US6495770B2 (en) * 2000-12-04 2002-12-17 Intel Corporation Electronic assembly providing shunting of electrical current
US6609242B1 (en) 2001-07-20 2003-08-19 Hewlett-Packard Development Company, L.P. Automated creation of power distribution grids for tiled cell arrays in integrated circuit designs
US6891260B1 (en) * 2002-06-06 2005-05-10 Lsi Logic Corporation Integrated circuit package substrate with high density routing mechanism
US6978433B1 (en) 2002-09-16 2005-12-20 Xilinx, Inc. Method and apparatus for placement of vias
US7089522B2 (en) 2003-06-11 2006-08-08 Chartered Semiconductor Manufacturing, Ltd. Device, design and method for a slot in a conductive area
US7237218B2 (en) * 2004-08-26 2007-06-26 Lsi Corporation Optimizing dynamic power characteristics of an integrated circuit chip
US7294791B2 (en) * 2004-09-29 2007-11-13 Endicott Interconnect Technologies, Inc. Circuitized substrate with improved impedance control circuitry, method of making same, electrical assembly and information handling system utilizing same
KR101265245B1 (ko) * 2006-11-01 2013-05-16 에이전시 포 사이언스, 테크놀로지 앤드 리서치 이중적층형 ｅｂｇ 구조체
JP5433972B2 (ja) * 2008-04-21 2014-03-05 日本電気株式会社 半導体装置及びその製造方法
US8230375B2 (en) 2008-09-14 2012-07-24 Raminda Udaya Madurawe Automated metal pattern generation for integrated circuits
US8106504B2 (en) * 2008-09-25 2012-01-31 King Dragon International Inc. Stacking package structure with chip embedded inside and die having through silicon via and method of the same
US8330489B2 (en) 2009-04-28 2012-12-11 International Business Machines Corporation Universal inter-layer interconnect for multi-layer semiconductor stacks
JP5581795B2 (ja) 2010-05-07 2014-09-03 ルネサスエレクトロニクス株式会社 スタンダードセル、スタンダードセルを備えた半導体装置、およびスタンダードセルの配置配線方法
WO2012041889A1 (en) * 2010-09-29 2012-04-05 St-Ericsson Sa Power routing with integrated decoupling capacitance
US8975670B2 (en) * 2011-03-06 2015-03-10 Monolithic 3D Inc. Semiconductor device and structure for heat removal
US8749322B2 (en) * 2011-09-02 2014-06-10 National Taiwan University Multilayer circuit board structure and circuitry thereof
US20170017744A1 (en) * 2015-07-15 2017-01-19 E-System Design, Inc. Modeling of Power Distribution Networks for Path Finding

Also Published As

Publication number Publication date
EP3138127B1 (en) 2023-01-04
JP2017515305A (ja) 2017-06-08
CN106256020A (zh) 2016-12-21
US10231324B2 (en) 2019-03-12
KR20160146751A (ko) 2016-12-21
WO2015168160A1 (en) 2015-11-05
EP3138127A1 (en) 2017-03-08
US20150313006A1 (en) 2015-10-29
CN106256020B (zh) 2019-03-22

Similar Documents

Publication Publication Date Title
CL2016002772A1 (es) Composiciones de insulina de rápida acción
CR20150664A (es) Moduladores de los receptores de estrógeno y sus usos
TWD170334S (zh) 垃圾桶之部分
EP3120460A4 (en) Chips including classical and quantum computing processors
CL2015002098A1 (es) “compuestos derivados de benzotiofeno, antagonistas de receptores de estrógenos y degradantes selectivos de éstos (sreds); composición farmacéutica que los comprende; y su uso en el tratamiento del cáncer de mamas, ovarios, endometrial, próstata, uterino, cervical y pulmones”. pct
TWD192214S (zh) 電子裝置
BR112018001496A2 (pt) fornecimento de serviço de assistente pessoal por meio de mensagens
BR112015030649A2 (pt) sanitizante a base de álcool com sensação e compatibilidade dérmica melhoradas
BR112015029238A2 (pt) componentes passivos integrados em um encapsulamento de circuito integrado empilhado
PE20151921A1 (es) Virus de la enfermedad de newcastle y usos de los mismos
CL2015002860A1 (es) Antagonistas de la alfa-v-beta-6 integrina
AU357519S (en) Electrosurgical device
EP3143510A4 (en) Load generation application and cloud computing benchmarking
BR112016013502A2 (pt) unidade de dosagem sólida que desintegra oralmente contendo um componente de estetrol.
CO2017010091A2 (es) Composiciones tópicas que comprenden un corticosteroide
BR112015032263A2 (pt) sistema de emanação e método para uso
AU353400S (en) Actuator assembly for an aerosol device
CL2015000976A1 (es) Compuestos de 2-fenil-5-heterociclil-tetrahidro-2h-piran-3-amina para uso en el tratamiento de diabetes y sus trastornos asociados.
AR097829A1 (es) Fracción de gasoil derivado de fischer-tropsch
BR112016024898A2 (pt) estrutura de potência escalonada em uma rede de distribuição de potência (pdn)
BR112017004962A2 (pt) processos e dispositivos de gestão de transações compósitas
AU356102S (en) Peelable nail file
CL2015003460A1 (es) Composiciones oftálmicas acuosas tópicas que contienen un derivado de 1h-indol-1-carboxamida y uso de estas para el tratamiento de una enfermedad oftálmica
BR112016000431A8 (pt) composições e métodos para o tratamento de distúrbios neuropsiquiátricos usando um agonista do receptor de endotelina-b
BR102014004765A8 (pt) conjunto de pastilha de freio tendo uma flange

Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 5A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2564 DE 2020-02-27

B350 Update of information on the portal [chapter 15.35 patent gazette]