BR0308685A - Enlace de bloqueio de frequência e fase direcionado por dados para decodificar um sinal modulado por desvio de qam tendo um piloto - Google Patents

Enlace de bloqueio de frequência e fase direcionado por dados para decodificar um sinal modulado por desvio de qam tendo um piloto

Info

Publication number
BR0308685A
BR0308685A BR0308685-2A BR0308685A BR0308685A BR 0308685 A BR0308685 A BR 0308685A BR 0308685 A BR0308685 A BR 0308685A BR 0308685 A BR0308685 A BR 0308685A
Authority
BR
Brazil
Prior art keywords
pilot
data
qam
link
modulated signal
Prior art date
Application number
BR0308685-2A
Other languages
English (en)
Inventor
Richard W Citta
Scott M Lopresto
Jingsong Xia
Wenjun Zhang
Original Assignee
Micronas Semiconductors Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micronas Semiconductors Inc filed Critical Micronas Semiconductors Inc
Publication of BR0308685A publication Critical patent/BR0308685A/pt

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/38—Demodulator circuits; Receiver circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0044—Control loops for carrier regulation
    • H04L2027/0053—Closed loops
    • H04L2027/0057—Closed loops quadrature phase
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0083—Signalling arrangements
    • H04L2027/0089—In-band signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

"ENLACE DE BLOQUEIO DE FREQuêNCIA E FASE DIRECIONADO POR DADOS PARA DECODIFICAR UM SINAL MODULADO POR DESVIO DE QAM TENDO UM PILOTO". Trata-se de um enlace de bloqueio de freq³ência e fase direcionado por dado e piloto para um sinal modulado por desvio de QAM tendo um sinal piloto que compreende um enlace de aquisição piloto e um par de enlaces de aquisição direcionados por dados. O piloto é extraído do sinal principal por um filtro piloto, é usado então tanto pelo enlace de aquisição piloto quanto para remover o piloto do sinal para os enlaces de aquisição direcionados por dados. As saídas dos dois enlaces de aquisição direcionados por dados e por piloto são somadas e retornadas para o VCO para completar o enlace de retorno.
BR0308685-2A 2002-04-05 2003-04-02 Enlace de bloqueio de frequência e fase direcionado por dados para decodificar um sinal modulado por desvio de qam tendo um piloto BR0308685A (pt)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US37029602P 2002-04-05 2002-04-05
US37029502P 2002-04-05 2002-04-05
US37028302P 2002-04-05 2002-04-05
US10/404,553 US7272203B2 (en) 2002-04-05 2003-04-01 Data-directed frequency-and-phase lock loop for decoding an offset-QAM modulated signal having a pilot
PCT/US2003/009959 WO2003088509A2 (en) 2002-04-05 2003-04-02 Data-directed frequency-and-phase lock loop for decoding an offset-qam modulated signal having a pilot

Publications (1)

Publication Number Publication Date
BR0308685A true BR0308685A (pt) 2005-02-15

Family

ID=29255573

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0308685-2A BR0308685A (pt) 2002-04-05 2003-04-02 Enlace de bloqueio de frequência e fase direcionado por dados para decodificar um sinal modulado por desvio de qam tendo um piloto

Country Status (6)

Country Link
US (1) US7272203B2 (pt)
KR (1) KR20050008656A (pt)
CN (1) CN1647476B (pt)
AU (1) AU2003220628A1 (pt)
BR (1) BR0308685A (pt)
WO (1) WO2003088509A2 (pt)

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JP2009088972A (ja) * 2007-09-28 2009-04-23 Toshiba Corp 無線通信の受信装置
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Also Published As

Publication number Publication date
AU2003220628A1 (en) 2003-10-27
AU2003220628A8 (en) 2003-10-27
KR20050008656A (ko) 2005-01-21
WO2003088509A2 (en) 2003-10-23
CN1647476B (zh) 2011-01-19
US7272203B2 (en) 2007-09-18
WO2003088509A3 (en) 2004-02-05
US20050074082A1 (en) 2005-04-07
CN1647476A (zh) 2005-07-27

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