BR0215941A - Método para sincronização fina de um receptor de telecomunicação digital, e, receptor de comunicação digital - Google Patents

Método para sincronização fina de um receptor de telecomunicação digital, e, receptor de comunicação digital

Info

Publication number
BR0215941A
BR0215941A BR0215941-4A BR0215941A BR0215941A BR 0215941 A BR0215941 A BR 0215941A BR 0215941 A BR0215941 A BR 0215941A BR 0215941 A BR0215941 A BR 0215941A
Authority
BR
Brazil
Prior art keywords
sample
interpolated
digital
early
signal
Prior art date
Application number
BR0215941-4A
Other languages
English (en)
Inventor
Donato Ettorre
Maurizio Graziano
Bruno Melis
Andrea Finotello
Alfredo Ruscitto
Original Assignee
Telecom Italia Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telecom Italia Spa filed Critical Telecom Italia Spa
Publication of BR0215941A publication Critical patent/BR0215941A/pt

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7073—Synchronisation aspects
    • H04B1/7085—Synchronisation aspects using a code tracking loop, e.g. a delay-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/709—Correlator structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

"MéTODO PARA SINCRONIZAçãO FINA DE UM RECEPTOR DE TELECOMUNICAçãO DIGITAL, E, RECEPTOR DE COMUNICAçãO DIGITAL". Um dispositivo para manter alinhamento fino entre um sinal de espectro espalhado entrante e um código localmente gerado em um receptor de comunicação digital inclui: uma linha de retardo (56) para armazenar uma pluralidade de amostras consecutivas (E-1, E, M, L, L+1) do sinal de espectro espalhado entrante; três interpoladores digitalmente controlados (24, 26, 28) para determinar através de interpolação entre amostras consecutivas uma amostra antecipada interpolada (e), uma amostra mediana interpolada (m) e uma amostra tardia interpolada (1); dois correlatores (30, 32) para calcular um sinal de erro (<sym>) como a diferença entre a energia dos símbolos computados das amostras interpoladas antecipada (e) e tardia (1); um circuito para gerar um sinal de controle (S~ OUT~) para controlar a fase de interpolação do interpolador digitalmente controlado (24) para a amostra antecipada (e), e um filtro não linear digital (68), para alisar o sinal de controle (S~ OUT~) do interpolador (24) para a amostra antecipada (e), habilitando a operação de atualização do sinal de controle só quando o valor absoluto (<sym><sym>(n)<sym>) do sinal de erro em um instante de tempo n for menor que o valor absoluto (<sym><sym>(n-1)<sym>) do mesmo sinal de erro em um instante de tempo n-1.
BR0215941-4A 2002-11-15 2002-11-15 Método para sincronização fina de um receptor de telecomunicação digital, e, receptor de comunicação digital BR0215941A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2002/012814 WO2004047327A1 (en) 2002-11-15 2002-11-15 Early-late synchronizer having reduced timing jitter

Publications (1)

Publication Number Publication Date
BR0215941A true BR0215941A (pt) 2005-09-06

Family

ID=32319523

Family Applications (1)

Application Number Title Priority Date Filing Date
BR0215941-4A BR0215941A (pt) 2002-11-15 2002-11-15 Método para sincronização fina de um receptor de telecomunicação digital, e, receptor de comunicação digital

Country Status (10)

Country Link
US (1) US7515670B2 (pt)
EP (1) EP1561287B1 (pt)
JP (1) JP4183683B2 (pt)
CN (1) CN100452669C (pt)
AT (1) ATE426952T1 (pt)
AU (1) AU2002352020A1 (pt)
BR (1) BR0215941A (pt)
CA (1) CA2509189A1 (pt)
DE (1) DE60231754D1 (pt)
WO (1) WO2004047327A1 (pt)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100547786B1 (ko) * 2003-08-09 2006-01-31 삼성전자주식회사 이동통신 시스템에서의 타이밍 에러 검출 방법 및 장치
GB2410162B (en) * 2004-01-16 2005-12-21 Compxs Uk Ltd Spread spectrum acquisition
KR100619021B1 (ko) * 2004-05-24 2006-08-31 삼성전자주식회사 오디오 에러 복원 방법 및 장치 및 그를 적용한 디지털오디오 신호 처리 시스템
JP4904596B2 (ja) * 2004-12-03 2012-03-28 エスティー‐エリクソン、ソシエテ、アノニム ディジタル遅延線中のタップ位置の管理
WO2006070320A1 (en) * 2004-12-28 2006-07-06 Koninklijke Philips Electronics N.V. Fine time tracking with improved resolution
JP5176545B2 (ja) * 2005-09-28 2013-04-03 日本電気株式会社 信号測定装置
US7804917B2 (en) * 2005-11-07 2010-09-28 Sigma Designs, Inc. Clear channel assessment method and system for ultra wideband OFDM
US8031816B2 (en) * 2006-07-17 2011-10-04 Mediatek Inc. Method and apparatus for determining boundaries of information elements
US9509366B2 (en) * 2007-04-04 2016-11-29 Via Technologies, Inc. Interference estimation circuit and method
KR100937602B1 (ko) * 2007-12-13 2010-01-20 한국전자통신연구원 인체 통신 시스템 및 그것의 통신 방법
WO2011106786A1 (en) * 2010-02-26 2011-09-01 Qualcomm Incorporated Instantaneous noise normalized searcher metrics
CN103457680B (zh) * 2013-08-20 2016-05-11 重庆邮电大学 卫星通信中基于全数字接收的定时同步误差检测方法
CN103840803B (zh) * 2013-12-04 2017-01-04 中国航空工业集团公司第六三一研究所 一种离散量抖动屏蔽的实现方法
US9379880B1 (en) * 2015-07-09 2016-06-28 Xilinx, Inc. Clock recovery circuit
US10014026B1 (en) * 2017-06-20 2018-07-03 Seagate Technology Llc Head delay calibration and tracking in MSMR systems

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI99181C (fi) * 1994-08-16 1997-10-10 Nokia Mobile Phones Ltd Vastaanotin
US6330273B1 (en) * 1996-03-28 2001-12-11 Roke Manor Research Limited Apparatus for code tracking in a direct sequence spread spectrum receiver
US6201828B1 (en) * 1998-11-12 2001-03-13 Nortel Networks Limited Fine estimation of multipath delays in spread-spectrum signals
US7184457B2 (en) * 2000-02-28 2007-02-27 Texas Instruments Incorporated Spread spectrum path estimation
US7010073B2 (en) * 2001-01-19 2006-03-07 Qualcomm, Incorporated Delay lock loops for wireless communication systems
US6456648B1 (en) * 2001-10-01 2002-09-24 Interdigital Technology Corporation Code tracking loop with automatic power normalization
US7154872B2 (en) * 2002-04-26 2006-12-26 Lucent Technologies Inc. Method and system for tracking and correcting timing errors in communication systems
US6795452B2 (en) * 2002-05-31 2004-09-21 Sandbridge Technologies, Inc. Method of tracking time intervals for a communication signal

Also Published As

Publication number Publication date
AU2002352020A8 (en) 2004-06-15
DE60231754D1 (de) 2009-05-07
US7515670B2 (en) 2009-04-07
EP1561287A1 (en) 2005-08-10
EP1561287B1 (en) 2009-03-25
ATE426952T1 (de) 2009-04-15
CN1695314A (zh) 2005-11-09
US20060251154A1 (en) 2006-11-09
WO2004047327A1 (en) 2004-06-03
JP2006506864A (ja) 2006-02-23
AU2002352020A1 (en) 2004-06-15
CN100452669C (zh) 2009-01-14
CA2509189A1 (en) 2004-06-03
JP4183683B2 (ja) 2008-11-19

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 3O ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 DA RPI 2038 DE 26/01/2010.