AU2002352020A8 - Early-late synchronizer having reduced timing jitter - Google Patents
Early-late synchronizer having reduced timing jitterInfo
- Publication number
- AU2002352020A8 AU2002352020A8 AU2002352020A AU2002352020A AU2002352020A8 AU 2002352020 A8 AU2002352020 A8 AU 2002352020A8 AU 2002352020 A AU2002352020 A AU 2002352020A AU 2002352020 A AU2002352020 A AU 2002352020A AU 2002352020 A8 AU2002352020 A8 AU 2002352020A8
- Authority
- AU
- Australia
- Prior art keywords
- early
- sample
- interpolated
- signal
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7073—Synchronisation aspects
- H04B1/7085—Synchronisation aspects using a code tracking loop, e.g. a delay-locked loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/709—Correlator structure
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Mobile Radio Communication Systems (AREA)
Abstract
A device for maintaining fine alignment between an incoming spread spectrum signal and a locally generated code in a digital communication receiver comprises: a delay line for storing a plurality of consecutive samples (E-1, E, M, L, L+1) of the incoming spread spectrum signal; three digitally controlled interpolators for determining by interpolation between consecutive samples an interpolated early sample, an interpolated middle sample, and an interpolated late sample; two correlators for calculating an error signal as the difference between the energy of the symbols computed from the interpolated early and late samples; a circuit for generating a control signal for controlling the interpolation phase of the digitally controlled interpolator for the early sample, and a digital non-linear filter, for smoothing the control signal of the interpolator for the early sample, enabling the update operation of the control signal only when the absolute value of the error signal at a time instant n is smaller than the absolute value of the same error signal at a time instant n-1.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/EP2002/012814 WO2004047327A1 (en) | 2002-11-15 | 2002-11-15 | Early-late synchronizer having reduced timing jitter |
Publications (2)
Publication Number | Publication Date |
---|---|
AU2002352020A8 true AU2002352020A8 (en) | 2004-06-15 |
AU2002352020A1 AU2002352020A1 (en) | 2004-06-15 |
Family
ID=32319523
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2002352020A Abandoned AU2002352020A1 (en) | 2002-11-15 | 2002-11-15 | Early-late synchronizer having reduced timing jitter |
Country Status (10)
Country | Link |
---|---|
US (1) | US7515670B2 (en) |
EP (1) | EP1561287B1 (en) |
JP (1) | JP4183683B2 (en) |
CN (1) | CN100452669C (en) |
AT (1) | ATE426952T1 (en) |
AU (1) | AU2002352020A1 (en) |
BR (1) | BR0215941A (en) |
CA (1) | CA2509189A1 (en) |
DE (1) | DE60231754D1 (en) |
WO (1) | WO2004047327A1 (en) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100547786B1 (en) * | 2003-08-09 | 2006-01-31 | 삼성전자주식회사 | Timing error detection method and apparatus in mobile communication system |
GB2410162B (en) * | 2004-01-16 | 2005-12-21 | Compxs Uk Ltd | Spread spectrum acquisition |
KR100619021B1 (en) * | 2004-05-24 | 2006-08-31 | 삼성전자주식회사 | Method and apparatus for restoring audio error data and digital audio signal processor using thereof |
CN101116255B (en) * | 2004-12-03 | 2012-07-04 | Nxp股份有限公司 | Managing tap positions in a digital delay line and method thereof |
CN101095291B (en) * | 2004-12-28 | 2011-11-02 | Nxp股份有限公司 | Fine time tracking with improved resolution |
JP5176545B2 (en) * | 2005-09-28 | 2013-04-03 | 日本電気株式会社 | Signal measuring device |
US7804917B2 (en) * | 2005-11-07 | 2010-09-28 | Sigma Designs, Inc. | Clear channel assessment method and system for ultra wideband OFDM |
US8031816B2 (en) * | 2006-07-17 | 2011-10-04 | Mediatek Inc. | Method and apparatus for determining boundaries of information elements |
US9509366B2 (en) * | 2007-04-04 | 2016-11-29 | Via Technologies, Inc. | Interference estimation circuit and method |
KR100937602B1 (en) * | 2007-12-13 | 2010-01-20 | 한국전자통신연구원 | Human body communication system and communication method thereof |
US20130142060A1 (en) * | 2010-02-26 | 2013-06-06 | Qualcomm Incorporated | Instantaneous noise normalized searcher metrics |
CN103457680B (en) * | 2013-08-20 | 2016-05-11 | 重庆邮电大学 | Timing Synchronization error detection method based on digital reception in satellite communication |
CN103840803B (en) * | 2013-12-04 | 2017-01-04 | 中国航空工业集团公司第六三一研究所 | A kind of implementation method of discrete magnitude dither mask |
US9379880B1 (en) * | 2015-07-09 | 2016-06-28 | Xilinx, Inc. | Clock recovery circuit |
US10014026B1 (en) * | 2017-06-20 | 2018-07-03 | Seagate Technology Llc | Head delay calibration and tracking in MSMR systems |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FI99181C (en) * | 1994-08-16 | 1997-10-10 | Nokia Mobile Phones Ltd | Receiver |
US6330273B1 (en) * | 1996-03-28 | 2001-12-11 | Roke Manor Research Limited | Apparatus for code tracking in a direct sequence spread spectrum receiver |
US6201828B1 (en) * | 1998-11-12 | 2001-03-13 | Nortel Networks Limited | Fine estimation of multipath delays in spread-spectrum signals |
US7184457B2 (en) * | 2000-02-28 | 2007-02-27 | Texas Instruments Incorporated | Spread spectrum path estimation |
US7010073B2 (en) * | 2001-01-19 | 2006-03-07 | Qualcomm, Incorporated | Delay lock loops for wireless communication systems |
US6456648B1 (en) * | 2001-10-01 | 2002-09-24 | Interdigital Technology Corporation | Code tracking loop with automatic power normalization |
US7154872B2 (en) * | 2002-04-26 | 2006-12-26 | Lucent Technologies Inc. | Method and system for tracking and correcting timing errors in communication systems |
US6795452B2 (en) * | 2002-05-31 | 2004-09-21 | Sandbridge Technologies, Inc. | Method of tracking time intervals for a communication signal |
-
2002
- 2002-11-15 JP JP2004552437A patent/JP4183683B2/en not_active Expired - Fee Related
- 2002-11-15 BR BR0215941-4A patent/BR0215941A/en not_active IP Right Cessation
- 2002-11-15 AT AT02787695T patent/ATE426952T1/en not_active IP Right Cessation
- 2002-11-15 DE DE60231754T patent/DE60231754D1/en not_active Expired - Lifetime
- 2002-11-15 EP EP02787695A patent/EP1561287B1/en not_active Expired - Lifetime
- 2002-11-15 CN CNB028298918A patent/CN100452669C/en not_active Expired - Fee Related
- 2002-11-15 AU AU2002352020A patent/AU2002352020A1/en not_active Abandoned
- 2002-11-15 US US10/534,992 patent/US7515670B2/en not_active Expired - Fee Related
- 2002-11-15 WO PCT/EP2002/012814 patent/WO2004047327A1/en active Application Filing
- 2002-11-15 CA CA002509189A patent/CA2509189A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US7515670B2 (en) | 2009-04-07 |
EP1561287B1 (en) | 2009-03-25 |
CN1695314A (en) | 2005-11-09 |
CN100452669C (en) | 2009-01-14 |
EP1561287A1 (en) | 2005-08-10 |
JP4183683B2 (en) | 2008-11-19 |
ATE426952T1 (en) | 2009-04-15 |
AU2002352020A1 (en) | 2004-06-15 |
CA2509189A1 (en) | 2004-06-03 |
JP2006506864A (en) | 2006-02-23 |
DE60231754D1 (en) | 2009-05-07 |
BR0215941A (en) | 2005-09-06 |
WO2004047327A1 (en) | 2004-06-03 |
US20060251154A1 (en) | 2006-11-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
AU2002352020A8 (en) | Early-late synchronizer having reduced timing jitter | |
JP4237143B2 (en) | Optimal interpolator method and apparatus for digital timing adjustment | |
US8837557B2 (en) | Methods and apparatus for reducing a sampling rate during a sampling phase determination process | |
JPH06261031A (en) | Apparatus and method for synchronizing symbol and frame in tdma system | |
JP4720658B2 (en) | Synchronization detection circuit and multi-mode wireless communication device | |
JP2005109892A (en) | Receiver | |
JPH10303782A (en) | Cdma receiver | |
US6959035B2 (en) | Post-correlation interpolation for delay locked loops | |
JP4169352B2 (en) | Precision synchronization method and device for digital telecommunications receiver | |
JP3406167B2 (en) | Synchronizer | |
JPH0865207A (en) | Synchronizing device | |
US7023939B2 (en) | Multi-channel digital modem | |
JP2001274728A (en) | Receiver | |
US7136447B2 (en) | Clock recovery circuit | |
KR20020049016A (en) | Device for the ideal synchronization of code signals | |
KR950007434B1 (en) | Dial early-late tracking loop circuit | |
KR20030048271A (en) | Timing delay loop circuit for reduced number of samples by interpolation in CDMA System | |
EP1742377B1 (en) | Code tracking loop using non-integer amount of samples per symbol | |
EP1466420B1 (en) | Improved time tracking loop | |
JP2003143109A (en) | Receiver and reception method | |
KR100279127B1 (en) | Interpolation method and apparatus therefor that can change sampling time | |
KR20050086639A (en) | Early-late synchronizer having reduced timing jitter | |
JP2001069033A (en) | Spread spectrum system receiver, synchronization latch circuit and synchronization latch method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase | ||
TH | Corrigenda |
Free format text: IN VOL 18, NO 27, PAGE(S) 7467 UNDER THE HEADING APPLICATIONS OPI - NAME INDEX UNDER THE NAME TELECOM ITALIA S.P.A., APPLICATION NO. 2002352020, UNDER INID (71) CORRECT THE NAME TO READ STMICROELECTRONICS S.R.L.; TELECOM ITALIA S.P.A. |