BE843622A - Circuit integre bipolaire - Google Patents

Circuit integre bipolaire

Info

Publication number
BE843622A
BE843622A BE168497A BE168497A BE843622A BE 843622 A BE843622 A BE 843622A BE 168497 A BE168497 A BE 168497A BE 168497 A BE168497 A BE 168497A BE 843622 A BE843622 A BE 843622A
Authority
BE
Belgium
Prior art keywords
integrated circuit
bipolar integrated
bipolar
circuit
integrated
Prior art date
Application number
BE168497A
Other languages
English (en)
French (fr)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE843622A publication Critical patent/BE843622A/xx

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/60—Lateral BJTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
BE168497A 1975-07-02 1976-06-30 Circuit integre bipolaire BE843622A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2529598A DE2529598C3 (de) 1975-07-02 1975-07-02 Verfahren zur Herstellung einer monolithisch integrierten Halbleiterschaltung mit bipolaren Transistoren

Publications (1)

Publication Number Publication Date
BE843622A true BE843622A (fr) 1976-10-18

Family

ID=5950525

Family Applications (1)

Application Number Title Priority Date Filing Date
BE168497A BE843622A (fr) 1975-07-02 1976-06-30 Circuit integre bipolaire

Country Status (8)

Country Link
US (1) US4047975A (cs)
JP (1) JPS528784A (cs)
BE (1) BE843622A (cs)
DE (1) DE2529598C3 (cs)
FR (1) FR2316729A1 (cs)
GB (1) GB1510276A (cs)
IT (1) IT1081215B (cs)
NL (1) NL7607285A (cs)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4168213A (en) * 1976-04-29 1979-09-18 U.S. Philips Corporation Field emission device and method of forming same
CA1090006A (en) * 1976-12-27 1980-11-18 Wolfgang M. Feist Semiconductor structures and methods for manufacturing such structures
US4111720A (en) * 1977-03-31 1978-09-05 International Business Machines Corporation Method for forming a non-epitaxial bipolar integrated circuit
US4144098A (en) * 1977-04-28 1979-03-13 Hughes Aircraft Company P+ Buried layer for I2 L isolation by ion implantation
US4099987A (en) * 1977-07-25 1978-07-11 International Business Machines Corporation Fabricating integrated circuits incorporating high-performance bipolar transistors
US4116720A (en) * 1977-12-27 1978-09-26 Burroughs Corporation Method of making a V-MOS field effect transistor for a dynamic memory cell having improved capacitance
US4330932A (en) * 1978-07-20 1982-05-25 The United States Of America As Represented By The Secretary Of The Navy Process for preparing isolated junctions in thin-film semiconductors utilizing shadow masked deposition to form graded-side mesas
US4206005A (en) * 1978-11-27 1980-06-03 Xerox Corporation Method of making split gate LSI VMOSFET
US4326332A (en) * 1980-07-28 1982-04-27 International Business Machines Corp. Method of making a high density V-MOS memory array
US4415371A (en) * 1980-12-29 1983-11-15 Rockwell International Corporation Method of making sub-micron dimensioned NPN lateral transistor
US4485551A (en) * 1981-03-02 1984-12-04 Rockwell International Corporation NPN Type lateral transistor separated from substrate by O.D.E. for minimal interference therefrom and method for producing same
US4397079A (en) * 1981-03-30 1983-08-09 International Business Machines Corp. Process for improving the yield of integrated devices including Schottky barrier diodes
US4508579A (en) * 1981-03-30 1985-04-02 International Business Machines Corporation Lateral device structures using self-aligned fabrication techniques
US4688073A (en) * 1981-03-30 1987-08-18 Goth George R Lateral device structures using self-aligned fabrication techniques
US4743565A (en) * 1981-03-30 1988-05-10 International Business Machines Corporation Lateral device structures using self-aligned fabrication techniques
JPH0669101B2 (ja) * 1983-08-25 1994-08-31 松下電子工業株式会社 半導体装置の製造方法
US5289024A (en) * 1990-08-07 1994-02-22 National Semiconductor Corporation Bipolar transistor with diffusion compensation
US5998266A (en) * 1996-12-19 1999-12-07 Magepower Semiconductor Corp. Method of forming a semiconductor structure having laterally merged body layer
US7199055B2 (en) * 2003-03-03 2007-04-03 Cypress Semiconductor Corp. Magnetic memory cell junction and method for forming a magnetic memory cell junction
KR100604527B1 (ko) * 2003-12-31 2006-07-24 동부일렉트로닉스 주식회사 바이폴라 트랜지스터 제조방법
JP4906267B2 (ja) * 2005-03-31 2012-03-28 オンセミコンダクター・トレーディング・リミテッド 半導体装置及びその製造方法
US7687887B1 (en) * 2006-12-01 2010-03-30 National Semiconductor Corporation Method of forming a self-aligned bipolar transistor structure using a selectively grown emitter
CN111926389B (zh) * 2020-08-05 2021-09-14 吉林大学 利用分子共混生长的双极性有机单晶、制备方法及其应用

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3472751A (en) * 1965-06-16 1969-10-14 Ion Physics Corp Method and apparatus for forming deposits on a substrate by cathode sputtering using a focussed ion beam
GB1332931A (en) * 1970-01-15 1973-10-10 Mullard Ltd Methods of manufacturing a semiconductor device
US3657542A (en) * 1970-05-04 1972-04-18 Atomic Energy Commission Production of beams of excited energetic neutral particles
US3675313A (en) * 1970-10-01 1972-07-11 Westinghouse Electric Corp Process for producing self aligned gate field effect transistor
US3823352A (en) * 1972-12-13 1974-07-09 Bell Telephone Labor Inc Field effect transistor structures and methods
US3950233A (en) * 1973-07-30 1976-04-13 Signetics Corporation Method for fabricating a semiconductor structure
US3884788A (en) * 1973-08-30 1975-05-20 Honeywell Inc Substrate preparation for liquid phase epitaxy of mercury cadmium telluride
GB1444173A (en) * 1973-09-07 1976-07-28 Flour Milling Baking Research Treatment of grain
US3920482A (en) * 1974-03-13 1975-11-18 Signetics Corp Method for forming a semiconductor structure having islands isolated by adjacent moats
US3966514A (en) * 1975-06-30 1976-06-29 Ibm Corporation Method for forming dielectric isolation combining dielectric deposition and thermal oxidation

Also Published As

Publication number Publication date
IT1081215B (it) 1985-05-16
DE2529598C3 (de) 1978-05-24
DE2529598B2 (de) 1977-09-29
DE2529598A1 (de) 1977-01-13
GB1510276A (en) 1978-05-10
JPS528784A (en) 1977-01-22
NL7607285A (nl) 1977-01-04
US4047975A (en) 1977-09-13
FR2316729A1 (fr) 1977-01-28
FR2316729B1 (cs) 1979-09-28

Similar Documents

Publication Publication Date Title
FR2336801A1 (fr) Circuit integre
BE843622A (fr) Circuit integre bipolaire
AT359316B (de) Anschlussschaltung
AT373724B (de) Integrierte schaltung
DK479576A (da) Transistortendingskredslob
NL7613543A (nl) Omzetterschakeling.
DE2559729A1 (de) Integrierte schaltung
TR19646A (tr) Duesey saptirma devresi
FR2335052A1 (fr) Circuit integre
AT380599B (de) Oszillatorschaltung
FR2319236A1 (fr) Circuit redresseur
SE417237B (sv) Sekring for lasring
SE7606179L (sv) Halvledaranordningsaggregat
IT1067765B (it) Circuito integrato
SE7601984L (sv) Reglerbar integrerad krets
SE7613319L (sv) Krets
SE7605316L (sv) Integrerad kopplingskrets
IT1073327B (it) Disposizione circuitale integrata
NL7603827A (nl) Geintegreerde schakeling.
FR2302635A1 (fr) Circuit logique
FR2315794A1 (fr) Circuit de convertisseur bipolaire
FR2319246A1 (fr) Circuit oscillateur
AT336930B (de) Integrierte schaltung
NL7603427A (nl) Bekrachtigingscircuit.
SE7604018L (sv) Elektriskt skarudon