BE710700A - - Google Patents

Info

Publication number
BE710700A
BE710700A BE710700DA BE710700A BE 710700 A BE710700 A BE 710700A BE 710700D A BE710700D A BE 710700DA BE 710700 A BE710700 A BE 710700A
Authority
BE
Belgium
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE710700A publication Critical patent/BE710700A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/5016—Half or full adders, i.e. basic adder cells for one denomination forming at least one of the output signals directly from the minterms of the input signals, i.e. with a minimum number of gate levels
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic
    • H03K19/0866—Stacked emitter coupled logic
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/48—Indexing scheme relating to groups G06F7/48 - G06F7/575
    • G06F2207/4802—Special implementations
    • G06F2207/4806—Cascode or current mode logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Mathematical Optimization (AREA)
  • Logic Circuits (AREA)
  • Control Of Direct Current Motors (AREA)
BE710700D 1967-02-14 1968-02-13 BE710700A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US61599767A 1967-02-14 1967-02-14

Publications (1)

Publication Number Publication Date
BE710700A true BE710700A (de) 1968-08-13

Family

ID=24467637

Family Applications (1)

Application Number Title Priority Date Filing Date
BE710700D BE710700A (de) 1967-02-14 1968-02-13

Country Status (4)

Country Link
US (1) US3519810A (de)
BE (1) BE710700A (de)
FR (1) FR1556504A (de)
GB (1) GB1206008A (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7007842A (de) * 1969-06-09 1970-12-11
NL145374B (nl) * 1969-07-11 1975-03-17 Siemens Ag Schakeling voor het vormen van het uitgangsoverdrachtcijfer bij een volledige binaire opteller.
DE1941264C3 (de) * 1969-08-13 1975-07-17 Siemens Ag, 1000 Berlin Und 8000 Muenchen Asynchrone RS-Kippstufe in ECL-Technik
US3906212A (en) * 1971-08-18 1975-09-16 Siemens Ag Series-coupled emitter coupled logic (ECL) circuit having a plurality of independently controllable current paths in a lower plane
US3914620A (en) * 1973-12-26 1975-10-21 Motorola Inc Decode circuitry for bipolar random access memory
US3978329A (en) * 1975-09-12 1976-08-31 Bell Telephone Laboratories, Incorporated One-bit full adder
DE2643609A1 (de) * 1975-10-01 1977-04-14 Honeywell Inf Systems Aus zwei halbaddierern aufgebauter uebertragsfehlersicherer volladdierer in cml-technik
DE2740353C2 (de) * 1977-09-07 1982-05-13 Siemens AG, 1000 Berlin und 8000 München ECL-kompatibler Registerbaustein mit bipolaren Speicherzellen
US4215418A (en) * 1978-06-30 1980-07-29 Trw Inc. Integrated digital multiplier circuit using current mode logic
US4408134A (en) * 1981-01-19 1983-10-04 Advanced Micro Devices, Inc. Unitary exclusive or-and logic circuit
GB8324710D0 (en) * 1983-09-15 1983-10-19 Ferranti Plc Bipolar transistor logic circuits
US4737663A (en) * 1984-03-01 1988-04-12 Advanced Micro Devices, Inc. Current source arrangement for three-level emitter-coupled logic and four-level current mode logic
JPS60205631A (ja) * 1984-03-29 1985-10-17 Toshiba Corp 全加算回路
JPS60247734A (ja) * 1984-05-24 1985-12-07 Toshiba Corp 論理演算回路
JPS60247733A (ja) * 1984-05-24 1985-12-07 Toshiba Corp 論理演算回路
ATE49090T1 (de) * 1984-09-24 1990-01-15 Siemens Ag Und-gatter fuer ecl-schaltungen.
US4695749A (en) * 1986-02-25 1987-09-22 Fairchild Semiconductor Corporation Emitter-coupled logic multiplexer
US4779270A (en) * 1987-04-15 1988-10-18 International Business Machines Corporation Apparatus for reducing and maintaining constant overshoot in a high speed driver
DE3880825T2 (de) * 1987-08-25 1993-11-11 Hughes Aircraft Co Anordnung zur schnellen addition von binärzahlen.
US4918640A (en) * 1988-02-05 1990-04-17 Siemens Aktiengesellschaft Adder cell having a sum part and a carry part
US5175703A (en) * 1991-04-29 1992-12-29 Motorola, Inc. High speed full adder and method

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3040192A (en) * 1958-07-30 1962-06-19 Ibm Logic, exclusive-or, and shift register circuits utilizing directly connected cascade transistors in "tree" configuration
NL292437A (de) * 1962-05-09
US3291973A (en) * 1964-09-22 1966-12-13 Sperry Rand Corp Binary serial adders utilizing nor gates
US3291974A (en) * 1964-12-14 1966-12-13 Sperry Rand Corp Planar function generator using modulo 2 unprimed canonical form logic
US3407357A (en) * 1966-01-21 1968-10-22 Sperry Rand Corp Planar interconnecting network avoiding signal path crossovers

Also Published As

Publication number Publication date
US3519810A (en) 1970-07-07
GB1206008A (en) 1970-09-23
FR1556504A (de) 1969-02-07

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