AU8119601A - Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence - Google Patents

Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence

Info

Publication number
AU8119601A
AU8119601A AU8119601A AU8119601A AU8119601A AU 8119601 A AU8119601 A AU 8119601A AU 8119601 A AU8119601 A AU 8119601A AU 8119601 A AU8119601 A AU 8119601A AU 8119601 A AU8119601 A AU 8119601A
Authority
AU
Australia
Prior art keywords
workpiece
creates
differential
plating method
external influence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
AU8119601A
Other languages
English (en)
Inventor
Bulent Basol
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ASM Nutool Inc
Original Assignee
ASM Nutool Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/740,701 external-priority patent/US6534116B2/en
Priority claimed from US09/919,788 external-priority patent/US6858121B2/en
Application filed by ASM Nutool Inc filed Critical ASM Nutool Inc
Publication of AU8119601A publication Critical patent/AU8119601A/xx
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/22—Electroplating combined with mechanical treatment during the deposition
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/34—Pretreatment of metallic surfaces to be electroplated
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684—Smoothing; Planarisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
AU8119601A 2000-08-10 2001-08-09 Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence Pending AU8119601A (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US22473900P 2000-08-10 2000-08-10
US09/740,701 US6534116B2 (en) 2000-08-10 2000-12-18 Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence
US09/919,788 US6858121B2 (en) 2000-08-10 2001-07-31 Method and apparatus for filling low aspect ratio cavities with conductive material at high rate
PCT/US2001/024890 WO2002015245A2 (en) 2000-08-10 2001-08-09 Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence

Publications (1)

Publication Number Publication Date
AU8119601A true AU8119601A (en) 2002-02-25

Family

ID=46204222

Family Applications (1)

Application Number Title Priority Date Filing Date
AU8119601A Pending AU8119601A (en) 2000-08-10 2001-08-09 Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence

Country Status (7)

Country Link
EP (1) EP1307905A2 (zh)
JP (1) JP2004521186A (zh)
KR (1) KR20030040394A (zh)
CN (1) CN1310289C (zh)
AU (1) AU8119601A (zh)
TW (1) TW520407B (zh)
WO (1) WO2002015245A2 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013125658A1 (ja) * 2012-02-24 2013-08-29 Ｊｆｅスチール株式会社 金属材料、表面処理方法及び装置
CN110453258B (zh) * 2019-06-13 2021-10-26 佛山市顺德区巴田塑料实业有限公司 一种电镀灯头生产方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1075515A (zh) * 1992-02-20 1993-08-25 海阳县刺绣厂 一种空雕绣工艺
JP3191759B2 (ja) * 1998-02-20 2001-07-23 日本電気株式会社 半導体装置の製造方法
EP1063696B1 (en) * 1999-06-22 2007-08-22 Interuniversitair Micro-Elektronica Centrum Vzw A method for improving the quality of a metal-containing layer deposited from a plating bath
JP3594894B2 (ja) * 2000-02-01 2004-12-02 新光電気工業株式会社 ビアフィリングめっき方法

Also Published As

Publication number Publication date
KR20030040394A (ko) 2003-05-22
WO2002015245A2 (en) 2002-02-21
JP2004521186A (ja) 2004-07-15
TW520407B (en) 2003-02-11
WO2002015245A3 (en) 2002-07-04
CN1559081A (zh) 2004-12-29
EP1307905A2 (en) 2003-05-07
CN1310289C (zh) 2007-04-11

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