TW520407B - Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence - Google Patents
Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence Download PDFInfo
- Publication number
- TW520407B TW520407B TW090119667A TW90119667A TW520407B TW 520407 B TW520407 B TW 520407B TW 090119667 A TW090119667 A TW 090119667A TW 90119667 A TW90119667 A TW 90119667A TW 520407 B TW520407 B TW 520407B
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- Prior art keywords
- work piece
- mask
- scope
- patent application
- additive
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 151
- 239000000654 additive Substances 0.000 title claims abstract description 123
- 238000007747 plating Methods 0.000 title claims abstract description 100
- 230000000996 additive effect Effects 0.000 title claims abstract description 76
- 239000000758 substrate Substances 0.000 claims abstract description 64
- 239000004020 conductor Substances 0.000 claims abstract description 32
- 239000003792 electrolyte Substances 0.000 claims description 71
- 238000009713 electroplating Methods 0.000 claims description 71
- 239000010949 copper Substances 0.000 claims description 59
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 57
- 229910052802 copper Inorganic materials 0.000 claims description 57
- 230000006698 induction Effects 0.000 claims description 51
- 230000005684 electric field Effects 0.000 claims description 41
- 239000003112 inhibitor Substances 0.000 claims description 35
- 238000001179 sorption measurement Methods 0.000 claims description 29
- 238000011049 filling Methods 0.000 claims description 26
- 239000000463 material Substances 0.000 claims description 25
- 230000005611 electricity Effects 0.000 claims description 12
- 239000012212 insulator Substances 0.000 claims description 9
- 239000008151 electrolyte solution Substances 0.000 claims description 7
- 239000007788 liquid Substances 0.000 claims description 7
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 4
- 238000005065 mining Methods 0.000 claims description 4
- 238000005868 electrolysis reaction Methods 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 230000002708 enhancing effect Effects 0.000 claims description 2
- 230000000694 effects Effects 0.000 claims 10
- PCTMTFRHKVHKIS-BMFZQQSSSA-N (1s,3r,4e,6e,8e,10e,12e,14e,16e,18s,19r,20r,21s,25r,27r,30r,31r,33s,35r,37s,38r)-3-[(2r,3s,4s,5s,6r)-4-amino-3,5-dihydroxy-6-methyloxan-2-yl]oxy-19,25,27,30,31,33,35,37-octahydroxy-18,20,21-trimethyl-23-oxo-22,39-dioxabicyclo[33.3.1]nonatriaconta-4,6,8,10 Chemical compound C1C=C2C[C@@H](OS(O)(=O)=O)CC[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@H]([C@H](C)CCCC(C)C)[C@@]1(C)CC2.O[C@H]1[C@@H](N)[C@H](O)[C@@H](C)O[C@H]1O[C@H]1/C=C/C=C/C=C/C=C/C=C/C=C/C=C/[C@H](C)[C@@H](O)[C@@H](C)[C@H](C)OC(=O)C[C@H](O)C[C@H](O)CC[C@@H](O)[C@H](O)C[C@H](O)C[C@](O)(C[C@H](O)[C@H]2C(O)=O)O[C@H]2C1 PCTMTFRHKVHKIS-BMFZQQSSSA-N 0.000 claims 1
- 208000027418 Wounds and injury Diseases 0.000 claims 1
- 230000001133 acceleration Effects 0.000 claims 1
- 239000003795 chemical substances by application Substances 0.000 claims 1
- 230000006378 damage Effects 0.000 claims 1
- 238000005242 forging Methods 0.000 claims 1
- 208000014674 injury Diseases 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 76
- 238000000151 deposition Methods 0.000 description 20
- 239000010410 layer Substances 0.000 description 19
- 230000008021 deposition Effects 0.000 description 18
- 239000000243 solution Substances 0.000 description 16
- 238000005516 engineering process Methods 0.000 description 9
- 239000010408 film Substances 0.000 description 9
- 238000005498 polishing Methods 0.000 description 9
- 230000004888 barrier function Effects 0.000 description 8
- 238000012545 processing Methods 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 8
- 239000000126 substance Substances 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 6
- 238000013461 design Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 238000007792 addition Methods 0.000 description 5
- 238000009472 formulation Methods 0.000 description 5
- 239000000203 mixture Substances 0.000 description 5
- 238000003672 processing method Methods 0.000 description 5
- LFMQNMXVVXHZCC-UHFFFAOYSA-N 1,3-benzothiazol-2-yl n,n-diethylcarbamodithioate Chemical compound C1=CC=C2SC(SC(=S)N(CC)CC)=NC2=C1 LFMQNMXVVXHZCC-UHFFFAOYSA-N 0.000 description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000004070 electrodeposition Methods 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 230000002441 reversible effect Effects 0.000 description 4
- 238000003860 storage Methods 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 3
- 230000007246 mechanism Effects 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 230000002378 acidificating effect Effects 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000018109 developmental process Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000001914 filtration Methods 0.000 description 2
- 230000000670 limiting effect Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- -1 polyethylene Polymers 0.000 description 2
- 230000002829 reductive effect Effects 0.000 description 2
- 238000003756 stirring Methods 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 239000004743 Polypropylene Substances 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910001128 Sn alloy Inorganic materials 0.000 description 1
- 229910008599 TiW Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 150000001450 anions Chemical class 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910052793 cadmium Inorganic materials 0.000 description 1
- BDOSMKKIYDKNTQ-UHFFFAOYSA-N cadmium atom Chemical compound [Cd] BDOSMKKIYDKNTQ-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003638 chemical reducing agent Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 229910001431 copper ion Inorganic materials 0.000 description 1
- 229910000365 copper sulfate Inorganic materials 0.000 description 1
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- OMZSGWSJDCOLKM-UHFFFAOYSA-N copper(II) sulfide Chemical compound [S-2].[Cu+2] OMZSGWSJDCOLKM-UHFFFAOYSA-N 0.000 description 1
- PTVDYARBVCBHSL-UHFFFAOYSA-N copper;hydrate Chemical compound O.[Cu] PTVDYARBVCBHSL-UHFFFAOYSA-N 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000002305 electric material Substances 0.000 description 1
- 239000002659 electrodeposit Substances 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000003913 materials processing Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 239000007777 multifunctional material Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 150000008427 organic disulfides Chemical class 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229920001155 polypropylene Polymers 0.000 description 1
- 238000005086 pumping Methods 0.000 description 1
- 230000035484 reaction time Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 238000004064 recycling Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229910052702 rhenium Inorganic materials 0.000 description 1
- WUAPFZMCVAUBPE-UHFFFAOYSA-N rhenium atom Chemical compound [Re] WUAPFZMCVAUBPE-UHFFFAOYSA-N 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000002336 sorption--desorption measurement Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
- 239000000080 wetting agent Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/22—Electroplating combined with mechanical treatment during the deposition
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/34—Pretreatment of metallic surfaces to be electroplated
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Organic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Metallurgy (AREA)
- Materials Engineering (AREA)
- Electrochemistry (AREA)
- Mechanical Engineering (AREA)
- Electroplating Methods And Accessories (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Chemically Coating (AREA)
Abstract
Description
520407 A7 p-------- B7 五、發明説明(ι) "——- ---— 纟發明一般係有關於半導體之電鍍方法與裝置。更特 定言之,本發明係針對使用外部感應以於一工作件之上表 «及凹槽内所吸附之添加物之間產生差異的裝置與方法广 肖明缸作狀凹槽料巾傳導性材料之電鑛。 發明的u 在製造多階段積體電路(IC)當中係需要數種步驟。該 等步驟包括利用光阻蝕刻劑圖案化、蝕刻以及其他類似方 :¾:將傳導性與絕緣體材料完全或是部分去除之後,將該等 材料沈積在半導體晶圓或基板上。在微影術、圖案化與蝕 刻等步驟之後,最終的表面一般係為非平面的其係包含多 數凹槽或是特徵,諸如貫穿孔、線路、溝、管道、黏合槪 墊以及類似物係包含廣泛種類的尺寸與形狀。該等特徵典 型地係在執行附加之加工步驟(諸如蝕刻及/或化學機械拋 光(CMP))之前,以一種具高度傳導性之金屬材料填注。因 此,在積體電路之不同的階段/部分之間構成一種低阻抗互 '連構造。 銅(Cu)由於其之低的電氣抵抗力以及對電徙動之高的 電阻之特性,因此快速地成為用於積體電路之互連的較佳 材料。最受歡迎的方法之一係為電沈積,其係用於將銅沈 積入基板表面上之特徵中。 如同所預期,已有數種不同之針對銅電鍍系統的設計 在此工業上加以使用。例如,於1996年5月14日頒給 Andricacos等人之美國專利第5,516,412號中揭露一種垂直 本紙張尺度適财關家標準_ A视格⑵GX297公楚) 7~~ (請先閱讀背面之注意事項再填寫本頁)520407 A7 p -------- B7 V. Description of the invention (ι) " ——- ----- The invention is generally related to the plating method and device for semiconductors. More specifically, the present invention is directed to a device and method that uses external induction to create a difference between a surface on a work piece «and an additive adsorbed in a groove. Guang Xiaoming Cylinder-shaped grooved towel conductivity Electricity of materials. The invention of u required several steps in manufacturing a multi-stage integrated circuit (IC). These steps include patterning, etching, and the like using photoresist etchant: ¾: After the conductive and insulator materials are completely or partially removed, the materials are deposited on a semiconductor wafer or substrate. After lithography, patterning, and etching steps, the final surface is generally non-planar. It contains most grooves or features, such as through-holes, lines, trenches, pipes, bonded pads, and the like. Wide variety of sizes and shapes. These features are typically filled with a highly conductive metal material before performing additional processing steps such as etching and / or chemical mechanical polishing (CMP). Therefore, a low-impedance interconnection structure is formed between different stages / parts of the integrated circuit. Copper (Cu) has quickly become a better material for interconnecting integrated circuits due to its low electrical resistance and high resistance to electrical migration. One of the most popular methods is electrodeposition, which is used to deposit copper into features on the surface of a substrate. As expected, several different designs for copper plating systems have been used in this industry. For example, U.S. Patent No. 5,516,412, issued to Andricacos et al. On May 14, 1996, discloses a vertical paper size suitable for financial and family care standards_ A 视 格 ⑵GX297 公 楚 7 ~~ (Please read the note on the back first (Fill in this page again)
520407 A7 I---—________B7______ 五、發明説明(2 ) 攪棒電鍍槽,其係設計用於將一薄膜電沈積在一平坦的物 件上。接著,於1999年11月16日頒給κ〇οη之美國專利第 5,985,123號中揭露另一種垂直電鍍裝置,其目的在於克服 與基板尺寸變化有關聯的非均勻沈積之問題。再者,於〗998 年12月29日頒給Tamaki等人之美國專利第5,853,559號中 揭露一種電鍍裝置其係可將廢棄的電鍍電解液減至最少並 達到高度的電解液回收。 於銅電沈積加工期間,使用特別調配的電鍍溶液或是 電解液。該等溶液或電解液係包含銅離子以及添加物,其 係用以控制沈積材料的質地、形態以及電鍍作用。所需之 添加物係使沈積層光滑並有些光澤。 具有數種類型的銅電鍍溶液調配物,其中一些調配物 市面上係有販售。該一調配物包括作為銅來源的銅硫酸鹽 (CnS04)(可見 J0urnal 〇f The Electrochemical Society,520407 A7 I ----________ B7______ 5. Description of the Invention (2) The stirring rod plating bath is designed to electrodeposit a thin film on a flat object. Next, U.S. Patent No. 5,985,123, issued to κοοη on November 16, 1999, discloses another vertical electroplating device whose purpose is to overcome the problem of non-uniform deposition associated with changes in substrate size. Furthermore, U.S. Patent No. 5,853,559, issued to Tamaki et al. On December 29, 998, discloses an electroplating device that minimizes waste electroplating electrolyte and achieves a high degree of electrolyte recovery. During the copper electrodeposition process, a specially formulated plating solution or electrolyte is used. These solutions or electrolytes contain copper ions and additives, which are used to control the texture, morphology, and plating of the deposited material. The required additives are smooth and somewhat shiny. There are several types of copper plating solution formulations, some of which are commercially available. The formulation includes copper sulfate (CnS04) as a copper source (see J0urnal 〇f The Electrochemical Society,
Vol.146,第 2540-2545 頁,1999 年由 James Ke„y 等人所發 表)及包括水、硫酸(H2S〇4)與小量的氯化物離子。如所熟 知的,其他之化學製品係可添加至銅電鍍溶液中以獲得所 欲特性之沈積材料。 銅電鍍溶液中之添加物係可分類為數種類型,諸如抑 制劑、均勻劑、光亮劑、結晶微細化劑、潤濕劑、應力削 減劑、加速劑等。於多數的例子中,通常所使用之不同種 類的添加物具有類似的功能。現今,電子應用裝置中(特別 I 疋製ι積體電路)所使用的溶液包含由二組份二成份封裝 的較簡單的添加物(例如,見2000年6月5·7日所舉行 本紙張尺度適用中國國家標準(CNS) Α4規格(2Κ3Χ297公釐)Vol.146, pages 2540-2545, published by James Ke „y et al. In 1999) and include water, sulfuric acid (H2S04) and small amounts of chloride ions. As is well known, other chemical products are It can be added to the copper plating solution to obtain the desired deposition material. The additives in the copper plating solution can be classified into several types, such as inhibitors, homogenizers, brighteners, crystal micronizers, wetting agents, and stress. Reducers, accelerators, etc. In most cases, different types of additives usually have similar functions. Today, the solutions used in electronic application devices (especially I integrated circuit) contain two Simpler additive with two-component encapsulation (for example, see June 5th, 2000) This paper is sized for China National Standard (CNS) Α4 (2Κ3 × 297 mm)
、可 . (請先閲讀背面之注意事項再填寫本頁) 5 520407 A7 _B7_ 五、發明説明(3), 可. (Please read the notes on the back before filling this page) 5 520407 A7 _B7_ V. Description of the invention (3)
International Interconnect Technology Conference之議項, 第 117-119 頁由 Robert Mikkola 及 Linlin Chen 所發表 “Investigation of the Roles of the Additive Component for Second Generation Copper Electroplating Chemistries used for Advanced Interconnect Metallization”)。該等調配物係 為一般所熟知的抑制劑與加速劑。 抑制劑典型地係為由聚乙二醇-PEG或聚丙二醇-PPG 所調配的聚合物,並咸信其係依附在高電流密度區域的基 板表面,從而形成高阻抗薄膜並抑制材料沈積於該區域 上。加速劑典型地係為有機的二硫化物,其係可增強銅沈 積在基板可吸附之表面部分上。該二種添加物間之相互影 響並且氣化物離子可能決定銅沈積之特性。 下列圖式係用於更加詳細地說明傳統的電沈積方法與 裝置。第1圖係為具有一絕緣體2構成於其上的基板3之橫截 面透視圖。利用傳統的蝕刻技術,特徵(諸如一排小貫穿孔 4a與一寬溝4b)係構成在絕緣體2與基板3上。於此實例中, 貫穿孔4a係為窄的並為深的;換句話說,其係具有高的深 見比(亦即’其之深度與見度之比值係為大的)。典型地, 貫穿孔4a之寬度係為次微米。另一方面,溝4b典型地係為 寬的並且深寬比係為小的。換句話說,溝4b之寬度係比其 之深度大5-50倍或是更大。 第2a-2c圖係圖不用於以銅填注该特徵的一種傳統方 法。第2 a圖係圖示於第1圖中之基板3的橫截面視圖,其係 具有數層沈積其上。例如,此圖係圖示基板3以及沈積於屏 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 6 (請先閲讀背面之注意事項再填寫本頁)International Interconnect Technology Conference, "Investigation of the Roles of the Additive Component for Second Generation Copper Electroplating Chemistries used for Advanced Interconnect Metallization" by Robert Mikkola and Linlin Chen, pp. 117-119). These formulations are commonly known inhibitors and accelerators. The inhibitor is typically a polymer formulated with polyethylene glycol-PEG or polypropylene glycol-PPG, and it is believed that it is attached to the substrate surface in a high current density region, thereby forming a high-resistance film and inhibiting material deposition on the Area. The accelerator is typically an organic disulfide, which enhances the deposition of copper on the surface portion of the substrate that can be adsorbed. The interaction between these two additives and the gaseous ion may determine the characteristics of copper deposition. The following drawings are used to explain the conventional electrodeposition method and apparatus in more detail. Fig. 1 is a cross-sectional perspective view of a substrate 3 having an insulator 2 formed thereon. Using conventional etching techniques, features such as a row of small through holes 4a and a wide groove 4b are formed on the insulator 2 and the substrate 3. In this example, the through hole 4a is narrow and deep; in other words, it has a high insight ratio (that is, the ratio of its depth to visibility is large). Typically, the width of the through hole 4a is sub-micron. On the other hand, the groove 4b is typically wide and the aspect ratio is small. In other words, the width of the groove 4b is 5-50 times or more larger than its depth. Figures 2a-2c are not a traditional method for filling this feature with copper. Figure 2a is a cross-sectional view of the substrate 3 shown in Figure 1, which has several layers deposited thereon. For example, this picture shows the substrate 3 and the sunk screen. The paper size is applicable to China National Standard (CNS) A4 (210X297 mm) 6 (Please read the precautions on the back before filling this page)
520407 A7 _ B7 五、發明説明(4) 障/黏著劑或是黏合層5及一晶粒層6上的絕緣層2。屏障層5 係可為鈕、氮化鈕、鈦、鎢、或是TiW等,或是任何通常 於此領域中所使用之其他材料的結合物。屏障層5 —般係藉 由任何不同的濺鍍法,藉由化學蒸汽沈積(CVD)或是無電 鍵的方法沈積而成。之後,晶粒層6係沈積在屏障層5之上。 晶粒層6材料係可為銅或是銅之替代物,並係可利用不同的 賤鍍法、化學蒸汽沈積(CVD)或是無電鍍沈積或是該等結 合之方法沈積在屏障層5之上。 於第2b圖中,在沈積晶粒層6之後,傳導性材料7(例 如,銅層)一般係自一種適合的酸性或是非酸性的電鍍槽或 是電鍍槽調配物沈積其上。於此步驟當中,一電氣接點係 製於銅晶粒層6及/或屏障層5,因此陰極(負)電壓係可相關 於陽極(未顯示)而施加。之後,如同前述,銅材料7係利用 特別調配的電鑛;谷液電沈積在基板表面上。藉由調整添加 物之量,諸如氣化物離子、抑制劑/抗化劑以及加速劑,係 能夠在小的特徵中達到自下而上之銅薄膜的形成。 銅材料7係完全地填注貫穿孔如,並且在大的溝仆中一 般係為均勻的但是並未完全地填注溝仆,因為所使用的添 加物在大的特徵中係不起作用的。例如,咸信自下而上之 沈積係可進入貫穿孔心中,因為抑制劑/抗化劑分子係依附 在貫穿孔4a之頂部,用以抑制材料形成在那附近。該等分 子並不能有效地擴散至貫穿孔4a之下表面穿過窄的開口: 在貫穿孔4a之下表面上加速劑之較佳的吸附導致在該區域 較快地形成,導致自下而上的形成以及如第2b圖中所示之 張尺度適Ga Η緖準--- (請先閲讀背面之注意事項再填寫本頁)520407 A7 _ B7 V. Description of the invention (4) Barrier / adhesive or adhesive layer 5 and insulating layer 2 on a grain layer 6. The barrier layer 5 may be a button, a nitride button, titanium, tungsten, or TiW, or a combination of any other materials commonly used in this field. The barrier layer 5 is generally deposited by any of various sputtering methods, such as chemical vapor deposition (CVD) or non-electrical bonding. Thereafter, the grain layer 6 is deposited on the barrier layer 5. The material of the grain layer 6 can be copper or a substitute for copper, and can be deposited on the barrier layer 5 by using different base plating methods, chemical vapor deposition (CVD) or electroless deposition or a combination of these methods. on. In Figure 2b, after depositing the grain layer 6, the conductive material 7 (e.g., a copper layer) is generally deposited on a suitable acidic or non-acidic plating bath or plating bath formulation. In this step, an electrical contact is made on the copper die layer 6 and / or the barrier layer 5, so the cathode (negative) voltage can be applied in relation to the anode (not shown). After that, as mentioned above, the copper material 7 is a specially prepared power ore; the valley liquid is electrodeposited on the surface of the substrate. By adjusting the amount of additives, such as gas ions, inhibitors / inhibitors, and accelerators, it is possible to achieve bottom-up copper film formation with small features. Copper material 7 completely fills the through holes, and is generally uniform in large trenches, but not completely filled, because the additives used are ineffective in large features. . For example, the bottom-up deposition system of Xianxin can enter the center of the through-hole, because the inhibitor / inhibitor molecule is attached to the top of the through-hole 4a to inhibit the material from forming there. These molecules cannot effectively diffuse to the lower surface of the through-hole 4a through a narrow opening: better adsorption of the accelerator on the surface below the through-hole 4a results in faster formation in this area, leading to bottom-up The formation of the spheroids as well as the appropriate Zhang scale shown in Figure 2b-(Please read the precautions on the back before filling this page)
Is 520407 A7 ____B7 五、發明説明(5) (請先閲讀背面之注意事項再填寫本頁) 銅沈積的外形。沒有合適的添加物,銅係可以相同的速率 形成在貫穿孔4a之垂直壁以及下表面,從而會產生缺陷, 諸如裂縫及/或空隙。 無法預期的是在大溝4b之下表面上抑制劑與加速劑添 加物的吸附特性,與基板之電場區域8的上表面上之吸附特 性相較有任何不同之差異。因此,在溝扑之下表面上銅之 厚度ti係約與覆蓋在電場區域8上的銅之厚度t2相同。 如同可預期的是以銅材料7完全地填注溝4b,進一步地 係舄要電錢。第2 c圖係圖示在附加之銅電鍍之後的最終構 造。於此例中,覆蓋在電場區域8上銅厚度〇係相對地大, 並且在溝4b中自電場區域8至銅材料7之頂部具有一階梯部 分si。就積體電路應用裝置而言,銅材料7需要接受化學機 械拋光(CMP)或是其他材料之移除加工,因此於電場區域8 中銅材料7以及屏障層5係被移除,從而僅將銅材料7留在特 徵之中。遠專所熟知的移除加工過程係相當耗費成本。 到現在為止,將注意力集中在銅電鍍化學以及電鍍技 術的發展,其係產生自下而上地填注在基板上的小特徵之 中。如上所提及,此係為必需的因為缺乏自下而上地填注 係可致使於小特徵中發生缺陷。如同該等發展中之一部分 所作的貢獻,所發現的是小特徵之填注作用不僅會受到溶 液化學性質的影響,亦會受到用於電沈積之電源類型的影 響。 近年來的研究建議較佳地係使用脈衝或是反向脈衝電 鍍法,用以將無缺陷的銅沈積入小貫穿孔中(例如,於1999 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 8 520407 A7 p—__B7_ 五、發明説明(6) 年10月26曰頒給Dubin等人的美國專利第5,972,192號,以 及Gandikota等人在2000年6月5-7日所舉行International Interconnect Technology Conference 之議項,第 239-241 頁 所發表 “Extension of Copper Plating to 0·13μηι Nodes by Pulse-Modulated Plating”)。於反向脈衝電鏟加工法中,施 加在基板表面上的是陰極電壓脈衝而非陰極直流電壓。在 施加陰極脈衝時經過一段短時間的電鍍之後,電壓之極性 係反向一段短時間,致使自沈積材料的電化學蝕刻。電鍍 與蝕刻循環因而係重複直至小的特徵以高品質之銅加以填 注。近年來的研究(例如,C.H.Hsieh等人在2000年6月5-7 日戶斤舉行 International Interconnect Technology Conference 之議項,第 182-184頁所發表“Film Properties and Surface Profile after Gap Fill of Electrochemically Deposited Cu Film by DC and Pulse Reverse Processes”)係顯示在利用直 流電加工法時,貫穿孔之填注主要地藉由添加物擴散而加 以控制,其中在使用反向脈衝加工法時主要地係藉由添加 物吸附性而加以控制。 如上所說明,在半導體工業方面的注意力主要係集中 在以銅填注在半導體晶圓上之不同的特徵中。直流電與脈 衝電源已在沈積該等銅薄膜時加以利用。所填注入小特徵 中之銅的填注特性係發現為所使用的電源類型之堅定的函 數。儘管電鍍溶液添加物之確切的作用以及與所施加之電 壓波形的反應並非能夠完全地瞭解,但可以明白的是添加 物吸附之動力特性與擴散加工法會影響金屬沈積在非平面 本紙張尺度適用中國國家標準(CNS) A4规格(210X297公釐) 9 (請先閱讀背面之注意事項再填窝本頁) —/ 參- 520407 A7 _B7 _ 五、發明説明(7) 之基板表面上的方式。 如上所述,已發展特別的電鍍槽調配物與脈衝電鍍加 工法用以獲得自下而上地填注小特徵。然而,該等技術在 填注大特徵方面已證實並非有效的。在大特徵中,添加物 係可自由地進出。使用標準的脈衝電鍍技術結合通常所使 用包含氣化物離子、加速劑以及抑制劑/抗化劑之添加物系 統,並不會自特徵之底部表面產生加速形成的作用,其中 特徵的寬度與其之深度相較係相當地大。於該特徵中銅之 形成係為正形的,並且沈積在大特徵之下表面上的薄膜厚 度係大約與沈積在電場區域上之厚度相同。 用以獲得在基板上之小及大的特徵中加速的自下而上 地電鍵的方法與裝置,由於該一加工方法係產生一般為平 面的銅沈積(如第3圖中所示),因此就加工之效率與成本而 論係為不可計量的。於此實例中覆蓋在電場區域8上的銅厚 度t5係小於如第2c圖中所示之傳統實例中的厚度,並且階 梯部分的高度s2同時係更加地小。於第3圖中藉由化學機械 拋光(CMP)或是其他更簡易的方法將薄銅層去除,提供重 要的節省成本。 其他的方法與裝置先前已確認諸如第3圖中所示之電 鍍銅構造之具吸引力之特性。例如,於一PCT申請案中(於 1998年6月25日所提出世界專利申請案WO 98/27585號“於 一積體電路晶片上電鍍的互連構造’’(“Electroplated Interconnection Structures on Integrated Circuit Chips’’)), 來自 International Business Machines Corporation之研究者 本紙張尺度適用中國國家標準(CNS) Α4規格(210X297公釐) 10 (請先閲讀背面之注意事項再填寫本頁) 、?τ— # 520407 A7 I—-— ---------- 57_______ 五、發明説明(8) — 〜 娜述文中所說明之電鍍加工法,當於一傳統的電鍍槽中完 成電鍍時僅有產生次微米尺寸之凹槽之過度的填注。然 而,該文係同時論述當使用一種於1982年7月13日頒給Aig〇 之美國專利第4,339,3 19號中所說明之杯狀電鍍槽時可以 實現進一步的優點。此外,於一杯狀電鍍槽電鍍期間,當 基板表面係維持與電解液之液體凹凸面接觸時,寬度具有 極大差異之凹槽係以相同之速率快速地填注產生與第3圖 中所示之相似的構造。此PCT申請案同時提及液體凹凸面 電鍍法之極佳的性能,係起因於在氣體-液體界面處表面活 性添加物分子之較高的濃度。 I 於案名用於電化學機械沈積之方法與裳置,, ("Method and apparatus for electrochemical mechanical deposition”),序號為〇9/2〇l,928之共審查中的美國專利申 請案中(由本發明之受讓人所共同擁有),所揭露之一種技 術其係能將傳導性材料沈積入基板表面上之凹槽中,同時 | 當有傳導性材料沈積時藉由拋光墊將電場區域拋光,使電 場區域上的沈積減至最小。於此申請案中之電鍍電解液係 供應至介於拋光墊與基板表面間之小間隙中,通過一多孔 的拋光塾或是拋光塾中的粗糙處。 第4圖係顯示一種電化學機械沈積裝置之概略的圖 式,其係可用於在一半導體晶圓上之平面或是非平面的銅 沈積。一承載頭10係支撐一半導體晶圓16並提供一電氣導 線17連接至晶圓16之傳導部分。承載頭1 〇係可相關於一第 一軸10b順時針或是逆時針轉動,並係可在χ、方向上 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) ^ (請先閲讀背面之注意事項再填寫本頁) 訂| 520407 A7 Γ ^~-----— Β7—_ 五、發明説明(9) ^ ~—-- ,。-墊18線配置在一陽極總成19之頂部,墊ΐ8係面向 日日^116。包含電㈣料之電解液2()係利用陽極總成㈡施加 I 在晶圓16表面上。電解液20係可流動通過墊18中之孔/開 口,其係可與晶圓16表面產生實質之接觸。電解液別接著 在晶圓16與墊18間之窄的間隙中流動,最後流動覆蓋塾18 之邊緣進入室22中,在經過清潔/過濾/再磨光之後加以再 循環(未顯示)。一第二電氣導線24係連接至陽極總成19。 任何用於提供電位至陽極總成19與陰極晶圓16之其他熟知 的方法係可於此使用。 陽極總成19同時係可於順時針或是逆時針方向上環繞 著一第二軸10c以受到控制的速度轉動。同時應瞭解的是軸 l〇b及l〇c大體上係為互相平行的。介於晶圓16與墊μ間之 間隙係可藉由在z方向上移動承載頭1〇而加以調整。當晶圓 16之表面與墊18係為接觸時,施加在該二表面上的壓力同 時係可加以調整。於案名“墊設計與用於一種多功能材料加 工裝置的構造”(“Pad Design and Structures f〇r a 心聊仙Is 520407 A7 ____B7 V. Description of the invention (5) (Please read the precautions on the back before filling this page) The outline of the copper deposit. Without suitable additives, copper can be formed on the vertical walls and the lower surface of the through hole 4a at the same rate, so that defects such as cracks and / or voids can be generated. It is not expected that the adsorption characteristics of the inhibitor and accelerator additives on the surface below the large groove 4b are any different from the adsorption characteristics on the upper surface of the electric field region 8 of the substrate. Therefore, the thickness ti of copper on the surface under the trench is about the same as the thickness t2 of copper covering the electric field region 8. As can be expected, the trench 4b is completely filled with the copper material 7, further requiring electricity. Figure 2c shows the final structure after additional copper plating. In this example, the copper thickness 0 covering the electric field region 8 is relatively large, and there is a stepped portion si from the electric field region 8 to the top of the copper material 7 in the trench 4b. In terms of integrated circuit application devices, the copper material 7 needs to undergo chemical mechanical polishing (CMP) or other material removal processing. Therefore, the copper material 7 and the barrier layer 5 are removed in the electric field region 8 so that only the The copper material 7 remains in the feature. The removal process, which is well known in the art, is quite costly. Until now, attention has been focused on the development of copper electroplating chemistry and electroplating technology, which are generated from the small features filled on the substrate from the bottom up. As mentioned above, this is necessary because the lack of bottom-up filling can result in defects in small features. As with the contributions made by some of these developments, it has been found that the filling of small features is affected not only by the chemistry of the solution, but also by the type of power source used for electrodeposition. Recent research suggests that pulsed or reverse pulsed plating is preferred to deposit defect-free copper into small through-holes (for example, in 1999, this paper size was in accordance with the Chinese National Standard (CNS) A4 specification (210X297 (Mm) 8 520407 A7 p —__ B7_ V. Description of the invention (U.S. Patent No. 5,972,192 issued to Dubin et al. On October 26, 2006) and held by Gandikota et al. On June 5-7, 2000 International Interconnect Technology Conference, "Extension of Copper Plating to 0 · 13μηι Nodes by Pulse-Modulated Plating", pages 239-241). In the reverse pulse shovel machining method, a cathode voltage pulse is applied to the substrate surface instead of a cathode DC voltage. After a short period of electroplating when the cathode pulse is applied, the polarity of the voltage is reversed for a short period of time, resulting in electrochemical etching of the self-deposited material. The plating and etching cycles are thus repeated until small features are filled with high-quality copper. In recent years (for example, CHHsieh et al. Held an agenda item of the International Interconnect Technology Conference on June 5-7, 2000, and published "Film Properties and Surface Profile after Gap Fill of Electrochemically Deposited" on pages 182-184. "Cu Film by DC and Pulse Reverse Processes") shows that when using the DC processing method, the filling of the through holes is mainly controlled by the diffusion of additives, and when the reverse pulse processing method is used, it is mainly controlled by the addition of Physical adsorption. As explained above, attention in the semiconductor industry has focused primarily on the different features of the semiconductor wafers filled with copper. DC power and pulse power have been used when these copper films were deposited. The filling characteristics of copper in the filled injection features are found to be a firm function of the type of power source used. Although the exact role of the additives in the plating solution and the reaction to the applied voltage waveform are not fully understood, it can be understood that the kinetic properties of the additives and the diffusion processing method will affect the metal deposition on non-planar paper. China National Standard (CNS) A4 specification (210X297 mm) 9 (Please read the precautions on the back before filling in this page) — / ref-520407 A7 _B7 _ V. Method on the substrate surface of the invention description (7). As mentioned above, special plating bath formulations and pulse plating processes have been developed to obtain bottom-to-bottom fill small features. However, these techniques have proven to be ineffective in filling large features. In the large feature, the additive system can be moved in and out freely. The use of standard pulse electroplating technology combined with commonly used additive systems containing gaseous ions, accelerators and inhibitors / inhibitors does not accelerate the formation of features from the bottom surface of the feature, where the width of the feature and its depth The comparison is quite large. The formation of copper in this feature is regular, and the thickness of the film deposited on the surface below the large feature is approximately the same as the thickness deposited on the electric field region. Method and device for obtaining bottom-to-ground electrical keys accelerated in small and large features on a substrate. Since this processing method produces a generally planar copper deposit (as shown in Figure 3), The efficiency and cost of processing are immeasurable. The thickness t5 of the copper covering the electric field region 8 in this example is smaller than that in the conventional example shown in Fig. 2c, and the height s2 of the step portion is also smaller at the same time. In Figure 3, the thin copper layer is removed by chemical mechanical polishing (CMP) or other simpler methods, providing important cost savings. Other methods and devices have previously identified attractive features such as the copper-plated construction shown in Figure 3. For example, in a PCT application (World Patent Application No. WO 98/27585 filed on June 25, 1998 "Electroplated Interconnection Structures on Integrated Circuit" Chips '')), a researcher from International Business Machines Corporation This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) 10 (Please read the precautions on the back before filling this page),? Τ— # 520407 A7 I —-— ---------- 57_______ V. Description of the Invention (8) — ~ The electroplating process described in the article is only produced when electroplating is completed in a traditional plating bath. Overfilling of sub-micron-sized grooves. However, the article also discusses that further advantages can be achieved when using a cup-shaped plating bath as described in U.S. Patent No. 4,339,3 19 issued to Aig0 on July 13, 1982. In addition, during the plating of a cup-shaped plating bath, when the substrate surface is maintained in contact with the liquid concave-convex surface of the electrolyte, the grooves having a wide difference in width are rapidly filled at the same rate to produce the same as shown in FIG. 3 Similar construction. This PCT application also mentions the excellent performance of the liquid embossed surface plating method due to the higher concentration of surface active additive molecules at the gas-liquid interface. I in the method and apparatus for electrochemical mechanical deposition (" Method and apparatus for electrochemical mechanical deposition "), No. 09/2 / l, 928 co-examined US patent application (Co-owned by the assignee of the present invention), a technique disclosed is capable of depositing a conductive material into a groove on the surface of a substrate, and at the same time | when a conductive material is deposited, the electric field region is polished by a polishing pad Polishing to minimize deposition on the electric field area. The electroplating electrolyte in this application is supplied into a small gap between the polishing pad and the surface of the substrate, through a porous polishing pad or a polishing pad. Roughness. Figure 4 shows a schematic diagram of an electrochemical mechanical deposition device, which can be used for planar or non-planar copper deposition on a semiconductor wafer. A carrier head 10 supports a semiconductor wafer 16 An electrical wire 17 is provided to connect to the conductive part of the wafer 16. The carrier head 10 can be rotated clockwise or counterclockwise with respect to a first axis 10b, and the paper can be rotated in the χ and direction. Standards are applicable to China National Standard (CNS) A4 specifications (210X297 mm) ^ (Please read the notes on the back before filling this page) Order | 520407 A7 Γ ^ ~ -----— Β7—_ V. Description of the invention ( 9) ^ ~ ---, .- The pad 18 wire is arranged on top of an anode assembly 19, the pad 8 is facing the day ^ 116. The electrolyte containing the electric material 2 () is applied with the anode assembly I On the surface of the wafer 16. The electrolyte 20 can flow through the holes / openings in the pad 18, and it can make substantial contact with the surface of the wafer 16. The electrolyte does not continue in the narrow space between the wafer 16 and the pad 18. Flow in the gap, and finally the edge covering the 塾 18 enters the chamber 22 and is recycled after cleaning / filtering / repolishing (not shown). A second electrical lead 24 is connected to the anode assembly 19. Any use Other well-known methods for supplying potential to the anode assembly 19 and the cathode wafer 16 can be used here. The anode assembly 19 can be controlled in a clockwise or counterclockwise direction around a second axis 10c to be controlled. It should also be understood that the axes 10b and 10c are generally parallel to each other. The gap between the wafer 16 and the pad μ can be adjusted by moving the carrier head 10 in the z direction. When the surface of the wafer 16 and the pad 18 are in contact, the pressure on the two surfaces is applied At the same time, it can be adjusted. In the case name "Pad Design and Structures for a Multifunctional Material Processing Device" ("Pad Design and Structures f〇ra
Materials Processing Apparatus”),在 2000年 2 月 23 日提出申 請序號為09/511,278之共審查中的美國專利申請案中,係 說明墊18中孔的不同形狀與形式,電解液流動通過該孔流 至晶圓表面。 於操作當中,在連接至晶圓16之電氣導線17與連接至 陽極總成19的電氣導線24之間施以電位,致使晶圓16表面 較陽極總成19更為陰極化。電解液2〇係可自座落在接近陽 極總成19的一儲存槽(未顯示)中引至墊18。陽極總成19其 本紙張尺度適财關家鮮(CNS) A4規格⑵0X297公釐)~~Materials Processing Apparatus "), in a co-examined U.S. patent application filed on February 23, 2000 with application number 09 / 511,278, describes the different shapes and forms of the holes in the pad 18, and the electrolyte flows through the The holes flow to the surface of the wafer. During operation, a potential is applied between the electrical lead 17 connected to the wafer 16 and the electrical lead 24 connected to the anode assembly 19, so that the surface of the wafer 16 is more than the anode assembly 19. Cathodic. The electrolyte 20 can be led to the mat 18 from a storage tank (not shown) located close to the anode assembly 19. The anode assembly 19 has a paper size that is suitable for household use (CNS) A4 specifications ⑵0X297 mm) ~~
----- (請先閲讀背面之注意事項再填寫本頁) 、盯I 参- 520407----- (Please read the precautions on the back before filling in this page), stare at I-520407
中係可製有内通道及孔’二者一同為電解液2〇提供一路徑 進料至介於塾18與晶圓16之間的間隙。 .....J-------------0^----- (請先閲讀背面之注意事項再填寫本頁) 在施以電位下,銅由電解液2〇電鍍在晶圓16表面上。 移動塾18係靠著晶圓16表面以_受控制的壓力推動,其係 藉由拋光晶圓16表面之特定的部分而使覆蓋在該特定部分 的銅聚積物減至最少。 墊18係較佳地為非傳導性的、硬質的、多孔的、或是 有排孔類型的材料’因此電場係可通過塾18,同時可預防 陽極總成19與陰極晶圓16之間發生短路。介於塾18與陰極 晶圓16之間的間隔或間隙其之範圍係可自小於i微米到㉛ 米。塾18與晶圓16的直徑或橫截面長度其之範圍係約從5 .訂— 厘米到超過300厘#。晶圓16的直徑越大,則塾㈣直徑亦 越大。 發明之概要說明 夢 本發明之-目標在於提供一種方法與裝置,其係將一 傳導材料以高度所期望的方式電鍍在一基板表面上。 本發明之另-目標在於提供一種方法與裝置其係將 一傳導材料以較習知技藝之方法與裝置為更具效率、節省 成本並具極佳品質的方式,將一傳導材料電鍵在_基板表 面的大及小的特徵中。 本發明之進-步目標在於提供一種方法與裝置,其係 利用-種其中具有-或以上之開口的遮罩將—傳導材料電 鍍在一基板表面的大及小的特徵中。 本發明尚有的另-目標在於提供一種方法與裝置,其 本紙張尺度適用中國國家標準(CNS) A4規格(2WX297公釐·) 13 五、發明説明(11) 、的特徵中,同時由於遮罩中 電力係局部地在基板表面產 係將一傳導材料電鍍在大及4 之開口相關於基板表面移動, 生脈衝。 本發明之進一步目標在於提供-種方法與裝置,為了 增強將-傳導材料電鑛在卫作件之凹槽特徵表面部分上, 而該工作件並未事先將吸附的添加物去除,將已事先吸附 在一工作件之頂部表面部分上的添加物去除。 本發明尚有的另一目標在於-工作件之上表面及凹槽 部分内所吸附之添加物之間產生差異,用以增強將—傳導 材料電鍍在工作件之凹槽部分中。 本發明之進一步目標在於能夠利用一與工作件間隔開 地配置的遮罩,循環地將已衫為工作件之上表面部分所 吸附的添加物加以去除,並接著將—傳導材料電鑛在一工 作件之凹槽特徵表面部分而遮罩不與在工作件上之任一點 接觸’因此以較在工作件之上表面的任何電鍍為高的速率 在凹槽部分内電鑛。 本發明之進-步目標在於能夠利用—與工作件間隔開 地配置的遮罩,在不施以電力至卫作件表面時循環地將已 事先為工作件之上表面部分所吸附的添加物加以去除,並 接著將一傳導材料電鍍在一工作件上。 本發明之進-步目標在於一工作件之上表面及凹槽部 分之内所吸附之添加物之間產生差異’使用外部感應不直 接與工作件作實質地接觸用以增強將—傳導材肖電鑛在工 作件之凹槽部分中。 520407 A7 j—---——________ B7__ 五、發明説明(U) ^~ ' 树明之上述的目標、以及其他藉由本發明所達成之 I獨存在H是相結合的目標,其係在於提供_種裝置以 及一種方法用於將一傳導材料電鍍在一工作件之表面上。 力該等方法的其中一觀點,將具有至少一種添加物沈 冑其中的電解液施加涵蓋於工作件,以致添加物係可為工 料之上表面以及凹槽部分所吸附。施加外部感應因此將 I作件之上表面所吸附的添加物去除,並在添加物在被上 冑分完全地再吸附之前開始魏傳導材料,從而導致相對 於上部分之凹槽部分的較大電鍍性。 料方法的另一觀點,將具有至少一種添加物沈積其 巾的電解液施加涵蓋於卫作件,以致添加物係可為工作件 《上部分以及凹槽部分所吸附。施以_外部感應因此可以 獲得上部分相對於凹槽部分所吸附之添加物量的差異。電 Μ執行的同時差異性仍然存在,從而導致凹槽部分相 上部分的較大電鍍性。 ; 於該等裝置的其中一觀點,配置在一陽極與工作件間 | 的一遮罩相關於工作件係可移動的其係實質上掃除工作^ 之上部分,從而減少其上所吸附的添加物,同時於凹槽部 分上所吸附的添加物仍然留存。陽極係有助於在其與工作 件間產生一電場欲於提升配置覆蓋在工作件上之電解液内 的導體的電鍍性。 於该等裝置的另-觀點,遮罩係包含一開孔的區域其 係有助於定出電場存在的位置,因此容許更Α的控制涵蓋 於工作件上執行電鍍的位置。 本紙張尺度適财關緒準(CNS) Α4規格⑵GX297公楚〉 ------ • 15 -The middle system can be made with both internal channels and holes' to provide a path for the electrolyte 20 to feed into the gap between 塾 18 and wafer 16. ..... J ------------- 0 ^ ----- (Please read the precautions on the back before filling this page) Under the application of potential, copper is made of electrolyte 2 O Plating on the surface of the wafer 16. The moving roller 18 is pushed against the surface of the wafer 16 under a controlled pressure, and it minimizes the copper accumulation covering the specific portion by polishing a specific portion of the surface of the wafer 16. The pad 18 is preferably of a non-conductive, rigid, porous, or perforated type. Therefore, the electric field can pass through the 塾 18, and at the same time, it can prevent the anode assembly 19 and the cathode wafer 16 from occurring. Short circuit. The interval or gap between 塾 18 and cathode wafer 16 can range from less than i micrometer to ㉛m. The diameter or cross-sectional length of 18 and wafer 16 ranges from about 5.0 cm to more than 300 centimeters #. The larger the diameter of the wafer 16, the larger the diameter of the cymbal. SUMMARY OF THE INVENTION Dream The object of the present invention is to provide a method and apparatus for electroplating a conductive material on a substrate surface in a highly desired manner. Another object of the present invention is to provide a method and device for electrically conducting a conductive material on a substrate by using a conductive material in a more efficient, cost-saving, and excellent quality manner than a conventional method and device. Large and small features of the surface. A further object of the present invention is to provide a method and device for electroplating a conductive material into large and small features on the surface of a substrate using a mask having openings therein or more. Another object of the present invention is to provide a method and device, the paper size of which is applicable to the Chinese National Standard (CNS) A4 specification (2WX297 mm ·). 13 V. Features of the invention (11) The electric power in the cover is locally generated on the substrate surface by plating a conductive material on the opening of the substrate, and the pulse is generated by the surface of the substrate. A further object of the present invention is to provide a method and a device for enhancing the electro-mineralization of the conductive material on the characteristic surface portion of the groove of the work piece, and the work piece has not removed the adsorbed additives in advance, and will have Additives adsorbed on the top surface portion of a work piece are removed. Another object of the present invention is to create a difference between the additives adsorbed on the upper surface of the work piece and the groove portion to enhance the electroplating of the conductive material in the groove portion of the work piece. A further object of the present invention is to be able to use a mask disposed at a distance from the work piece to remove the adsorbed material which has been adsorbed on the upper surface part of the work piece in a cycle, and then to deposit the conductive material electric The groove features the surface portion of the work piece and the mask does not come into contact with any point on the work piece ', so the power is electro-deposited in the groove portion at a higher rate than any plating on the surface above the work piece. A further objective of the present invention is to be able to use a mask arranged at a distance from the work piece to cyclically add the additives previously adsorbed on the upper surface portion of the work piece without applying electricity to the surface of the work piece. It is removed, and then a conductive material is plated on a work piece. The further objective of the present invention is to create a difference between the additives adsorbed on the upper surface of a work piece and within the groove portion. 'The use of external induction does not directly make physical contact with the work piece to enhance the conductive material. The power ore is in the groove part of the work piece. 520407 A7 j —---——________ B7__ V. Description of the Invention (U) ^ ~ 'The above objectives of Shuming, and other I-existent H achieved by the present invention are combined objectives, which are to provide _ A device and a method for electroplating a conductive material on the surface of a work piece. In one aspect of these methods, an electrolyte having at least one additive deposited therein is applied to the work piece, so that the additive system can be adsorbed on the upper surface of the material and the groove portion. The external induction is applied so that the additives adsorbed on the upper surface of the workpiece I are removed, and the conductive material starts to be conductive before the additives are completely re-adsorbed by the upper part, thereby resulting in a relatively large groove portion relative to the upper part. Plating. Another aspect of the feed method is to apply the electrolyte solution having at least one additive deposited on the towel, so that the additive system can be absorbed by the upper part and the groove part of the work piece. By applying external sensing, it is possible to obtain the difference in the amount of the additive adsorbed on the upper part relative to the groove part. At the same time, the difference still exists in the implementation of the electromigration, resulting in greater electroplatability of the upper part of the groove part. ; In one aspect of these devices, a mask disposed between an anode and the work piece | is related to the work piece system being movable, which substantially sweeps the upper part of the work ^, thereby reducing the added adsorption on it. At the same time, the additives adsorbed on the groove part still remain. The anode system helps to generate an electric field between the anode and the work piece in order to improve the electroplating property of the conductor disposed in the electrolyte covering the work piece. In another aspect of these devices, the mask contains a region of openings, which helps to determine where the electric field exists, and thus allows more A control to be included in the position where the plating is performed on the work piece. The paper size is suitable for financial and economic standards (CNS) Α4 size ⑵GX297 Gongchu> ------ • 15-
、一叮| (請先閲讀背面之注意事項再填寫本頁) # 520407 五 A7 B7 、發明説明(〇 於。亥荨方法的另一觀點,將具有至少一種添加物沈積 其中的電解液施加涵蓋於工作件,以致添加物係可為工作 件之上部分以及凹槽部分所吸附。利用一遮罩施以一外部 感應,該遮罩係與工作件之上表面間隔開接近但不接觸, Π寺工作件與遮罩彼此相對移動因此上表面所吸附的添加 物被移除,或者以別的方法相關於工作件之凹槽表面上的 添加物加以變換。在添加物完全地被上表面再吸附之前接 、、另地執行傳導材料的電鍵,從而導致凹槽部分相對於上部 分的較大電鍍性。 义簡要說明 本發明之該等以及其他的目標與優點,其係可由以下 對於本發明之目前較佳的示範具體實施例所作的詳細說明 並結合所伴隨之圖式,將變得更為顯而易見並係可更容易 地察知,其中: 第1圖係為一基板之橫截面的透視圖,該基板上具有一 絕緣體層以及不同之特徵; 第2a-2c圖係為一種傳統方法的橫截面視圖,該法係用 於將一傳導性材料沈積在第1圖之基板上; 第3圖係為一基板的橫截面視圖,根據另一傳統方法將 一傳導性材料沈積在該基板上; 第4圖係為一種電化學機械沈積裝置之一實例; 第5圖係為一種傳統的電鍍槽,其中配置具有一陽極、 陰極以及電解液; 第6圖係為本發明之較佳具體實施例的一種裝置之部 本紙張尺度適用中國國蓼標準(QsfS〉A4规格(210X297公釐), 一 叮 | (Please read the precautions on the back before filling this page) # 520407 Five A7 B7 、 Explanation of the invention (〇 于. Another aspect of the Haixu method is to apply the electrolyte with at least one additive deposited in it. To the work piece, so that the additive system can be absorbed by the upper part of the work piece and the groove portion. An external induction is applied by a mask, which is spaced close to but not in contact with the upper surface of the work piece. Π The temple work piece and the mask move relative to each other, so the additives adsorbed on the upper surface are removed, or the related additions on the groove surface of the work piece are changed by other methods. The additives are completely replaced by the upper surface. The electric bond of the conductive material is performed before and after the adsorption, which results in a larger electroplating property of the groove portion relative to the upper portion. The meaning and other objects and advantages of the present invention are briefly explained by the following for the present invention. The detailed description of the presently preferred exemplary embodiments in combination with the accompanying drawings will become more obvious and more easily known, of which: Figure 1 is a perspective view of the cross-section of a substrate with an insulator layer and different features; Figures 2a-2c are cross-sectional views of a traditional method used to apply a conductive material Deposited on the substrate of Figure 1; Figure 3 is a cross-sectional view of a substrate, and a conductive material is deposited on the substrate according to another conventional method; Figure 4 is one of an electrochemical mechanical deposition device Example: Figure 5 is a traditional electroplating tank, which is equipped with an anode, a cathode, and an electrolyte; Figure 6 is a part of a device according to a preferred embodiment of the present invention. (QsfS> A4 specifications (210X297 mm)
4 ^ ----- (請先閲讀背面之注意事項再填寫本頁) 訂— 16 - 五、發明説明(Θ 分的視圖; 第7a-7d圖係為本發明之較佳具體實施㈣—種遮罩 脈衝電鍍法; 第7e圖係為一圖表其係與本發明之較佳具體實施例的 第7a-7d圖相對應; 第8圖係為根據本發明之第一較佳具體實施例的一種 裝置之透視圖; 第9圖係為根據本發明之第二較佳具體實施例的一種 裝置之透視圖;及 第10圖係為根據本發明之第三較佳具體實施例的一種 裝置之側視圖。 較佳具體實施例的詳鈿_明_ 現將相關於以下的圖式對本發明之較佳的具體實施例 詳加說明。本發明之發明者已發現藉由遮罩脈衝方式將傳 導性材料電鍍在基板表面上,而更多令人滿意的並具高品 質的傳導性材料係可沈積在其中之不同的特徵中。 本發明係可與任何基板一同使用,諸如半導體晶圓, 平坦式電路板、磁性薄膜頭、封裝基板以及類似物。再者, 特定的加工參數,諸如於此所提供之時間、壓力、遮罩設 計以及類似之參數,該等特定之參數係期望為示範性而非 欲加以限定。 於此所說明的電鍍方法即所謂的“遮罩_脈衝,,電鍍 法。本發明係說明用於將傳導性材料以遮罩_脈衝電鍍在基 板上的一種方法與裝置,其係藉由間歇地移動遮罩使與基 五、發明説明(4 板表面接觸並將電力施加於陽極與基板之間,而遮罩係配 在陽極,、基板之間。再者,本發明係針對新穎的電鑛法 與裝置,錢提供傳㈣㈣之增㈣電沈積進人基板表 面上之不同的特徵之中。 第5圖係圖示-電_3G’其中係具有—陽極31、一陰 "2以及電解液33。應注意的是電鍍槽3()係為—種傳統 式的電鍍槽,而本發明中所使用之電鍍槽的確切幾何形狀 係可加以變化。電解液33係與陰極32之上表面接觸。於此 實例中所提供之陰極32係為—晶圓(基板),在其之上表面 上具有不同的特徵。當在晶圓32與陽極31之間施以直流或 脈衝電壓時’電解液中之銅係沈積在上述之晶圓32上。介 於直流或脈衝電力間的差異係決定了填注在小特徵中之銅 的品質。 第6圖係圖示本發明之一較佳的具體實施例。於本發明 中,遮罩40係配置在緊密地接近陰極晶圓32的位置其中遮 罩40包括一開口42,電解液33係通過該開口而與晶圓32之 部份產生實質上的接觸。為了能夠簡單地瞭解與解釋, 第6圖並未圖示電氣連接裝置、陽極、以及包含電解液μ 的電鑛槽。當於陰極晶圓32與陽極之間施以一適當之電 壓,開口42係容許電解液33中之銅電鍍至基板32(其係位在 開口 42的正下方)之表面上。假若遮罩4〇使與陰極晶圓32 作實質上的接觸,因此電鍍主要地限制在位在開口 42正下 方的基板區域上。當遮罩40係以側邊至側邊移動的方式(如 圖中箭頭43所指示)移動時,通過在晶圓表面上之一部份的 520407 A7 B7 五、發明説明(1$ 電流係會改變。之後將對此作更詳盡的說明。 第7a_7d圖係圖示一種根據本發明之較佳具體實施例 的遮罩脈衝電鍍法。遮罩4〇係相關於陰極晶圓32移至左側 (或是可交替地,晶圓32係可移至右侧,或是遮罩4〇與晶圓 32二者係可彼此相對移動)。於第7a圖中,在時間卜、時, 晶圓32表面上的一部份45係配置在具電氣絕緣的遮罩4〇之 下方,並且其係不直接暴露至電解液中。因此,在t= q時 於部份45處之電鍍電流係非常地小或是接近於零,如第乃 圖中之圖表所圖示。第7e圖之圖表係圖示在部分45處沈積/ 電鍍電流與時間的關係。 於第7b圖中’移動遮罩4〇及/或晶圓32以致開口 42係位 在部分45之上方’在t=t2時於部份45處之電鍍電流在開口 42與部分45對齊時突然地增加。於第7c圖中,高電流依然 穩定直到t=h為止。之後,當部分45係再次配置在遮罩4〇 之非開孔部分的下方(如第7d圖中所示),電流密度係再次 變得非常小或是接近於零。 回顧第7e圖,時間間隔At(介於(2與13間的時間)係為遮 罩40之速度以及開口 42之尺寸的函數。此外,假若遮罩4〇 係相關於晶圓32快速地移動則△ t係為一非常小的數值。同 時,假若在遮罩40中係為多重開口或者是遮罩4〇係前後地 移動,因此所描繪的對應電流對時間的圖式係由多重脈衝 所組成。藉由控制遮罩40上開口的尺寸以及基板與遮罩的 相對速度,則位在基板上任何部分處電流脈衝的形狀、持 續期間與重複率係可加以控制。 19 (請先閲讀背面之注意事項再填寫本頁) .訂丨 本紙張尺度適用申國國家標準(CNS〉A4规格(210X297公釐〉 520407 A7 B7 五、發明説明(〇 如同上述實例中所見,直流電源係可於此電鍍技術中 加以使用。藉由將實體的絕緣遮罩4〇移開,係可致使與晶 圓32產生實質的接觸,任何位在晶圓表面上的部分係可突 然地並且簡短地暴露在電解液中以及所施加之電鍍電流。 如此係與以上所述之習知技藝大大地不同。例如,於本發 明中,晶圓表面之特定的部分大體上係沒有電解液。僅有 在該部分暴露在電解液時才有電解液施加在晶圓之該部 分,以及同時地施以一電流脈衝。 假若電流遮罩-脈衝電鍍法係使用無添加物(亦即,抗 化劑與加速劑)之純粹的金屬沈積電解液,則所期待的結果 與傳統的電鍍法沒有太大的不同。如此係因為遮罩4〇中之 開口 42的尺寸係遠大於晶圓32表面上之特徵的尺寸。因 此’當該一部份係暴露通過開口 42至電解液中,開始標準 的電鍍。然而,假若添加物係可增添感應極性,因而遮罩_ 脈衝電鍍法係可提供在傳統的脈衝電鍍技術中目前所沒有 的優點。 例如,考量一種銅電鍍槽其係包含傳統的溶液/化學製 品(硫化銅、水、硫酸以及氣化物離子)以及一種添加物A。 添加物A在其為晶圓表面所吸附時係可強化沈積。當此電 解液係在傳統的電解槽中使用時(諸如第5圖中所示),晶圓 32之整個表面係暴露至電解液與添加物a。晶圓表面上之 電場區域以及大特徵之下表面係同樣地吸附添加物A,並 以相當的速率在該等表面上開始電鍍。 然而’假右遮罩-脈衝電鑛技術係使用相同的電解液, 本紙張尺度適用中國國家標準(CNS) Α4規格(210X297公楚) 20 (請先閲讀背面之注意事項再填寫本頁) .訂| 520407 A7 —1 _B7 五、發明説明(1今 遮罩係使添加物A自電場區域散開,因其使與該等區域發 生實質的接觸。然而,小及大特徵仍然包含所吸附的添加 物A ’因為該等特徵並未直接與遮罩實質接觸。當晶圓之 一部分係突然地暴露至電解液中時,帶有先前所吸附的添 加物A之特徵的下表面與側表面會以較電場區域為高的速 率立即開始電鍍。假若時間週期At係小於添加物A自身依 附在基板表面所需之吸附週期時,所施加之電鍍電流係較 佳地流經待填注之特徵,從而在特徵内相關於在電場區域 上的沈積率產生一增強的沈積率。 本發明之遮罩-脈衝電鍍法係利用介於不同添加物間 之反應時間用以獲得增強的電鍍進入基板表面之不同的特 徵中。機構包括基板之上表面(電場區域)藉由遮罩的“清 除”,其並未使與特徵内部之區域實質地接觸。在電場區域 上清除的動作建立了在該等受到清除之區域中與特徵中之 區域間所吸附種類的濃度之差異。當表面因而係突然地暴 露至電解液與電場中時,帶有所吸附種類的特徵自電場區 域中吸引了大部分的電鍍電流。 本方法使用複合之添加物同樣地係可良好地作業。例 如,假若電鍍溶液包含一抗化劑B與一加速劑c,抗化劑之 吸附動力特性係較加速劑來得更加快速,以下的機構係可 藉由遮罩_脈衝電鍍法加以使用。抗化劑B與加速劑c二者 部分地或是完全地藉由遮罩清除基板的電場區域。然而, 二種類仍然存在於特徵中。當基板係暴露在電解液與電場 中時,抗化劑B會立即地為電場區域所吸附,引致一用於 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公复) -------4------4----------- (請先閱讀背面之注意事項再填寫本頁) 、tr- 21 520407 A7 五、發明說明(0 電鍍電流的高阻抗路徑。已經存在於特徵中的加速劑c係 補仏抗化劑B在該等區域中的作用,並且電流係可輕易地 流經該等特徵。因此,直到加速劑c係可適當地為電場區 域所吸附,特徵中之薄膜形成率會較高。 在尚有的另一種化學製品係可獲得相同的結果,該化 學製品中的一種抗化劑D具有強勁吸附力的特性以及一種 加速劑E其與電場區域之結合力係為薄弱的。於此例子 中,遮罩係可輕易地自電場區域將結合力薄弱的加速劑E 移除’然而加速劑E依然依附在特徵内的表面上。一經暴 露至電解液與電場中,電鍍電流流經特徵較佳地直到加速 劑E再次開始為電場區域所吸附為止。 應/主思的是上述之說明僅是包含於本發明中之機構的 些貫例並且不希望被加以限定。本發明係利用不同之電 解液添加物間的吸附/去吸附動力特性的差異。本發明係藉 由將溶液與電力突然地並同時地施加至基板表面,已事先 部分或是全部地清除一或更多種添加物種類的一特定部分 而完成此項特性。 第6圖中所示電鍍系統的幾何形狀係極為簡化。有數種 可行的設計係可用於實踐本發明。本發明之一些重要的觀 點係為以下所述: (1)當使用一晶圓係為平坦的則遮罩係需為平坦的。遮 罩係需以一種絕緣的剛性材料製成,並且面向晶圓的表面 係可為硬質且甚至包含研磨料係有助於更有效率地清除添 加物。 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 4------.-----'0^…… (請先閲讀背面之注意事項再填寫本頁) ·# 22 520407 A7 _____ B7 五、發明説明(Μ (2) 介於晶圓與遮罩間應具有相對移動。晶圓、遮罩或 是二者係可以線性的或是轨道的方式或是二者結合的方式 移動。 (3) 在遮罩與晶圓表面間大體上應不具電解液。晶圓表 面應僅通過遮罩中之開口而暴露至電解液中。 (4) 遮罩中之開口的尺寸以及遮罩與晶圓間之相對運 動的速度以致晶圓上的任何部分應僅有短暫地暴露至電解 液中,典型地少於二秒而較佳地少於一秒,例如1〇_5〇〇 msec·。此時間間隔應相關於所使用之添加物的吸附特性加 以調整。 第8圖係為本發明之第一較佳具體實施例的一種裝置 的透視圖。於第8圖中,遮罩8〇與一電解液通道板3〇〇係安 裝在一陽極總成90上。電解液100係藉由一傳統的泵送系統 (未顯示)供應至陽極總成90。電解液1〇〇係泵送經由孔21〇 進入通道板300中之通道310。於作動當中,基板/陰極係配 置面向遮罩80的上表面,並且基板及/或遮罩8〇係為轉動 的。基板係可在範圍為0.01 psi至0 5 psi的壓力下靠著遮罩 80被推動。可以使用較高的壓力但並非為必需的。假若遮 罩80係為轉動的,則整個陽極總成9〇係可同樣地轉動。一 陰極電壓係相關於配置在陽極總成9〇内的一陽極(未顯示) 而施加至基板(未顯示)。電解液1 〇〇流經通道3 1 〇經過遮罩 80中之開口 250而與晶圓表面作實質地接觸。電解液1〇〇係 連續地自小流出孔320排出並接受過濾與再循環。於作動期 間假若任何電解液實際地進入遮罩8〇與晶圓表面間之界 本紙張尺度適用中國國家標準(CNS) A4規格(2】0X297公釐) 23 (請先閲讀背面之注意事項再填寫本頁)4 ^ ----- (Please read the notes on the back before filling out this page) Order — 16-V. Description of the invention (the view of Θ points; Figures 7a-7d are the preferred specific implementation of the invention ㈣— A mask pulse plating method; Figure 7e is a chart corresponding to Figures 7a-7d of the preferred embodiment of the present invention; Figure 8 is a first preferred embodiment of the present invention Perspective view of a device according to the invention; FIG. 9 is a perspective view of a device according to a second preferred embodiment of the invention; and FIG. 10 is a device according to a third preferred embodiment of the invention The side view of the preferred embodiment. Detailed description of the preferred embodiment. The preferred embodiment of the present invention will now be described in detail in relation to the following drawings. The inventor of the present invention has found that The conductive material is plated on the surface of the substrate, and more satisfactory and high-quality conductive materials can be deposited in different features. The present invention can be used with any substrate, such as a semiconductor wafer, Flat circuit board, magnetic film head, seal Substrates and the like. Furthermore, specific processing parameters, such as the time, pressure, mask design, and similar parameters provided herein, are intended to be exemplary rather than limiting. The illustrated plating method is a so-called "mask_pulse, plating method. The present invention describes a method and apparatus for plating a conductive material with a mask_pulse on a substrate by moving the mask intermittently. The cover is in contact with the substrate and the invention description (4) and the electric power is applied between the anode and the substrate, and the cover is provided between the anode and the substrate. Furthermore, the present invention is directed to the novel electric mining method and The device provides money to increase the transmission rate of the electrodeposited into the different features on the surface of the human substrate. Figure 5 is a diagram-electrical_3G 'which has-anode 31, an anion " 2 and an electrolyte 33 It should be noted that the plating tank 3 () is a conventional plating tank, and the exact geometry of the plating tank used in the present invention can be changed. The electrolyte 33 is in contact with the upper surface of the cathode 32. In this example The provided cathode 32 is a wafer (substrate) with different characteristics on its upper surface. When a DC or pulse voltage is applied between the wafer 32 and the anode 31, the copper in the electrolyte is deposited on The wafer 32 described above. The difference between DC or pulsed power determines the quality of copper filled in small features. Figure 6 illustrates a preferred embodiment of the present invention. In the present invention In the embodiment, the mask 40 is arranged close to the cathode wafer 32. The mask 40 includes an opening 42 through which the electrolyte 33 makes substantial contact with a portion of the wafer 32. In order to be simple To understand and explain, FIG. 6 does not show the electrical connection device, the anode, and the electric ore tank containing the electrolyte μ. When an appropriate voltage is applied between the cathode wafer 32 and the anode, the opening 42 allows electrolysis The copper in the liquid 33 is plated on the surface of the substrate 32 (which is located directly below the opening 42). If the mask 40 makes substantial contact with the cathode wafer 32, the plating is mainly limited to the substrate area located directly below the opening 42. When the mask 40 moves side-to-side (as indicated by arrow 43 in the figure), it passes through a part of the surface of the wafer 520407 A7 B7 V. Invention description (1 $ current system will Changes. This will be explained in more detail later. Figures 7a-7d illustrate a mask pulse plating method according to a preferred embodiment of the present invention. Mask 40 is related to the cathode wafer 32 moved to the left ( (Alternatively, the wafer 32 can be moved to the right, or both the mask 40 and the wafer 32 can be moved relative to each other.) In Figure 7a, the wafer 32 is at time B, A part 45 on the surface is arranged under the electrically insulating cover 40, and it is not directly exposed to the electrolyte. Therefore, the plating current at part 45 at t = q is very Small or close to zero, as shown in the graph in the figure. The graph in figure 7e illustrates the relationship between deposition / plating current and time at section 45. In Figure 7b, 'moving mask 4o' And / or the wafer 32 so that the opening 42 is located above the portion 45 ', at t = t2, the plating current at the portion 45 is at the opening 42 increases suddenly when it is aligned with part 45. In Figure 7c, the high current is still stable until t = h. After that, when part 45 is placed under the non-opening part of the mask 40 again (such as part 7d) As shown in the figure), the current density becomes very small or close to zero again. Looking back at Fig. 7e, the time interval At (time between (2 and 13)) is the speed of the mask 40 and the opening 42 A function of the size. In addition, if the mask 40 is related to the rapid movement of the wafer 32, Δt is a very small value. At the same time, if the mask 40 is a multiple opening or the mask 40 is It moves back and forth, so the pattern of current corresponding to time is composed of multiple pulses. By controlling the size of the opening on the mask 40 and the relative speed of the substrate and the mask, the current is located at any part of the substrate The shape, duration, and repetition rate of the pulse can be controlled. 19 (Please read the precautions on the back before filling this page). Ordering 丨 This paper size applies to the national standard of China (CNS> A4 specification (210X297 mm> 520407) A7 B7 V. Description of Invention (〇 As seen in the above example, a DC power supply can be used in this electroplating technology. By removing the solid insulation mask 40, it can cause substantial contact with the wafer 32, and any location on the wafer The part on the surface can be suddenly and briefly exposed to the electrolyte and the applied electroplating current. This is greatly different from the conventional technique described above. For example, in the present invention, the specific The part is substantially free of electrolyte. Only when the part is exposed to the electrolyte, the electrolyte is applied to that part of the wafer, and a current pulse is applied at the same time. If the current mask-pulse plating method uses no Additives (ie, inhibitors and accelerators) are pure metal deposition electrolytes, and the expected results are not much different from traditional plating methods. This is because the size of the opening 42 in the mask 40 is much larger than the size of features on the surface of the wafer 32. Therefore, when the part is exposed to the electrolyte through the opening 42, standard plating is started. However, if the additive system can increase the inductive polarity, the mask_pulse plating method can provide advantages not currently available in traditional pulse plating techniques. For example, consider a copper plating bath that contains traditional solution / chemical products (copper sulfide, water, sulfuric acid, and gaseous ions) and an additive A. Additive A enhances deposition when it is adsorbed on the wafer surface. When this electrolyte is used in a conventional electrolytic cell (such as shown in Fig. 5), the entire surface of the wafer 32 is exposed to the electrolyte and the additive a. The electric field region on the wafer surface and the surface under the large feature similarly adsorbed the additive A, and electroplating was started on these surfaces at a comparable rate. However, 'Fake Right Mask-Pulse Power Mining Technology uses the same electrolyte, and this paper size applies the Chinese National Standard (CNS) A4 specification (210X297). 20 (Please read the precautions on the back before filling this page). Order | 520407 A7 —1 _B7 V. Description of the invention (1) The mask is to spread the additive A from the electric field area because it makes substantial contact with these areas. However, the small and large features still contain the absorbed addition Object A 'because these features are not directly in contact with the mask. When a part of the wafer is suddenly exposed to the electrolyte, the lower and side surfaces with the characteristics of the previously adsorbed Additive A will be The electroplating is started at a higher rate than the electric field region. If the time period At is shorter than the adsorption period required for the additive A to adhere to the substrate surface, the applied plating current preferably flows through the feature to be filled, so that Corresponding to the deposition rate on the electric field region within the feature produces an enhanced deposition rate. The mask-pulse plating method of the present invention utilizes the reaction time between different additives to obtain an enhancement Electroplating into different features on the surface of the substrate. The mechanism includes the "clearing" of the upper surface of the substrate (electric field region) by the mask, which does not substantially contact the area inside the feature. The action of clearing on the electric field region is established In order to understand the difference in the concentration of the species adsorbed between the cleaned areas and the features. When the surface is suddenly exposed to the electrolyte and the electric field, the features with the adsorbed species are attracted from the electric field area. The majority of the plating current is used. This method can also work well with the compounded additives. For example, if the plating solution contains an inhibitor B and an accelerator c, the adsorption kinetic characteristics of the inhibitor are better than the accelerator Come faster, the following mechanisms can be used by the mask_pulse plating method. Both the inhibitor B and the accelerator c partially or completely clear the electric field area of the substrate by the mask. However, two types It still exists in the feature. When the substrate system is exposed to the electrolyte and electric field, the inhibitor B will be immediately absorbed by the electric field area, resulting in Standards are applicable to China National Standard (CNS) A4 specifications (210X297 public reply) ------- 4 ------ 4 ----------- (Please read the precautions on the back before (Fill in this page), tr- 21 520407 A7 V. Description of the invention (0 High-impedance path for plating current. Accelerator c already exists in the characteristics and the role of inhibitor B in these areas, and the current system It can easily flow through these features. Therefore, until the accelerator c is properly adsorbed by the electric field region, the film formation rate in the features will be higher. The same result can be obtained in another chemical system, An inhibitor D in the chemical has strong adsorption characteristics and an accelerator E has a weak binding force to the electric field region. In this example, the masking system can easily combine the binding force from the electric field region. Weak accelerator E removed 'However accelerator E remains attached to the surface within the feature. Once exposed to the electrolyte and the electric field, the plating current flows through the feature preferably until the accelerator E again begins to be adsorbed by the electric field region. It should be / mind that the above descriptions are merely examples of the mechanisms included in the present invention and are not intended to be limited. The present invention makes use of the difference in adsorption / desorption kinetic characteristics between different electrolytic solution additives. The present invention accomplishes this characteristic by applying a solution and electric power to the surface of a substrate suddenly and simultaneously, and partially or completely removing a specific part of one or more kinds of additives in advance. The geometry of the plating system shown in Figure 6 is extremely simplified. There are several possible designs that can be used to practice the invention. Some important aspects of the present invention are as follows: (1) When a wafer system is flat, the mask system needs to be flat. The mask needs to be made of an insulating, rigid material, and the wafer-facing surface can be hard and even include an abrasive system to help remove additives more efficiently. This paper size applies to China National Standard (CNS) A4 specification (210X297 mm) 4 ------.----- '0 ^ …… (Please read the precautions on the back before filling this page) · # 22 520407 A7 _____ B7 V. Description of the invention (M (2) There should be relative movement between the wafer and the mask. The wafer, mask, or both can be linear or orbital or a combination of the two (3) There should be substantially no electrolyte between the mask and the wafer surface. The wafer surface should be exposed to the electrolyte only through the opening in the mask. (4) The size of the opening in the mask And the speed of the relative movement between the mask and the wafer such that any part of the wafer should only be briefly exposed to the electrolyte, typically less than two seconds and preferably less than one second, such as 10-5 〇〇msec .. This time interval should be adjusted in accordance with the adsorption characteristics of the additives used. Figure 8 is a perspective view of a device of the first preferred embodiment of the present invention. In Figure 8, The shield 80 and an electrolyte channel plate 300 are mounted on an anode assembly 90. The electrolyte 100 is passed through a pass A conventional pumping system (not shown) is supplied to the anode assembly 90. The electrolyte 100 is pumped into the channel 310 in the channel plate 300 through the hole 21, and during operation, the substrate / cathode system configuration faces the cover 80 The top surface of the substrate and / or the mask 80 is rotating. The substrate can be pushed against the mask 80 at a pressure ranging from 0.01 psi to 0 5 psi. Higher pressures can be used but not for Required. If the shield 80 is rotating, the entire anode assembly 90 can be rotated the same. A cathode voltage is applied to the substrate in relation to an anode (not shown) disposed within the anode assembly 90. (Not shown). The electrolyte 100 flows through the channel 3 10 through the opening 250 in the mask 80 to make substantial contact with the wafer surface. The electrolyte 100 is continuously discharged from the small outflow hole 320 and received Filtration and recycling. If any electrolyte actually enters the boundary between the mask 80 and the surface of the wafer during the operation, the paper size applies the Chinese National Standard (CNS) A4 specification (2) 0X297 mm. 23 (Please read first (Notes on the back then fill out this page)
If . •訂— 520407 A7 五、發明説明(2ί) ~" :- 面,係為極為小量處於密切地接觸。 第9圖係為本發明之第二較佳具體實施例的一種裝置 的透視圖。第9圖中之裝置係與第8圖所示之裝置相似,所 不同的疋孔510與通道板_。通道板嶋包括不同形狀的通 道610,其係以序列的方式用於將電解液100分配至遮罩80 之開口 250。 第10圖係為本發明之第三較佳具體實施例的一種裝置 的側視圖於尚有的另_具體實施例中,第Μ圖係顯示電 解液100進人冑存槽UG ,該槽係座落在陽極總成川之上 部分。電解液1〇〇係通過遮罩8〇之開口 25〇而與晶圓35〇的表 面接觸。電解液係自儲存槽11〇通過流出孔2〇〇排出。 本發明所使用之電源係可為脈衝或是直流電源,但是 較佳地係為直流電源。電源係可在電流受控制或是電壓受 控的模態中使用,亦即維持所施加的電流固定或是所施加 的電壓固定。就利用電流受控制的例子而言,重要的是遮 罩中之開口的尺寸應足夠大用以同時地涵蓋電場區域部分 乂及特徵邛分。換句活說,當晶圓表面係經由開口暴露至 電解液時,在任何特定時間並非只是電場區域暴露至電解 液中。例如,假若開口非常地小或是晶圓表面上特徵之數 目係為低的(低密度特徵),電場區域係暴露至電解液中。 於此例中,由於電源輸送一固定電流而所有的電流係流經 電場區域並將銅無差別地電鍍在電場區域上。但假若電場 區域與特徵係同時地暴露,接著電流係較佳地流經特徵, 並且將更多的銅電鍍入特徵中而少部分係電鍍在電場區 24 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 520407 A7 _____ B7 五、發明説明(2》 域。如此情況係可藉由增加遮罩中之開口的數目而得以確 保,因此二區域(電場與特徵)部分總是係同時經由該一些 孔而暴露。 假若使用固定的電壓電源,因而視在晶圓表面上的阻 抗而定電流自身係可自動地調整。因此,假若遮罩孔僅暴 露晶圓之電場區域,則供應較少的電流至該表面並且電鍍 量係為較小的。當特徵係暴露至溶液時,更多的電流流入 特徵中並因而較佳地於特徵内發生電鍍。因此,假若晶圓 係以低特徵密度塗佈及/或限定遮罩中孔的數目,更為適當 的是使用電源的電壓受控制模態。 本發明係可使用於填注小及大的特徵。然而,一系列 的加工法亦係可加以使用。於該等方法中,具有二加工步 驟。在第一步驟期間將遮罩自晶圓表面拉開容許在遮罩與 晶圓表面之間有充足的電鍍溶液量。於此位置,系統之作 用恰如傳統的電鍍槽。借助於電鍍溶液中之添加物,於此 步驟中係填注小特徵並出現第几圖中所示之情況。於此第 一步驟期間,針對均勻的沈積遮罩與基板係彼此相互移 動。接著遮罩與表面接觸將溶液自晶圓/遮罩界面(除了遮 罩上之孔/開口處外)擠出。遮罩·脈衝電鍍法接著開始作動 較佳地係如先前所述填注較大的特徵。重要而應注意的是 在遮罩-脈衝電鍍技術中,除了遮罩孔/開口所配置的位置 I 外’大體上在遮罩與晶圓表面之間並無電鑛溶液。 在使用銅以及其之作為傳導性材料的合金之外,其他 的傳導性材料諸如銅合金、鐵、鎳、鉻、錮、錯、錫、錯_ ^氏張尺度適A4規格⑵〇X297公釐) ----If. • Order — 520407 A7 V. Description of the Invention (2ί) ~ ":-surface, which is in close contact with a very small amount. Fig. 9 is a perspective view of a device according to a second preferred embodiment of the present invention. The device in Fig. 9 is similar to the device shown in Fig. 8 except that the countersink 510 and the channel plate _ are different. The channel plate 嶋 includes channels 610 of different shapes, which are used to distribute the electrolyte 100 to the openings 250 of the shield 80 in a sequential manner. FIG. 10 is a side view of a device according to a third preferred embodiment of the present invention. In other embodiments, FIG. M shows the electrolyte 100 entering the storage tank UG. It is located above the anode assembly. The electrolyte 100 is in contact with the surface of the wafer 350 through the opening 25 of the mask 80. The electrolyte is discharged from the storage tank 110 through the outflow hole 200. The power source used in the present invention may be a pulsed or DC power source, but is preferably a DC power source. The power supply can be used in a current-controlled or voltage-controlled mode, that is, to keep the applied current fixed or the applied voltage fixed. For the example using current control, it is important that the size of the openings in the mask be large enough to cover both the electric field region part and the characteristic part. In other words, when the wafer surface is exposed to the electrolyte through the opening, it is not just the area of the electric field that is exposed to the electrolyte at any given time. For example, if the opening is very small or the number of features on the wafer surface is low (low density features), the electric field area is exposed to the electrolyte. In this example, since the power supply delivers a fixed current, all currents flow through the electric field region and copper is plated on the electric field region indiscriminately. But if the electric field area and the feature are exposed at the same time, then the current is better to flow through the feature, and more copper is electroplated into the feature, while a small part is electroplated in the electric field area. A4 specification (210X297 mm) 520407 A7 _____ B7 V. Description of the invention (2 "field. This situation can be ensured by increasing the number of openings in the mask, so the two areas (electric field and features) are always related At the same time, it is exposed through these holes. If a fixed voltage power supply is used, the current itself can be adjusted automatically depending on the impedance on the wafer surface. Therefore, if the mask hole only exposes the electric field area of the wafer, it is supplied Less current flows to the surface and the amount of plating is smaller. When the feature system is exposed to the solution, more current flows into the feature and therefore plating occurs better within the feature. Therefore, if the wafer system is low Characteristic density coating and / or limiting the number of holes in the mask, it is more appropriate to use a voltage controlled mode of the power supply. The invention can be used to fill small and large However, a series of processing methods can also be used. In these methods, there are two processing steps. During the first step, the mask is pulled apart from the wafer surface to allow between the mask and the wafer surface. There is a sufficient amount of plating solution. At this position, the system functions just like a traditional plating bath. With the addition of the plating solution, small features are filled in this step and the situation shown in the first few figures appears. During this first step, a uniform deposition mask and substrate are moved relative to each other. Then the mask is in contact with the surface and the solution is extruded from the wafer / mask interface (except for the holes / openings on the mask). The mask / pulse plating method is then started to better fill larger features as previously described. It is important to note that in the mask-pulse plating technology, in addition to the position I where the mask holes / openings are arranged 'There is generally no electromineral solution between the mask and the surface of the wafer. In addition to using copper and its alloys as conductive materials, other conductive materials such as copper alloys, iron, nickel, chromium, rhenium, and copper Tin _ ^ Zhang scale is suitable for A4 size (× 297mm) ----
-------▲-------------—— (請先閲讀背面之注意事項再填寫本頁) •、可| 520407 A7 五、發明説明(2ί '—~ 錫合金、不含鉛之可焊接合金、銀、鋅、鎘、釕其之個 別的合金係可於本發明中加以使用。本發明係特別地適於 製造高性能及高可信賴性的晶片互連、封裝、磁性的、平 坦配電板以及光電應用裝置。 於本發明之另一觀點中,遮罩_脈衝電鍍法係說明用於 藉由產生一外部感應相關於吸附在基板之凹槽表面上的添 加物,將吸附在基板上表面的添加物移除或加以改變,將 傳導性材料以遮罩-脈衝電鍍在基板上的一種方法與裝 置。如本較佳之具體實施例中所說明,此外部感應係可藉 由間歇地移動間隔配置,接近但未與基板表面接觸的遮罩 並於陽極與基板間施以電力而產生,遮罩係配置在陽極與 基板間。 第5圖係圖示一電鍍槽30其中具有一陽極Μ、一陰極32 以及電解液33。應注意的是電鍍槽30係為一種傳統式的電 鍍槽並且於本發明中所使用的電鍍槽之確切的尺寸係可加 以變化。電解液33係與陰極32之上表面接觸。於此實例中 所提供之陰極32係為一晶圓(基板),在其之上表面上具有 不同的特徵。當在晶圓32與陽極3 1之間施以直流或脈衝電 壓時’電解液中之銅係沈積在上述之晶圓32上。介於直流 或脈衝電力間的差異係決定了填注在小特徵中之銅的品 質。 第6圖係圖示本發明之一較佳的具體實施例。於本發明 中’遮罩40係配置在緊密地接近陰極晶圓32的位置,其係 典型地小於0.75厘米而較佳地係位在〇·ΐ至〇·5厘米的範圍 本紙張尺度適用中國國家標準(⑶幻Α4規格(21〇χ297公釐) 26 ----- (請先閲讀背面之注意事項再填寫本頁) 、ν"· 520407 A7 _____B7 五、發明説明(24 内,並且較佳地在介於1至100公分/秒的速度範圍下相對地 移動。遮罩40包括一開口42,電解液33係通過該開口而前 進’或是可具有不具開口的構形,但容許在基板之上表面 與凹槽表面上添加物間產生差異,如同之後的說明。遮罩 典型地係為平坦的,並同時可具有特定結構的表面,以致 在微小的尺度階段係為粗糙的。為了能夠簡單地瞭解與解 釋’第6圖並未圖示電氣連接裝置、陽極、以及包含電解液 33的電鍍槽。當於陰極晶圓32與陽極之間施以一適當之電 壓,開口 42係容許電解液33中之銅電鍍至基板32(其係位在 開口 42的下方)之表面上,其中之電鍍量係大於並非位在開 口下方之區域所產生的電鑛量。 於本發明之另一具體實施例中,當產生一外部感應 時’上述之遮罩係使用以緊密地接近工作件表面。因而係 使用遮罩施加一外部感應,因此在上表面所吸附之添加 物’相關於位在工作件之凹槽表面上的添加物係被移除或 是以其他的方法加以改變。遮罩係可如上所述施加在緊密 地接近晶圓的位置,典型地係持續1至5秒的期間或是直到 由於添加物間之差異所導致在上表面與凹槽表面之阻抗間 產生差異為止。沈積在工作件之上表面部分以及凹槽表面 部分上之添加物間產生差異之後,如上所述,遮罩係進一 步自工作件表面移開,較佳地至少0· 1公分,因此之後開始 電鍍。只要添加物存有差異係可接著開始電鍍。電鍍的時 間係直接地與添加物之吸附率有關。於此時間内,由於差 異性在特徵内所發生之電鍍係多於工作件之表面上的電 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公爱) 27 (請先閲讀背面之注意事項再填寫本頁) 、\=vr # 520407 A7 ------____ 五、發明説明(25) 錢。由於電解液係配置涵蓋於整個工作件表面,如此係同 時有助於降低電流密度並改善電鍍層之厚度的均勻性。當 遮罩係進一步自工作件移開,在遮罩與工作件的表面間的 區域中電場線係可彎曲而產生更為均勻的薄膜。 足夠之差異一旦不再存在,如上所說明,遮罩可再次 移動接近工作件表面並產生外部感應。此加工法係可循環 地重複直至電鍍傳導性材料達到所欲的厚度為止。 於本具體實施例之另一觀點中,當遮罩係處於密切地 接近工作件之上部分並且工作件與遮罩彼此相對移動時可 以開始電鍍,在遮罩不再密切地接近工作件之上部分同時 仍存在足夠之差異,因而電鍍可以繼續。由於在密切地接 近遮罩與工作件之間以及不接近時的二狀況下發生電鍍, 如此係可提供較快速的加工處理。應注意的是針對此應用 裝置應慎選添加物。特別地,需要藉由感應而非實質的接 觸加以移除的添加物種類應具有較微弱的吸附特性,因此 其在遮罩與晶圓間隙可被移除而無直接的接觸。 於另一具體實施例中,可以確認的是電鍍電流係可影 響添加物的吸附特性。對於一些添加物而言,在電流通過 的表面上吸附力係為較強的。於該等例子中,在從該表面 切斷電力或是降低之後(電流通過係被切斷或是降低)吸附 的種類係可輕易地自其欲依附的表面被移除。黏著性鬆弛 的添加物因而係可藉由遮罩輕易地被移開。於凹槽中,儘 管黏著性鬆弛,但因添加物不會藉由外部感應而受感應因 此可輕易地駐留。 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公楚〉 (請先閲讀背面之注意事項再填寫本頁)------- ▲ ----------------- (Please read the notes on the back before filling out this page) • 、 可 | 520407 A7 V. Description of the invention (2ί '— ~ Tin alloys, lead-free solderable alloys, silver, zinc, cadmium, and ruthenium can be used in the present invention. The present invention is particularly suitable for manufacturing high-performance and highly reliable wafers Interconnection, packaging, magnetic, flat power distribution boards, and optoelectronic applications. In another aspect of the present invention, the mask_pulse plating method is used to relate to the surface of a groove adsorbed on a substrate by generating an external induction. A method and device for removing or changing the additives adsorbed on the upper surface of a substrate, and masking-pulse plating a conductive material on a substrate. As described in this preferred embodiment, The external sensing system can be generated by intermittently moving the interval, a mask close to but not in contact with the substrate surface, and applying electricity between the anode and the substrate. The mask is disposed between the anode and the substrate. Shown in an electroplating tank 30 which has an anode M and a cathode 32 And electrolyte 33. It should be noted that the plating tank 30 is a conventional plating tank and the exact size of the plating tank used in the present invention can be changed. The electrolyte 33 is in contact with the upper surface of the cathode 32 The cathode 32 provided in this example is a wafer (substrate) with different characteristics on its upper surface. When a direct current or a pulse voltage is applied between the wafer 32 and the anode 31, 'electrolysis Copper in the liquid is deposited on the above-mentioned wafer 32. The difference between DC or pulsed power determines the quality of the copper filled in the small features. Figure 6 illustrates one of the better of the present invention. Specific embodiment. In the present invention, the 'mask 40 is arranged close to the cathode wafer 32, which is typically less than 0.75 cm and preferably in the range of 0.ΐ to 0.5 cm. Paper size applies to Chinese national standards (3), Α4 size (21 × 297 mm) 26 ----- (Please read the precautions on the back before filling out this page), ν " · 520407 A7 _____B7 V. Description of the invention (24 Within, and preferably between 1 and 100 cm / s It moves relatively at a speed range. The cover 40 includes an opening 42 through which the electrolyte 33 advances. Or it may have a configuration without openings, but allows the addition of the surface between the substrate and the surface of the groove. Make a difference, as explained later. The mask is typically flat, and at the same time can have a surface with a specific structure, so that it is rough at a small scale stage. In order to be able to understand and explain simply, Figure 6 does not The electrical connection device, the anode, and the plating bath containing the electrolyte 33 are shown. When a suitable voltage is applied between the cathode wafer 32 and the anode, the opening 42 allows copper in the electrolyte 33 to be plated onto the substrate 32 (which It is located on the surface below the opening 42), and the amount of electroplating in the surface is greater than the amount of electricity and ore generated in the area that is not located below the opening. In another embodiment of the present invention, the above-mentioned mask is used to closely approach the surface of the work piece when an external induction is generated. Therefore, a mask is used to apply an external induction. Therefore, the additive adsorbed on the upper surface is related to the additive located on the groove surface of the work piece, or is changed by other methods. The mask can be applied in close proximity to the wafer as described above, typically for a period of 1 to 5 seconds or until a difference occurs between the impedance of the upper surface and the surface of the groove due to the difference between the additives. until. After the difference between the additives deposited on the upper surface part of the work piece and the groove surface part, as mentioned above, the mask is further removed from the surface of the work piece, preferably at least 0.1 cm, so electroplating is then started . As long as there are differences in additives, electroplating can then be started. The plating time is directly related to the adsorption rate of the additives. During this time, due to the difference, more electroplating occurred in the feature than on the surface of the work piece. The paper size of the paper is applicable to the Chinese National Standard (CNS) A4 specification (210X297 public love). 27 (Please read the note on the back first) Please fill in this page for matters), \ = vr # 520407 A7 ------____ 5. Description of the invention (25) Money. Since the electrolyte system configuration covers the entire surface of the work piece, this system also helps to reduce the current density and improve the thickness uniformity of the plating layer. When the mask is further removed from the work piece, the electric field lines can be bent in the area between the mask and the surface of the work piece to produce a more uniform film. Once sufficient differences are no longer present, as explained above, the mask can again move closer to the surface of the work piece and generate external induction. This process can be repeated cyclically until the plated conductive material reaches the desired thickness. In another aspect of this embodiment, when the mask is in close proximity to the upper part of the work piece and the work piece and the mask are moved relative to each other, electroplating can be started, and the mask is no longer close to the work piece. There are still enough differences at the same time, so the plating can continue. Since electroplating occurs in close proximity between the mask and the work piece and when not in close proximity, this system can provide faster processing. It should be noted that the device should be carefully selected for this application. In particular, the types of additives that need to be removed by induction rather than physical contact should have weak adsorption characteristics, so they can be removed without direct contact between the mask and the wafer. In another embodiment, it can be confirmed that the plating current can affect the adsorption characteristics of the additive. For some additives, the adsorption force is stronger on the surface through which the current passes. In these examples, the species adsorbed after the power is cut or reduced from the surface (current is cut or reduced) can be easily removed from the surface to which it is attached. The tacky additive can therefore be easily removed with a mask. In the groove, although the adhesiveness is loose, the additive can be easily stayed because the additive is not induced by external induction. This paper size applies to China National Standard (CNS) A4 (210X297). (Please read the precautions on the back before filling this page)
28 520407 A7 -— _B7__ 五、發明説明(— — ~ -- 同時根據本發明,遮罩係可從晶圓移開並仍處在密切 接近之位置的距離,並從而施以一外部感應可使其增加, 或是可使用自除了遮罩以外之物所得到的力量,諸如,例 如電解液之直接的噴射係可用以攪動在晶圓上表面上的添 加物。 於之前的說明中,提出許多特定的詳細說明,諸如特 定的材料、遮罩設計、壓力、化學製品、加工處理等,提 供對於本發明之徹底的理解。然而,熟知此技藝之人士應 涊清的疋本發明係可加以實踐而不需借助特別提出的詳細 說明。 :儘管已於之前對不同之較佳的具體實施例詳加說明, 但熟知此技藝之人士應可立即地察知係可對示範的具體實 施例作數種修改,但實質上不致背離本發明之新穎的技術 與優點。 (請先閲讀背面之注意事項再填寫本頁) 訂— -#- 29 本紙張尺度適用中國國家標準A4規格(210X297公釐) 520407 A7 B7 五、發明説明(2令 元件標號對照 2…絕緣體 30···電鍍槽 3…基板 31…陽極 4a…貫穿孔 32…陰極 4b…溝 3 3…電解液 5…黏合層/屏障層 40、80···遮罩 6…晶粒層 42、250…開口 7···傳導性材料 43…箭頭 8 · · ·電場區域 45···部分 10…承載頭 90…陽極總成 10b…第一軸 100…電解液 10 c…第二轴 110…儲存槽 16…半導體晶圓 200、320···流出孔 17…電氣導線 210、510…孔 18…墊 300…電解液通道板 19…陽極總成 310、610…通道 20…電解液 350…晶圓 22··· % 600…通道板 24…第二電氣導線 —Γ——U——— (請先閲讀背面之注意事項再填寫本頁) 訂— 本紙張尺度適用中國國家標準(CNS) Α4規格(210X297公釐) 3028 520407 A7 --- _B7__ V. Description of the invention (--- ~-At the same time, according to the present invention, the mask can be removed from the wafer and still be in close proximity, and thus an external induction can be used to make It can increase, or can use the force obtained from other than the mask, such as, for example, a direct spray system of the electrolyte can be used to stir the additives on the upper surface of the wafer. In the previous description, many were proposed Specific detailed descriptions, such as specific materials, mask designs, pressures, chemicals, processing, etc., provide a thorough understanding of the invention. However, those skilled in the art should be aware that the invention can be put into practice There is no need to resort to detailed explanations .: Although different and preferred embodiments have been described in detail before, those skilled in the art should immediately know that there are several types of specific embodiments that can be demonstrated. Modify, but not substantially deviate from the novel technology and advantages of the present invention. (Please read the precautions on the back before filling this page) Order —-#-29 This paper is applicable in the standard National standard A4 specification (210X297 mm) 520407 A7 B7 V. Description of the invention (2 order component number comparison 2 ... insulator 30 ... plating tank 3 ... substrate 31 ... anode 4a ... through hole 32 ... cathode 4b ... trench 3 3 ... Electrolyte 5 ... Adhesive layer / barrier layer 40, 80 ... Mask 6 ... Grain layer 42, 250 ... Opening 7 ... Conductive material 43 ... Arrow 8 ... Electric field area 45 ... Part 10 ... Carrying head 90 ... Anode assembly 10b ... First shaft 100 ... Electrolyte 10 c ... Second shaft 110 ... Storage tank 16 ... Semiconductor wafer 200, 320 ... · Outflow hole 17 ... Electrical wire 210,510 ... Hole 18 ... Pad 300 ... electrolyte channel plate 19 ... anode assembly 310, 610 ... channel 20 ... electrolyte 350 ... wafer 22 ...% 600 ... channel plate 24 ... second electrical lead—Γ——U ——— (Please (Please read the notes on the back before filling in this page) Order — This paper size applies to China National Standard (CNS) Α4 size (210X297 mm) 30
Claims (1)
Applications Claiming Priority (3)
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US22473900P | 2000-08-10 | 2000-08-10 | |
US09/740,701 US6534116B2 (en) | 2000-08-10 | 2000-12-18 | Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence |
US09/919,788 US6858121B2 (en) | 2000-08-10 | 2001-07-31 | Method and apparatus for filling low aspect ratio cavities with conductive material at high rate |
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TW520407B true TW520407B (en) | 2003-02-11 |
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TW090119667A TW520407B (en) | 2000-08-10 | 2001-08-10 | Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence |
Country Status (7)
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EP (1) | EP1307905A2 (en) |
JP (1) | JP2004521186A (en) |
KR (1) | KR20030040394A (en) |
CN (1) | CN1310289C (en) |
AU (1) | AU8119601A (en) |
TW (1) | TW520407B (en) |
WO (1) | WO2002015245A2 (en) |
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EP2818579A4 (en) * | 2012-02-24 | 2015-11-11 | Jfe Steel Corp | Metal material, and surface treatment method and device |
CN110453258B (en) * | 2019-06-13 | 2021-10-26 | 佛山市顺德区巴田塑料实业有限公司 | Method for producing electroplated lamp cap |
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JP3191759B2 (en) * | 1998-02-20 | 2001-07-23 | 日本電気株式会社 | Method for manufacturing semiconductor device |
EP1063696B1 (en) * | 1999-06-22 | 2007-08-22 | Interuniversitair Micro-Elektronica Centrum Vzw | A method for improving the quality of a metal-containing layer deposited from a plating bath |
JP3594894B2 (en) * | 2000-02-01 | 2004-12-02 | 新光電気工業株式会社 | Via filling plating method |
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2001
- 2001-08-09 CN CNB018155499A patent/CN1310289C/en not_active Expired - Fee Related
- 2001-08-09 JP JP2002520283A patent/JP2004521186A/en active Pending
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- 2001-08-09 EP EP01959666A patent/EP1307905A2/en not_active Withdrawn
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WO2002015245A3 (en) | 2002-07-04 |
CN1310289C (en) | 2007-04-11 |
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AU8119601A (en) | 2002-02-25 |
KR20030040394A (en) | 2003-05-22 |
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