AU7892898A - IC card - Google Patents

IC card Download PDF

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Publication number
AU7892898A
AU7892898A AU78928/98A AU7892898A AU7892898A AU 7892898 A AU7892898 A AU 7892898A AU 78928/98 A AU78928/98 A AU 78928/98A AU 7892898 A AU7892898 A AU 7892898A AU 7892898 A AU7892898 A AU 7892898A
Authority
AU
Australia
Prior art keywords
volatile storage
storage means
data
error
error detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU78928/98A
Inventor
Shigemi Chimura
Yoshihiro Ikefuji
Haruo Taguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP8348226A external-priority patent/JPH10187551A/en
Priority claimed from JP34822596A external-priority patent/JPH10187550A/en
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of AU7892898A publication Critical patent/AU7892898A/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07FCOIN-FREED OR LIKE APPARATUS
    • G07F7/00Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/10Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means together with a coded signal, e.g. in the form of personal identification information, like personal identification number [PIN] or biometric data
    • G07F7/1008Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06QINFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00Payment architectures, schemes or protocols
    • G06Q20/30Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/341Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06QINFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00Payment architectures, schemes or protocols
    • G06Q20/30Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/357Cards having a plurality of specified features
    • G06Q20/3576Multiple memory zones on card
    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07FCOIN-FREED OR LIKE APPARATUS
    • G07F7/00Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/0806Details of the card
    • G07F7/0833Card having specific functional components
    • G07F7/084Additional components relating to data transfer and storing, e.g. error detection, self-diagnosis
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/74Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies

Description

SPECIFICATION IC Card 5 Technical Field The present invention relates to IC cards and in particular to IC cards incorporating therein a non-volatile memory for storing various data and communicating data with a control unit referred to as an interrogator. 10 Background Art IC cards include those having a terminal electrically connected to a control unit to communicate data and those providing non-contact communication of data. A non-contact IC card obtains power from electronic waves transmitted from an antenna to transmit information 15 stored in its internal nonvolatile memory, and it is used at ticket gates for ski-lifts, railroads and the like, for load sorting, and the like. IC cards, whether contact or non-contact, are structurally weak against external stress, so that the data stored in the non-volatile memory can be changed due to static electricity or the like. Conventionally, 20 detection of such data variation as an error has not been able to be achieved for the IC cards' non-volatile memory, let alone data error correction. Disclosure of the Invention 25 A main object of the present invention is therefore to provide an IC card incorporating therein a spare non-volatile memory to deal with an error of data. Another object of the present invention is to provide an IC card capable of detecting an error of data stored in non-volatile memory while 30 the memory does not operate. The present invention is an IC card communicating data with an interrogator, including a non-volatile storage circuit for storing data received from the interrogator, and a spare non-volatile storage circuit - 1 storing data capable of corresponding one-to-one to the data stored in the non-volatile storage circuit. A preferred embodiment of the present invention further includes an error detection circuit detecting an error of the data stored in the non 5 volatile storage circuit, and a select circuit selecting data stored in the non volatile storage circuit when the error detection circuit does not detect an error, and selecting data stored in the spare non-volatile storage circuit when the error detection circuit detects an error. A still preferred embodiment of the present invention further 10 includes an error detection circuit detecting an error of data stored in the spare non-volatile storage circuit, and a select circuit selecting data stored in the spare non-volatile storage circuit when an error is not detected, and selecting data stored in the non-volatile storage circuit when an error is detected. The embodiment includes at least two spare non-volatile storage 15 circuits, including a majority deciding circuit deciding a majority between the content of data stored in the non-volatile storage circuit and that of data stored in each of the at least two spare non-volatile storage circuit, and a select circuit selecting data stored in a non-volatile storage circuit with the majority indicated. 20 A non-volatile storage circuit and a spare non-volatile storage circuit each store the same data at a different physical address. The non-volatile storage circuit and the spare non-volatile storage circuit each have a different storage capacity. The error detection circuit provides error detection for each byte or each plurality of bytes and a result of detection 25 from the error detection circuit is stored in the non-volatile storage circuit and used to correct an error of data. In another aspect of the present invention, an IC card communicating data with an interrogator is comprised of a non-volatile storage circuit storing data from the interrogator, and an error detection 30 circuit detecting an error of data stored in the non-volatile storage circuit when the non-volatile storage circuit is non-selected. In an embodiment of the present invention, a spare non-volatile storage circuit stores the same data as that stored in a non-volatile storage -2circuit or data capable of corresponding one-to-one to that stored in the non-volatile storage circuit, and the error detection circuit detects an error of data stored in the non-volatile storage circuit or the spare non-volatile storage circuit and the error detection circuit uses a result of the error 5 detection to correct data stored in the non-volatile storage circuit or the spare non-volatile storage circuit. Brief Description of the Drawings Fig. 1 is a block diagram showing one embodiment of the present 10 invention. Fig. 2 is a block diagram showing one example of the error detection circuit shown in Fig. 1. Fig. 3 is a block diagram showing another embodiment of the present invention. 15 Fig. 4 shows an embodiment with varied physical locations in main memory 10 and submemory 11 for storing data. Fig. 5 represents a sequence between the interrogator and IC card of still another embodiment of the present invention. Fig. 6 is a flow chart for representing an operation of still another 20 embodiment of the present invention. Best Modes for Carrying Out the Invention Fig. 1 is a block diagram showing one example of the present invention. Although the IC card shown in Fig. 1 will be described 25 exemplarily in a signal superposition system providing data communication and the power supply to the non-contact card via a signal of a single frequency, the IC card may be of a signal separation system providing data communication and power supply via signals of separate frequencies. In Fig. 1, a tuning circuit 1 comprised of a coil L and a capacitor C 30 tunes in to a modulated signal sent from an interrogator (not shown) and sends a received carrier to a rectifying circuit 2 which in turn rectifies and supplies the received carrier as a direct-current power supply to supply voltage to various units. When tuning circuit 1 receives a modulated -3signal, tuning circuit 1 inputs the modulated signal to an amplify and demodulation unit 3 which in turn demodulates data from the modulated signal. The demodulated and output data, transmitted serially, are converted by an S/P conversion unit 5 into parallel data and thus input to a 5 main control unit 7. If main control unit 7 returns a response to the interrogator, data from a main memory 10 as a non-volatile storage means is input to a P/S converter 6 and thus converted into serial data which is in turn input to a modulation and amplify unit 4 which amplifies the data and also modulates 10 the data when tuning circuit 1 receives a non-modulated wave. Main control unit 7 is also connected to main memory 10 and a submemory 11 serving as a spare non-volatile storage means via selectors 8, 9. Main memory 10 and submemory 11 are E 2 ROM flash memory, ferroelectronic memory or the like. Submemory 11 is a backup of main 15 memory 10 and data written in submemory can correspond to that written in main memory 10 one to one. Error detection circuit 12 and 13 detect errors of data written in main memory 10 and submemory 11, respectively. Error detection circuit 12, 13 is a parity check circuit, a CRC check circuit or the like. Error correction circuits 16, 17 correct errors detected by error 20 detection circuits 12, 13. When an interrogator transmits data as a modulated signal, tuning circuit 1 tunes in to the modulated signal and amplify and demodulation unit 3 demodulates the data and the serial data are converted by S/P conversion unit 5 into parallel data which are in turn input to main control 25 unit 7 which in turn stores the data via selectors 8, 9 into main memory 10 and submemory 11. Error detection circuits 12, 13 detect whether there is an error in the data stored in main memory 10 and submemory 11, respectively. If main memory 10 does not have an error, error detection circuit 12 controls selector 8 to allow data to be read from main memory 10 30 to main control unit 7 and also controls selector 9 not to allow data to be read from submemory 11. If error detection circuit 12 detects that main memory 10 has erroneous data, error detection circuit 12 controls selector 8 not to allow -4data to be read from main memory 10 and controls selector 9 to allow data to be read from submemory 11. Error detection circuit 13 detects whether there is an error in the data stored in submemory 11. If there is an error in the data not only in main memory 10 but also submemory 11, the data of 5 neither main memory 10 nor submemory 11 are supplied to main control unit 7. In this case, main control unit 7 requests the interrogator to retransmit the data or indicates that the data has an error. After data is read from main memory 10 or submemory 11, error correction circuits 16, 17 correct the error of the data. 10 It should be noted that error detection circuit 13 may be removed and only error detection circuit 12 may detect errors of the data in main memory 10. Fig. 2 is a block diagram showing one example of the error detection circuit shown in Fig. 1. The Fig. 2 error detection circuit 12 provides CRC 15 check, provided as a 5-bit shift register 121, a 7-bit shift register 122 and a 4-bit shift register 123 that are connected in series via EXOR gates 124, 125, 126. Fig. 3 is a block diagram showing another embodiment of the present invention, not showing the circuits from tuning circuit shown in Fig. 1 to 20 S/P conversion unit 5 and P/S conversion unit 6 shown in Fig. 1. In the present embodiment, a submemory 14 is further provided in addition to main memory 10 and submemory 11. A majority deciding circuit 15 decides the majority from the data stored in main memory 10 and submemories 11 and 14 to determine which of data stored in main memory 25 10 and that stored in submemory 11 is correct and thus switch between selectors 8 and 9. Fig. 4 represents an embodiment with varied physical locations in main memory 10 and submemory 11 for data storage. Such variation in physical locations for data storage allows the data storage locations to be 30 distant from each other, and thus provides higher possibility that the data of either one of the memories remains normal when the IC card receives stress and its data has been changed. As described above, the provision of submemory 11 can significantly -5enhance the resistance to the variations and errors in data that are caused by external forces such as stress, static electricity, and thus enhance the reliability as a non-volatile storage block. It should be noted that when data in either one of main memory 10 5 and submemory 11 is determined to be correct, correction may be made in the content of the memory having erroneous data. While main memory 10 and submemory 11 are adapted to store the same data, main memory 12 may be adapted to have information corresponding to a data value Q and submemory 11 may be adapted to have 10 information corresponding to the reciprocal of Q. Any other data that can provide one to one correspondence is also applicable, such as complement. Furthermore, submemory 11 may be different in capacity from main memory 10. Furthermore, error detection circuits 12, 13 are only required to provide error detection for each byte or for each plurality of bytes. 15 Furthermore, a result of error detection may be stored in either one of main memory 10 or submemory 11. Fig. 5 is a view for illustrating an operation of still another embodiment of the present invention, and Fig. 6 is a flow chart for representing an operation of still another embodiment of the present 20 invention. Reference will now be made to Figs. 1, 2, 5 and 6 to describe the operation of still another embodiment of the present invention. As represented in Fig. 5, the IC card, when initiated, receives data from an interrogator. Main control unit 7 recognizes the transmission. During 25 this period, main control unit 7 does not communicate data with the interrogator and neither main memory 10 nor submemory 11 operate. In the present embodiment, the error detection and correction of the data stored in main memory 10 and submemory 11 are provided during such period. 30 More specifically, as represented in Fig. 6, main control unit 7 determines whether data is being communicated. If data is being communicated, main control unit 7 does not provide the memory error detection operation. If data is not being communicated, main control unit -6- 7 provides error detecting operation and stores a result of the detection into main memory 10 or submemory 11. This allows multiple errors to be handled. Main control unit 7 determines whether all of the bytes in main memory 10 or submemory 11 have been subjected to error detection and 5 subjects all the bytes to error detection. If any error is not detected, main control unit 7 completes error detection operation and waits for data to be communicated with the interrogator. If any error is detected in either one of main memory 10 or submemory 11, main control unit 7 determines whether to communicate 10 data with the interrogator and provides data correction if it is not operating. Then main control unit 7 determines whether all errors have been subjected to data correction and, when a program becomes active in the meantime, stores a result of the correction and completes the series of operation. 15 In the above embodiment, data error detection is provided while the card is initiated and data is thus not being communicated to or from the interrogator. However, the error detection and correction of the data in either main memory 10 or submemory 11 may be alternatively provided at any other time when data is not being communicated to or from the 20 interrogator. It should also be noted that while in the above embodiment the present invention has been applied to a non-contact IC card, the present invention is also applicable to contact IC cards. As has been described above, in accordance with the present 25 invention an additional spare non-volatile memory can provide high reliability against varied data, erroneous data and the like caused by external forces such as stress, static electricity. Furthermore, the present invention can provide data error detection and data correction when the main non-volatile storage means is non-selected, so that communication 30 can be provided without changing the actual communication time and the time actually taken in the communication can thus be reduced. Industrial Applicability -7- In accordance with the present invention, an additional, spare non volatile memory can enhance reliability if external forces such as stress, static electricity, result in varied data, erroneous data and the like, and furthermore an error of the data stored in a non-volatile memory can be 5 detected while the memory does not operate, so that a highly reliable IC card can be provided. -8-

Claims (12)

1. An IC card communicating data with an interrogator, comprising: 5 a non-volatile storage means for storing data received from said interrogator; and a spare non-volatile storage means storing data capable of corresponding one-to-one to data stored in said non-volatile storage means. 10
2. The IC card of claim 1, further comprising: an error detection means detecting an error of data stored in said non-volatile storage means; and a select means selecting data stored in said non-volatile storage means when said error detection means does not detect an error, and 15 selecting data stored in said spare non-volatile storage means when said error detection means detects an error.
3. The IC card of claim 1, further comprising: an error detection means detecting an error of data stored in said 20 spare non-volatile storage means; and a select means selecting data stored in said spare non-volatile storage means when said error detection means does not detect an error, and selecting data stored in said non-volatile storage means when said error detection means detects an error. 25
4. The IC card of claim 1, there being provided at least two said spare non-volatile storage means, further comprising: a majority deciding means for deciding a majority between data stored in said non-volatile storage means and data stored in each of said at 30 least two spare non-volatile storage means; and a select means for selecting data stored in a non-volatile storage means with the majority indicated by said majority deciding means. -9-
5. The IC card of claim 1, characterized in that a storage element of said non-volatile storage means and a storage element of said spare non volatile storage means are mutually spaced on an IC chip, said storage elements of said non-volatile and spare non-volatile storage means storing 5 same data.
6. The IC card of claim 1, characterized in that said non-volatile storage means and said spare non-volatile storage means each have a respective different storage capacity. 10
7. The IC card of claim 2, characterized in that said error detection means performs error detection for each byte or each plurality of bytes.
8. The IC card of claim 2 or 7, characterized in that a result of 15 detection from said error detection means is stored in said non-volatile storage means.
9. The IC card of claim 2, further characterized in that said result of detection from said error detection means is used to correct an error of 20 data.
10. An IC card communicating data with an interrogator, comprising: a non-volatile storage means storing data from said interrogator; and 25 an error detection means detecting an error of data stored in said non-volatile storage means while said non-volatile storage means is non selected.
11. The IC card of claim 10, further including a spare non-volatile 30 storage means storing data identical to or capable of corresponding one-to one to data stored in said non-volatile storage means, the IC card characterized in that said error detection means detects an error of data stored in either one of said non-volatile storage means or said spare non - 10 - volatile storage means.
12. The IC card of claim 11, characterized in that said error detection means uses a result of error detection to correct data stored in 5 either one of said non-volatile storage means and said spare non-volatile storage means. - 11 -
AU78928/98A 1996-12-26 1997-12-18 IC card Abandoned AU7892898A (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP8348226A JPH10187551A (en) 1996-12-26 1996-12-26 Ic card
JP34822596A JPH10187550A (en) 1996-12-26 1996-12-26 Ic card
JP8/348226 1996-12-26
JP8/348225 1996-12-26
PCT/JP1997/004691 WO1998029814A1 (en) 1996-12-26 1997-12-18 Ic card

Publications (1)

Publication Number Publication Date
AU7892898A true AU7892898A (en) 1998-07-31

Family

ID=26578702

Family Applications (1)

Application Number Title Priority Date Filing Date
AU78928/98A Abandoned AU7892898A (en) 1996-12-26 1997-12-18 IC card

Country Status (2)

Country Link
AU (1) AU7892898A (en)
WO (1) WO1998029814A1 (en)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5940398A (en) * 1982-08-30 1984-03-06 Toshiba Corp Memory control system
JPS61211786A (en) * 1985-03-16 1986-09-19 Hitachi Maxell Ltd Ic card
JP2526060B2 (en) * 1987-05-11 1996-08-21 日本電信電話株式会社 Memory device
JPS63288383A (en) * 1987-05-20 1988-11-25 Nec Corp Integrated circuit card
JPH0358743U (en) * 1989-06-09 1991-06-07
JPH04115340A (en) * 1990-09-05 1992-04-16 Koufu Nippon Denki Kk Duplex storage circuit
JPH06214890A (en) * 1993-01-14 1994-08-05 Mitsubishi Electric Corp Computer

Also Published As

Publication number Publication date
WO1998029814A1 (en) 1998-07-09

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MK4 Application lapsed section 142(2)(d) - no continuation fee paid for the application