AU3096277A - Method and apparatus by which one processor in a multi- processor computer system communicates with another - Google Patents

Method and apparatus by which one processor in a multi- processor computer system communicates with another

Info

Publication number
AU3096277A
AU3096277A AU30962/77A AU3096277A AU3096277A AU 3096277 A AU3096277 A AU 3096277A AU 30962/77 A AU30962/77 A AU 30962/77A AU 3096277 A AU3096277 A AU 3096277A AU 3096277 A AU3096277 A AU 3096277A
Authority
AU
Australia
Prior art keywords
processor
another
computer system
system communicates
processor computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
AU30962/77A
Other languages
English (en)
Inventor
Richard T Flynn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of AU3096277A publication Critical patent/AU3096277A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161—Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)
  • Hardware Redundancy (AREA)
AU30962/77A 1976-12-01 1977-11-25 Method and apparatus by which one processor in a multi- processor computer system communicates with another Pending AU3096277A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US74644476A 1976-12-01 1976-12-01

Publications (1)

Publication Number Publication Date
AU3096277A true AU3096277A (en) 1979-05-31

Family

ID=25000860

Family Applications (1)

Application Number Title Priority Date Filing Date
AU30962/77A Pending AU3096277A (en) 1976-12-01 1977-11-25 Method and apparatus by which one processor in a multi- processor computer system communicates with another

Country Status (6)

Country Link
JP (1) JPS5369564A (enExample)
AU (1) AU3096277A (enExample)
CA (1) CA1116261A (enExample)
DE (1) DE2753621A1 (enExample)
FR (1) FR2373101A1 (enExample)
GB (1) GB1578205A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5833969B2 (ja) * 1978-07-26 1983-07-23 株式会社デンソー デ−タ転送方式
EP0408810B1 (en) * 1989-07-20 1996-03-20 Kabushiki Kaisha Toshiba Multi processor computer system

Also Published As

Publication number Publication date
FR2373101A1 (fr) 1978-06-30
JPS5369564A (en) 1978-06-21
FR2373101B3 (enExample) 1980-09-05
GB1578205A (en) 1980-11-05
CA1116261A (en) 1982-01-12
DE2753621A1 (de) 1978-06-08

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