AU2010328256A1 - Methods of making semiconductor devices having implanted sidewalls and devices made thereby - Google Patents

Methods of making semiconductor devices having implanted sidewalls and devices made thereby Download PDF

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Publication number
AU2010328256A1
AU2010328256A1 AU2010328256A AU2010328256A AU2010328256A1 AU 2010328256 A1 AU2010328256 A1 AU 2010328256A1 AU 2010328256 A AU2010328256 A AU 2010328256A AU 2010328256 A AU2010328256 A AU 2010328256A AU 2010328256 A1 AU2010328256 A1 AU 2010328256A1
Authority
AU
Australia
Prior art keywords
layer
regions
source
channel
channel layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2010328256A
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English (en)
Inventor
Andrew Ritenour
David C. Sheridan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Power Integrations Inc
Original Assignee
Power Integrations Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Power Integrations Inc filed Critical Power Integrations Inc
Publication of AU2010328256A1 publication Critical patent/AU2010328256A1/en
Assigned to POWER INTEGRATIONS, INC. reassignment POWER INTEGRATIONS, INC. Request for Assignment Assignors: SS SC IP, LLC
Abandoned legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/051—Manufacture or treatment of FETs having PN junction gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/83—FETs having PN junction gate electrodes
    • H10D30/831—Vertical FETs having PN junction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/343—Gate regions of field-effect devices having PN junction gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H10P30/2042—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors into crystalline silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H10P30/221—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks characterised by the angle between the ion beam and the mask
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/222—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface

Landscapes

  • Junction Field-Effect Transistors (AREA)
AU2010328256A 2009-12-08 2010-12-08 Methods of making semiconductor devices having implanted sidewalls and devices made thereby Abandoned AU2010328256A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US26752409P 2009-12-08 2009-12-08
US61/267,524 2009-12-08
PCT/US2010/059374 WO2011071973A2 (en) 2009-12-08 2010-12-08 Methods of making semiconductor devices having implanted sidewalls and devices made thereby

Publications (1)

Publication Number Publication Date
AU2010328256A1 true AU2010328256A1 (en) 2012-06-21

Family

ID=44081165

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2010328256A Abandoned AU2010328256A1 (en) 2009-12-08 2010-12-08 Methods of making semiconductor devices having implanted sidewalls and devices made thereby

Country Status (8)

Country Link
US (1) US8466017B2 (https=)
EP (1) EP2510539A4 (https=)
JP (1) JP2013513252A (https=)
KR (1) KR20120091368A (https=)
CN (1) CN102648514A (https=)
AU (1) AU2010328256A1 (https=)
CA (1) CA2780459A1 (https=)
WO (1) WO2011071973A2 (https=)

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KR20120032531A (ko) * 2009-06-19 2012-04-05 에스에스 에스시 아이피, 엘엘시 이온주입 없이 ｖｊｆｅｔ와 ｂｊｔ를 제조하는 방법 및 그 장치
US9136116B2 (en) * 2011-08-04 2015-09-15 Avogy, Inc. Method and system for formation of P-N junctions in gallium nitride based electronics
US8969912B2 (en) 2011-08-04 2015-03-03 Avogy, Inc. Method and system for a GaN vertical JFET utilizing a regrown channel
CN103946978B (zh) * 2011-11-24 2017-03-01 夏普株式会社 半导体装置以及电子设备
US8969994B2 (en) 2012-08-14 2015-03-03 Avogy, Inc. Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode by regrowth and etch back
US8937317B2 (en) 2012-12-28 2015-01-20 Avogy, Inc. Method and system for co-packaging gallium nitride electronics
US9324645B2 (en) 2013-05-23 2016-04-26 Avogy, Inc. Method and system for co-packaging vertical gallium nitride power devices
US9136397B2 (en) 2013-05-31 2015-09-15 Infineon Technologies Ag Field-effect semiconductor device
JP6138619B2 (ja) * 2013-07-30 2017-05-31 ルネサスエレクトロニクス株式会社 半導体装置の製造方法および半導体装置
US8947154B1 (en) 2013-10-03 2015-02-03 Avogy, Inc. Method and system for operating gallium nitride electronics
US9184281B2 (en) 2013-10-30 2015-11-10 Infineon Technologies Ag Method for manufacturing a vertical semiconductor device and vertical semiconductor device
US9324809B2 (en) 2013-11-18 2016-04-26 Avogy, Inc. Method and system for interleaved boost converter with co-packaged gallium nitride power devices
US9543290B2 (en) 2014-01-23 2017-01-10 International Business Machines Corporation Normally-off junction field-effect transistors and application to complementary circuits
KR101669987B1 (ko) * 2014-12-03 2016-10-27 서강대학교산학협력단 경사 이온 주입을 이용한 실리콘 카바이드 트렌치 모스 장벽 쇼트키 다이오드 및 그의 제조 방법
US10396215B2 (en) 2015-03-10 2019-08-27 United Silicon Carbide, Inc. Trench vertical JFET with improved threshold voltage control
US20160268446A1 (en) * 2015-03-10 2016-09-15 United Silicon Carbide, Inc. Trench vertical jfet with improved threshold voltage control
US9905645B2 (en) 2016-05-24 2018-02-27 Samsung Electronics Co., Ltd. Vertical field effect transistor having an elongated channel
WO2018048972A1 (en) * 2016-09-09 2018-03-15 United Silicon Carbide Inc. Trench vertical jfet with improved threshold voltage control
KR102314006B1 (ko) * 2017-09-11 2021-10-18 삼성전자주식회사 수직 전계 트랜지스터 및 이를 포함하는 반도체 장치
CN112909088B (zh) * 2021-01-25 2022-11-08 深圳大学 静电感应晶体管及其制备方法

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JPS60247921A (ja) * 1984-05-23 1985-12-07 Toshiba Corp 半導体装置の製造方法
JPS61154029A (ja) * 1984-12-26 1986-07-12 Nec Corp ボロンのド−ピング方法
DE4423068C1 (de) * 1994-07-01 1995-08-17 Daimler Benz Ag Feldeffekt-Transistoren aus SiC und Verfahren zu ihrer Herstellung
JPH10163313A (ja) * 1996-11-26 1998-06-19 New Japan Radio Co Ltd 半導体装置の製造方法
US5903020A (en) 1997-06-18 1999-05-11 Northrop Grumman Corporation Silicon carbide static induction transistor structure
US6509240B2 (en) * 2000-05-15 2003-01-21 International Rectifier Corporation Angle implant process for cellular deep trench sidewall doping
US6713351B2 (en) * 2001-03-28 2004-03-30 General Semiconductor, Inc. Double diffused field effect transistor having reduced on-resistance
EP1267210B1 (en) 2001-06-12 2018-02-21 FUJIFILM Corporation Positive resist composition
AU2002367561A1 (en) 2001-07-12 2003-09-16 Mississippi State University Self-aligned transistor and diode topologies
JP2004134547A (ja) * 2002-10-10 2004-04-30 Hitachi Ltd 半導体装置
US6821834B2 (en) * 2002-12-04 2004-11-23 Yoshiyuki Ando Ion implantation methods and transistor cell layout for fin type transistors
US20050067630A1 (en) * 2003-09-25 2005-03-31 Zhao Jian H. Vertical junction field effect power transistor
US20060046392A1 (en) 2004-08-26 2006-03-02 Manning H M Methods of forming vertical transistor structures
US7355223B2 (en) * 2005-03-04 2008-04-08 Cree, Inc. Vertical junction field effect transistor having an epitaxial gate
US7550787B2 (en) * 2005-05-31 2009-06-23 International Business Machines Corporation Varied impurity profile region formation for varying breakdown voltage of devices
US7977713B2 (en) 2008-05-08 2011-07-12 Semisouth Laboratories, Inc. Semiconductor devices with non-punch-through semiconductor channels having enhanced conduction and methods of making

Also Published As

Publication number Publication date
US8466017B2 (en) 2013-06-18
CA2780459A1 (en) 2011-06-16
CN102648514A (zh) 2012-08-22
WO2011071973A3 (en) 2011-10-27
WO2011071973A2 (en) 2011-06-16
EP2510539A4 (en) 2013-07-31
JP2013513252A (ja) 2013-04-18
EP2510539A2 (en) 2012-10-17
KR20120091368A (ko) 2012-08-17
US20110133212A1 (en) 2011-06-09

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PC1 Assignment before grant (sect. 113)

Owner name: POWER INTEGRATIONS, INC.

Free format text: FORMER APPLICANT(S): SS SC IP, LLC

MK1 Application lapsed section 142(2)(a) - no request for examination in relevant period