AU2003288893A1 - Active matrix backplane for controlling controlled elements and method of manufacture thereof - Google Patents

Active matrix backplane for controlling controlled elements and method of manufacture thereof

Info

Publication number
AU2003288893A1
AU2003288893A1 AU2003288893A AU2003288893A AU2003288893A1 AU 2003288893 A1 AU2003288893 A1 AU 2003288893A1 AU 2003288893 A AU2003288893 A AU 2003288893A AU 2003288893 A AU2003288893 A AU 2003288893A AU 2003288893 A1 AU2003288893 A1 AU 2003288893A1
Authority
AU
Australia
Prior art keywords
manufacture
active matrix
controlled elements
matrix backplane
controlling controlled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003288893A
Other languages
English (en)
Other versions
AU2003288893A8 (en
Inventor
Thomas P. Brody
Paul R. Malmberg
Robert E. Stapleton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantech Global Ltd
Original Assignee
Amedeo Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Amedeo Corp filed Critical Amedeo Corp
Publication of AU2003288893A8 publication Critical patent/AU2003288893A8/xx
Publication of AU2003288893A1 publication Critical patent/AU2003288893A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0231—Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C23C14/042—Coating on selected surface areas, e.g. using masks using masks
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/56—Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/675—Group III-V materials, Group II-VI materials, Group IV-VI materials, selenium or tellurium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/907—Continuous processing

Landscapes

  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Electroluminescent Light Sources (AREA)
  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
AU2003288893A 2002-06-05 2003-05-19 Active matrix backplane for controlling controlled elements and method of manufacture thereof Abandoned AU2003288893A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US38652502P 2002-06-05 2002-06-05
US60/386,525 2002-06-05
US10/255,972 US6943066B2 (en) 2002-06-05 2002-09-26 Active matrix backplane for controlling controlled elements and method of manufacture thereof
US10/255,972 2002-09-26
PCT/US2003/015682 WO2004025696A2 (en) 2002-06-05 2003-05-19 Active matrix backplane for controlling controlled elements and method of manufacture thereof

Publications (2)

Publication Number Publication Date
AU2003288893A8 AU2003288893A8 (en) 2004-04-30
AU2003288893A1 true AU2003288893A1 (en) 2004-04-30

Family

ID=29714899

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003288893A Abandoned AU2003288893A1 (en) 2002-06-05 2003-05-19 Active matrix backplane for controlling controlled elements and method of manufacture thereof

Country Status (6)

Country Link
US (1) US6943066B2 (enExample)
EP (1) EP1568069A4 (enExample)
JP (1) JP4246153B2 (enExample)
CN (1) CN100375229C (enExample)
AU (1) AU2003288893A1 (enExample)
WO (1) WO2004025696A2 (enExample)

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US6642092B1 (en) * 2002-07-11 2003-11-04 Sharp Laboratories Of America, Inc. Thin-film transistors formed on a metal foil substrate
WO2004032573A1 (en) * 2002-10-07 2004-04-15 Koninklijke Philips Electronics N.V. Method for manufacturing a light emitting display
US7214554B2 (en) * 2004-03-18 2007-05-08 Eastman Kodak Company Monitoring the deposition properties of an OLED
JP4393402B2 (ja) * 2004-04-22 2010-01-06 キヤノン株式会社 有機電子素子の製造方法および製造装置
DE102004024461A1 (de) * 2004-05-14 2005-12-01 Konarka Technologies, Inc., Lowell Vorrichtung und Verfahren zur Herstellung eines elektronischen Bauelements mit zumindest einer aktiven organischen Schicht
KR100671640B1 (ko) * 2004-06-24 2007-01-18 삼성에스디아이 주식회사 박막 트랜지스터 어레이 기판과 이를 이용한 표시장치와그의 제조방법
US20060021869A1 (en) * 2004-07-28 2006-02-02 Advantech Global, Ltd System for and method of ensuring accurate shadow mask-to-substrate registration in a deposition process
US7232694B2 (en) * 2004-09-28 2007-06-19 Advantech Global, Ltd. System and method for active array temperature sensing and cooling
KR100696479B1 (ko) * 2004-11-18 2007-03-19 삼성에스디아이 주식회사 평판표시장치 및 그의 제조방법
US7132361B2 (en) * 2004-12-23 2006-11-07 Advantech Global, Ltd System for and method of forming via holes by multiple deposition events in a continuous inline shadow mask deposition process
US7271111B2 (en) * 2005-06-08 2007-09-18 Advantech Global, Ltd Shadow mask deposition of materials using reconfigurable shadow masks
US7531470B2 (en) * 2005-09-27 2009-05-12 Advantech Global, Ltd Method and apparatus for electronic device manufacture using shadow masks
US20070137568A1 (en) * 2005-12-16 2007-06-21 Schreiber Brian E Reciprocating aperture mask system and method
US7763114B2 (en) * 2005-12-28 2010-07-27 3M Innovative Properties Company Rotatable aperture mask assembly and deposition system
US8152718B2 (en) * 2006-02-07 2012-04-10 Boston Scientific Scimed, Inc. Medical device light source
US20090098309A1 (en) * 2007-10-15 2009-04-16 Advantech Global, Ltd In-Situ Etching Of Shadow Masks Of A Continuous In-Line Shadow Mask Vapor Deposition System
US20090311427A1 (en) * 2008-06-13 2009-12-17 Advantech Global, Ltd Mask Dimensional Adjustment and Positioning System and Method
WO2011019429A2 (en) * 2009-06-09 2011-02-17 Arizona Technology Enterprises Method of anodizing aluminum using a hard mask and semiconductor device thereof
JP5528727B2 (ja) * 2009-06-19 2014-06-25 富士フイルム株式会社 薄膜トランジスタ製造装置、酸化物半導体薄膜の製造方法、薄膜トランジスタの製造方法、酸化物半導体薄膜、薄膜トランジスタ及び発光デバイス
US8658478B2 (en) 2010-09-23 2014-02-25 Advantech Global, Ltd Transistor structure for improved static control during formation of the transistor
CN104862669B (zh) * 2010-12-16 2018-05-22 潘重光 任意尺寸底板及显示屏的气相沉积荫罩板系统及其方法
CN102122612A (zh) * 2010-12-16 2011-07-13 潘重光 一种采用荫罩技术生产线制造器件的方法及系统
US10233528B2 (en) 2015-06-08 2019-03-19 Applied Materials, Inc. Mask for deposition system and method for using the mask
KR102696806B1 (ko) * 2016-09-22 2024-08-21 삼성디스플레이 주식회사 증착용 마스크, 표시 장치의 제조 장치 및 표시 장치의 제조 방법

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US4335161A (en) * 1980-11-03 1982-06-15 Xerox Corporation Thin film transistors, thin film transistor arrays, and a process for preparing the same
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US4615781A (en) * 1985-10-23 1986-10-07 Gte Products Corporation Mask assembly having mask stress relieving feature
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US6384529B2 (en) * 1998-11-18 2002-05-07 Eastman Kodak Company Full color active matrix organic electroluminescent display panel having an integrated shadow mask
US6281552B1 (en) * 1999-03-23 2001-08-28 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors having ldd regions
US6460369B2 (en) * 1999-11-03 2002-10-08 Applied Materials, Inc. Consecutive deposition system
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TW490714B (en) * 1999-12-27 2002-06-11 Semiconductor Energy Lab Film formation apparatus and method for forming a film
JP2001272929A (ja) * 2000-03-24 2001-10-05 Toshiba Corp 平面表示装置用アレイ基板の製造方法
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US6791258B2 (en) * 2001-06-21 2004-09-14 3M Innovative Properties Company Organic light emitting full color display panel

Also Published As

Publication number Publication date
JP2005539378A (ja) 2005-12-22
AU2003288893A8 (en) 2004-04-30
WO2004025696A3 (en) 2005-01-06
CN100375229C (zh) 2008-03-12
EP1568069A2 (en) 2005-08-31
WO2004025696A2 (en) 2004-03-25
CN1666318A (zh) 2005-09-07
US6943066B2 (en) 2005-09-13
HK1077400A1 (en) 2006-02-10
JP4246153B2 (ja) 2009-04-02
US20030228715A1 (en) 2003-12-11
EP1568069A4 (en) 2006-10-25

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase