AU2003222499A1 - Method of calibrating marking in laser marking system - Google Patents

Method of calibrating marking in laser marking system

Info

Publication number
AU2003222499A1
AU2003222499A1 AU2003222499A AU2003222499A AU2003222499A1 AU 2003222499 A1 AU2003222499 A1 AU 2003222499A1 AU 2003222499 A AU2003222499 A AU 2003222499A AU 2003222499 A AU2003222499 A AU 2003222499A AU 2003222499 A1 AU2003222499 A1 AU 2003222499A1
Authority
AU
Australia
Prior art keywords
marking
calibrating
laser
laser marking
marking system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003222499A
Other languages
English (en)
Inventor
Young-Sik Byun
Byoung-Hwan Kim
Tae-Jung Kim
Goo-Cheol Kwon
Jeong-Ku Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EO Technics Co Ltd
Original Assignee
EO Technics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020020023108A external-priority patent/KR20030084406A/ko
Priority claimed from KR20030009877A external-priority patent/KR100520899B1/ko
Application filed by EO Technics Co Ltd filed Critical EO Technics Co Ltd
Publication of AU2003222499A1 publication Critical patent/AU2003222499A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67282—Marking devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68313—Auxiliary support including a cavity for storing a finished device, e.g. IC package, or a partly finished device, e.g. die, during manufacturing or mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Laser Beam Processing (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
AU2003222499A 2002-04-26 2003-04-25 Method of calibrating marking in laser marking system Abandoned AU2003222499A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
KR10-2002-0023108 2002-04-26
KR1020020023108A KR20030084406A (ko) 2002-04-26 2002-04-26 카메라를 이용한 레이저 마킹방법
KR10-2003-0009877 2003-02-17
KR20030009877A KR100520899B1 (ko) 2003-02-17 2003-02-17 레이저 마킹시스템의 마킹 보정방법
PCT/KR2003/000841 WO2003092069A1 (en) 2002-04-26 2003-04-25 Method of calibrating marking in laser marking system

Publications (1)

Publication Number Publication Date
AU2003222499A1 true AU2003222499A1 (en) 2003-11-10

Family

ID=29272439

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003222499A Abandoned AU2003222499A1 (en) 2002-04-26 2003-04-25 Method of calibrating marking in laser marking system

Country Status (5)

Country Link
JP (1) JP2005523820A (zh)
CN (1) CN100358142C (zh)
AU (1) AU2003222499A1 (zh)
TW (1) TW592866B (zh)
WO (1) WO2003092069A1 (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040144760A1 (en) * 2002-05-17 2004-07-29 Cahill Steven P. Method and system for marking a workpiece such as a semiconductor wafer and laser marker for use therein
CN101327483B (zh) * 2007-06-20 2012-02-08 京元电子股份有限公司 芯片分类装置与方法
CN101355011B (zh) * 2007-07-24 2010-11-17 京元电子股份有限公司 晶片激光刻印方法与其系统
CN101832772B (zh) * 2010-06-01 2012-05-02 郑州辰维科技有限公司 月球车避障系统激光点阵器标定方法
KR101061056B1 (ko) 2011-03-29 2011-09-01 주식회사 투아이스펙트라 유리판 내부 마킹 장치
TWI543830B (zh) 2013-05-10 2016-08-01 財團法人工業技術研究院 視覺誤差校正方法
TW201532855A (zh) * 2013-10-23 2015-09-01 Automation Tooling Syst 複數零件的裝飾系統與方法
US9950389B1 (en) 2014-09-19 2018-04-24 EMC IP Holding Company LLC Laser calibration
US20170323708A1 (en) * 2016-05-03 2017-11-09 Texas Instruments Incorporated Component sheet and method of singulating
CN108074853A (zh) * 2017-04-27 2018-05-25 深圳市东飞凌科技有限公司 晶片校准方法及装置
CN115195322B (zh) * 2022-07-29 2023-06-06 韦孚智能科技(上海)有限公司 一种视觉打标的方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01194322A (ja) * 1988-01-29 1989-08-04 Canon Inc 半導体焼付装置
JPH01318947A (ja) * 1988-06-20 1989-12-25 Hitachi Ltd Ｘ線検査装置
JPH04330754A (ja) * 1991-03-02 1992-11-18 Toshiba Corp 半導体基板用キャリアボックスの判別装置
KR20000008807A (ko) * 1998-07-16 2000-02-15 한영수 장식용 수지판의 제조 방법 및 제조 장치
US6160831A (en) * 1998-10-26 2000-12-12 Lambda Physik Gmbh Wavelength calibration tool for narrow band excimer lasers
KR20000008807U (ko) * 1998-10-28 2000-05-25 김영환 반도체 패키지용 마킹장치
KR100327101B1 (ko) * 1999-08-11 2002-03-18 김주환 반도체 패키지 마킹 검사공정에서의 오토티칭 제어방법

Also Published As

Publication number Publication date
CN100358142C (zh) 2007-12-26
TW200305475A (en) 2003-11-01
JP2005523820A (ja) 2005-08-11
CN1650428A (zh) 2005-08-03
WO2003092069A1 (en) 2003-11-06
TW592866B (en) 2004-06-21

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase