AU2001296891A1 - Method and system for wafer and device-level testing of an integrated circuit - Google Patents
Method and system for wafer and device-level testing of an integrated circuitInfo
- Publication number
- AU2001296891A1 AU2001296891A1 AU2001296891A AU9689101A AU2001296891A1 AU 2001296891 A1 AU2001296891 A1 AU 2001296891A1 AU 2001296891 A AU2001296891 A AU 2001296891A AU 9689101 A AU9689101 A AU 9689101A AU 2001296891 A1 AU2001296891 A1 AU 2001296891A1
- Authority
- AU
- Australia
- Prior art keywords
- wafer
- integrated circuit
- level testing
- testing
- level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/006—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation at wafer scale level, i.e. wafer scale integration [WSI]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
- G01R31/318511—Wafer Test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31905—Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31924—Voltage or current aspects, e.g. driver, receiver
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31926—Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1066—Output synchronization
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
- G01R31/3016—Delay or race condition test, e.g. race hazard test
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US23464700P | 2000-09-22 | 2000-09-22 | |
US60/234,647 | 2000-09-22 | ||
PCT/US2001/042264 WO2002025296A2 (en) | 2000-09-22 | 2001-09-24 | Method and system for wafer and device-level testing of an integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001296891A1 true AU2001296891A1 (en) | 2002-04-02 |
Family
ID=22882220
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001296891A Abandoned AU2001296891A1 (en) | 2000-09-22 | 2001-09-24 | Method and system for wafer and device-level testing of an integrated circuit |
Country Status (3)
Country | Link |
---|---|
US (1) | US6927591B2 (en) |
AU (1) | AU2001296891A1 (en) |
WO (1) | WO2002025296A2 (en) |
Families Citing this family (39)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6801869B2 (en) * | 2000-02-22 | 2004-10-05 | Mccord Don | Method and system for wafer and device-level testing of an integrated circuit |
US20030120989A1 (en) * | 2001-12-26 | 2003-06-26 | Zumkehr John F. | Method and circuit to implement double data rate testing |
DE10319516A1 (en) * | 2003-04-30 | 2004-12-09 | Infineon Technologies Ag | High-speed semiconductor memory modules test method, especially for DDR-DRAM, in which a number of suitable memory control units are selected as test memory control units and provided as part of a test device |
DE10323413B4 (en) * | 2003-05-23 | 2006-01-19 | Infineon Technologies Ag | Test method, test socket and test arrangement for high-speed semiconductor memory devices |
DE10330037B3 (en) * | 2003-07-03 | 2005-01-20 | Infineon Technologies Ag | Adapter card for operation of data processor memory module in different test modes via memory device of adapter card holding test mode data and data bus selectively coupled to memory module interface |
US20050086037A1 (en) * | 2003-09-29 | 2005-04-21 | Pauley Robert S. | Memory device load simulator |
US7295480B2 (en) * | 2003-12-18 | 2007-11-13 | Agere Systems Inc | Semiconductor memory repair methodology using quasi-non-volatile memory |
US8581610B2 (en) * | 2004-04-21 | 2013-11-12 | Charles A Miller | Method of designing an application specific probe card test system |
US7304905B2 (en) * | 2004-05-24 | 2007-12-04 | Intel Corporation | Throttling memory in response to an internal temperature of a memory device |
US7173446B2 (en) * | 2004-06-24 | 2007-02-06 | Intel Corporation | Mechanism to stabilize power delivered to a device under test |
US7415646B1 (en) | 2004-09-22 | 2008-08-19 | Spansion Llc | Page—EXE erase algorithm for flash memory |
US7487571B2 (en) * | 2004-11-29 | 2009-02-10 | Fong Luk | Control adjustable device configurations to induce parameter variations to control parameter skews |
US7543200B2 (en) * | 2005-02-17 | 2009-06-02 | Advantest Corporation | Method and system for scheduling tests in a parallel test system |
US7457978B2 (en) * | 2005-05-09 | 2008-11-25 | Micron Technology, Inc. | Adjustable byte lane offset for memory module to reduce skew |
JP2007066026A (en) * | 2005-08-31 | 2007-03-15 | Renesas Technology Corp | Semiconductor device and testing method and manufacturing method thereof |
US7396693B2 (en) * | 2005-09-14 | 2008-07-08 | Semiconductor Manufacturing International (Shanghai) Corporation | Multiple point gate oxide integrity test method and system for the manufacture of semiconductor integrated circuits |
US8028207B1 (en) * | 2005-09-28 | 2011-09-27 | Google Inc. | Early memory test |
JP5497631B2 (en) * | 2007-04-26 | 2014-05-21 | アギア システムズ インコーポレーテッド | Built-in memory repair method based on fuse burn-in state machine and fuse download state machine |
JP5160856B2 (en) * | 2007-10-24 | 2013-03-13 | ルネサスエレクトロニクス株式会社 | DDR memory controller and semiconductor device |
US8095841B2 (en) * | 2008-08-19 | 2012-01-10 | Formfactor, Inc. | Method and apparatus for testing semiconductor devices with autonomous expected value generation |
TWI382186B (en) * | 2009-04-02 | 2013-01-11 | Maintek Comp Suzhou Co Ltd | Apparatus for automatically powering up circuit board |
KR101535228B1 (en) * | 2009-05-13 | 2015-07-08 | 삼성전자주식회사 | Built off test apparatus |
FR2947119B1 (en) * | 2009-06-18 | 2011-07-01 | Amcad Engineering | METHOD AND SYSTEM FOR OPTIMALLY ADAPTING SOURCE IMPEDANCE INTO ENTRY OF ELECTRONIC COMPONENTS, PARTICULARLY TRANSISTORS |
US9581638B2 (en) * | 2013-03-13 | 2017-02-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Chip-on-wafer process control monitoring for chip-on-wafer-on-substrate packages |
KR101520055B1 (en) * | 2013-07-31 | 2015-05-19 | 에스케이하이닉스 주식회사 | Device for calculating round trip time of memory test using programmable logic |
US11031091B2 (en) | 2013-07-31 | 2021-06-08 | Unitest Inc. | Apparatus and method for measuring round-trip time of test signal using programmable logic |
US20150109015A1 (en) * | 2013-10-22 | 2015-04-23 | Ati Technologies Ulc | System-level testing of non-singulated integrated circuit die on a wafer |
US9613715B2 (en) | 2014-06-16 | 2017-04-04 | Sandisk Technologies Llc | Low-test memory stack for non-volatile storage |
US9653184B2 (en) * | 2014-06-16 | 2017-05-16 | Sandisk Technologies Llc | Non-volatile memory module with physical-to-physical address remapping |
US9606882B2 (en) | 2014-07-17 | 2017-03-28 | Sandisk Technologies Llc | Methods and systems for die failure testing |
KR101631461B1 (en) * | 2014-09-30 | 2016-06-17 | 주식회사 네오셈 | Memory Device Test Apparatus and Method |
CN106161132B (en) * | 2015-04-17 | 2019-10-01 | 伊姆西公司 | Device and method for being tested storage network |
WO2017129242A1 (en) | 2016-01-27 | 2017-08-03 | Advantest Corporation | Deterministic concurrent test program executor for an automated test equipment |
US11037651B2 (en) * | 2018-11-07 | 2021-06-15 | Qualcomm Incorporated | Dual tap architecture for enabling secure access for DDR memory test controller |
US11221361B2 (en) * | 2019-09-03 | 2022-01-11 | Teradyne, Inc. | Controlling power dissipation in an output stage of a test channel |
US20220147131A1 (en) * | 2020-11-10 | 2022-05-12 | Micron Technology, Inc. | Power management for a memory device |
CN112885403B (en) * | 2021-02-08 | 2023-07-14 | 山东云海国创云计算装备产业创新中心有限公司 | Function test method, device and equipment of Flash controller |
CN115561566A (en) * | 2021-07-02 | 2023-01-03 | 长鑫存储技术有限公司 | Time compensation method and device for test signal |
CN113640556B (en) * | 2021-08-11 | 2023-03-03 | 山东大学 | Probe card of probe station |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4342958A (en) * | 1980-03-28 | 1982-08-03 | Honeywell Information Systems Inc. | Automatic test equipment test probe contact isolation detection method |
US5522737A (en) | 1992-03-24 | 1996-06-04 | Molex Incorporated | Impedance and inductance control in electrical connectors and including reduced crosstalk |
US5268639A (en) | 1992-06-05 | 1993-12-07 | Rambus, Inc. | Testing timing parameters of high speed integrated circuit devices |
JP3376731B2 (en) | 1994-11-09 | 2003-02-10 | 東京エレクトロン株式会社 | High frequency printed circuit board and probe card using the same |
US6587896B1 (en) | 1998-02-27 | 2003-07-01 | Micron Technology, Inc. | Impedance matching device for high speed memory bus |
US6664628B2 (en) | 1998-07-13 | 2003-12-16 | Formfactor, Inc. | Electronic component overlapping dice of unsingulated semiconductor wafer |
WO2000013186A1 (en) * | 1998-08-26 | 2000-03-09 | Tanisys Technology, Inc. | Method and system for timing control in the testing of rambus memory modules |
US6236572B1 (en) | 1999-02-04 | 2001-05-22 | Dell Usa, L.P. | Controlled impedance bus and method for a computer system |
US6218910B1 (en) | 1999-02-25 | 2001-04-17 | Formfactor, Inc. | High bandwidth passive integrated circuit tester probe card assembly |
US6459343B1 (en) | 1999-02-25 | 2002-10-01 | Formfactor, Inc. | Integrated circuit interconnect system forming a multi-pole filter |
US6452411B1 (en) | 1999-03-01 | 2002-09-17 | Formfactor, Inc. | Efficient parallel testing of integrated circuit devices using a known good device to generate expected responses |
AU1583001A (en) | 1999-11-05 | 2001-06-06 | Don Mccord | Method and system for wafer and device-level testing of an integrated circuit |
US6339338B1 (en) * | 2000-01-18 | 2002-01-15 | Formfactor, Inc. | Apparatus for reducing power supply noise in an integrated circuit |
US6801869B2 (en) | 2000-02-22 | 2004-10-05 | Mccord Don | Method and system for wafer and device-level testing of an integrated circuit |
TW518701B (en) | 2000-04-19 | 2003-01-21 | Samsung Electronics Co Ltd | Interface board and method for testing semiconductor integrated circuit device by using the interface board |
US6622103B1 (en) * | 2000-06-20 | 2003-09-16 | Formfactor, Inc. | System for calibrating timing of an integrated circuit wafer tester |
-
2001
- 2001-09-24 WO PCT/US2001/042264 patent/WO2002025296A2/en active Application Filing
- 2001-09-24 AU AU2001296891A patent/AU2001296891A1/en not_active Abandoned
- 2001-09-24 US US10/130,842 patent/US6927591B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
WO2002025296A2 (en) | 2002-03-28 |
WO2002025296A3 (en) | 2003-01-16 |
US20030076125A1 (en) | 2003-04-24 |
US6927591B2 (en) | 2005-08-09 |
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