AU2001291552A1 - Method and system for testing and/or diagnosing circuits using test controller access data - Google Patents
Method and system for testing and/or diagnosing circuits using test controller access dataInfo
- Publication number
- AU2001291552A1 AU2001291552A1 AU2001291552A AU9155201A AU2001291552A1 AU 2001291552 A1 AU2001291552 A1 AU 2001291552A1 AU 2001291552 A AU2001291552 A AU 2001291552A AU 9155201 A AU9155201 A AU 9155201A AU 2001291552 A1 AU2001291552 A1 AU 2001291552A1
- Authority
- AU
- Australia
- Prior art keywords
- testing
- access data
- test controller
- controller access
- diagnosing circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
- G01R31/318307—Generation of test inputs, e.g. test vectors, patterns or sequences computer-aided, e.g. automatic test program generator [ATPG], program translations, test program debugging
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31724—Test controller, e.g. BIST state machine
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
- G01R31/318342—Generation of test inputs, e.g. test vectors, patterns or sequences by preliminary fault modelling, e.g. analysis, simulation
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
- G01R31/318371—Methodologies therefor, e.g. algorithms, procedures
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002321346A CA2321346A1 (en) | 2000-09-28 | 2000-09-28 | Method, system and program product for testing and/or diagnosing circuits using embedded test controller access data |
CA2321346 | 2000-09-28 | ||
PCT/CA2001/001296 WO2002027340A2 (en) | 2000-09-28 | 2001-09-14 | Method and system for testing and/or diagnosing circuits using test controller access data |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001291552A1 true AU2001291552A1 (en) | 2002-04-08 |
Family
ID=4167265
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001291552A Abandoned AU2001291552A1 (en) | 2000-09-28 | 2001-09-14 | Method and system for testing and/or diagnosing circuits using test controller access data |
Country Status (5)
Country | Link |
---|---|
US (1) | US6961871B2 (en) |
JP (1) | JP2004509425A (en) |
AU (1) | AU2001291552A1 (en) |
CA (1) | CA2321346A1 (en) |
WO (1) | WO2002027340A2 (en) |
Families Citing this family (71)
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US20030188044A1 (en) * | 2002-03-28 | 2003-10-02 | International Business Machines Corporation | System and method for verifying superscalar computer architectures |
US6925406B2 (en) * | 2002-06-21 | 2005-08-02 | Teseda Corporation | Scan test viewing and analysis tool |
US7385927B2 (en) * | 2002-06-24 | 2008-06-10 | Lsi Logic Corporation | Methods and structure for improved testing of embedded systems |
US6898545B2 (en) * | 2002-06-28 | 2005-05-24 | Agilent Technologies Inc | Semiconductor test data analysis system |
DE60224378T2 (en) * | 2002-07-19 | 2009-01-02 | Qimonda Ag | Method for generating a test pattern for the simulation and / or testing of the layout of an integrated circuit |
WO2004017083A1 (en) * | 2002-08-14 | 2004-02-26 | Koninklijke Philips Electronics N.V. | Module, electronic device and evaluation tool |
JP4179839B2 (en) * | 2002-10-02 | 2008-11-12 | 株式会社ルネサステクノロジ | IP generation system and IP supply device |
US7131046B2 (en) * | 2002-12-03 | 2006-10-31 | Verigy Ipco | System and method for testing circuitry using an externally generated signature |
US7437261B2 (en) * | 2003-02-14 | 2008-10-14 | Advantest Corporation | Method and apparatus for testing integrated circuits |
US7155370B2 (en) * | 2003-03-20 | 2006-12-26 | Intel Corporation | Reusable, built-in self-test methodology for computer systems |
US7146539B2 (en) * | 2003-07-15 | 2006-12-05 | Verigy Ipco | Systems and methods for testing a device-under-test |
US7509226B2 (en) * | 2003-06-25 | 2009-03-24 | Teradyne, Inc. | Apparatus and method for testing non-deterministic device data |
US20050010650A1 (en) * | 2003-07-11 | 2005-01-13 | Ying-Chuan Tsai | Network-based computer platform external access method and system |
US7231616B1 (en) * | 2003-08-20 | 2007-06-12 | Adaptec, Inc. | Method and apparatus for accelerating test case development |
US7363567B2 (en) * | 2003-08-28 | 2008-04-22 | Agilent Technologies, Inc. | System and method for electronic device testing using random parameter looping |
US20050080581A1 (en) * | 2003-09-22 | 2005-04-14 | David Zimmerman | Built-in self test for memory interconnect testing |
JP2005127765A (en) * | 2003-10-22 | 2005-05-19 | Toshiba Corp | Semiconductor test module and test method of semiconductor device |
US7096142B2 (en) * | 2004-04-02 | 2006-08-22 | Agilent Technologies, Inc. | Report format editor for circuit test |
US7430486B2 (en) * | 2004-05-22 | 2008-09-30 | Advantest America R&D Center, Inc. | Datalog support in a modular test system |
US7321999B2 (en) * | 2004-10-05 | 2008-01-22 | Verigy (Singapore) Pte. Ltd. | Methods and apparatus for programming and operating automated test equipment |
US7376876B2 (en) * | 2004-12-23 | 2008-05-20 | Honeywell International Inc. | Test program set generation tool |
US8126577B2 (en) | 2005-06-03 | 2012-02-28 | Neophotonics Corporation | Monitoring and control of electronic devices |
US8225151B2 (en) * | 2005-06-13 | 2012-07-17 | Infineon Technologies Ag | Integrated circuit and test method |
US7660412B1 (en) * | 2005-12-09 | 2010-02-09 | Trend Micro Incorporated | Generation of debug information for debugging a network security appliance |
US7509611B2 (en) * | 2006-02-07 | 2009-03-24 | International Business Machines Corporation | Heuristic clustering of circuit elements in a circuit design |
US7398505B2 (en) * | 2006-02-07 | 2008-07-08 | International Business Machines Corporation | Automatic back annotation of a functional definition of an integrated circuit design based upon physical layout |
DE102006009224B4 (en) * | 2006-02-28 | 2017-04-06 | Advanced Micro Devices, Inc. | Selection of a test algorithm in a controller for built-in memory self-test |
US8098797B2 (en) | 2006-12-27 | 2012-01-17 | Verizon Patent And Licensing Inc. | Self-service circuit testing systems and methods |
US7778799B2 (en) * | 2007-01-02 | 2010-08-17 | Hypertherm, Inc. | Automated self test for a thermal processing system |
US7664613B2 (en) * | 2007-04-03 | 2010-02-16 | Honeywell International Inc. | System and method of data harvesting |
US20090013218A1 (en) * | 2007-07-02 | 2009-01-08 | Optimal Test Ltd. | Datalog management in semiconductor testing |
TWI412927B (en) * | 2008-05-09 | 2013-10-21 | Wistron Corp | Method of testing a display and related apparatus |
CN102077102B (en) * | 2008-07-02 | 2013-06-19 | 爱德万测试株式会社 | Test equipment and method |
EP2321751A4 (en) * | 2008-07-07 | 2014-03-05 | Quali Systems Ltd | System and method for automatic hardware and software sequencing of computer-aided design (cad) functionality testing |
US8296092B2 (en) * | 2008-08-15 | 2012-10-23 | International Business Machines Corporation | Platform specific test for computing hardware |
US20100076724A1 (en) * | 2008-09-23 | 2010-03-25 | Harold Lee Brown | Method for capturing and analyzing test result data |
US7839155B2 (en) * | 2008-12-15 | 2010-11-23 | Texas Instruments Incorporated | Methods and apparatus to analyze on-chip controlled integrated circuits |
US10444744B1 (en) * | 2011-01-28 | 2019-10-15 | Amazon Technologies, Inc. | Decoupled load generation architecture |
US20130227367A1 (en) * | 2012-01-17 | 2013-08-29 | Allen J. Czamara | Test IP-Based A.T.E. Instrument Architecture |
US9910086B2 (en) | 2012-01-17 | 2018-03-06 | Allen Czamara | Test IP-based A.T.E. instrument architecture |
US9121892B2 (en) * | 2012-08-13 | 2015-09-01 | Analog Devices Global | Semiconductor circuit and methodology for in-system scan testing |
US9213613B2 (en) * | 2012-11-16 | 2015-12-15 | Nvidia Corporation | Test program generator using key enumeration and string replacement |
KR101511604B1 (en) | 2013-02-26 | 2015-04-14 | 한국항공우주산업 주식회사 | Automatic Generating Device for a Circuit Test Program of Harness Drawings and Controlling Method for the Same |
US20150026528A1 (en) * | 2013-07-16 | 2015-01-22 | Manuel A. d'Abreu | Controller based memory evaluation |
US9286181B2 (en) * | 2013-07-31 | 2016-03-15 | Globalfoundries Inc. | Apparatus for capturing results of memory testing |
CN104459522B (en) * | 2013-09-17 | 2018-01-23 | 比亚迪股份有限公司 | chip self-testing method and system |
FR3015723A1 (en) * | 2013-12-21 | 2015-06-26 | Expressive Data | METHOD FOR PRODUCING BUSINESS DATA IN RELATION TO A TEST OF A PLURALITY OF PRODUCTS, SERVER USING THE METHOD, SYSTEM AND COMPUTER PROGRAMS THEREFOR |
JP5963316B2 (en) * | 2014-02-20 | 2016-08-03 | インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Machines Corporation | Generating apparatus, generating method, and program |
US9372626B2 (en) * | 2014-06-12 | 2016-06-21 | Lenovo Enterprise Solutions (Singapore) Pte. Ltg. | Parallel storage system testing wherein I/O test pattern identifies one or more set of jobs to be executed concurrently |
US20160003900A1 (en) * | 2014-07-04 | 2016-01-07 | Texas Instruments Incorporated | Self-test methods and systems for digital circuits |
US9311444B1 (en) * | 2014-07-10 | 2016-04-12 | Sandia Corporation | Integrated circuit test-port architecture and method and apparatus of test-port generation |
US10592370B2 (en) * | 2017-04-28 | 2020-03-17 | Advantest Corporation | User control of automated test features with software application programming interface (API) |
EP3518441B1 (en) * | 2018-01-25 | 2023-03-22 | Rohde & Schwarz GmbH & Co. KG | Test troubleshooting system and method |
US10593419B1 (en) * | 2018-02-12 | 2020-03-17 | Cadence Design Systems, Inc. | Failing read count diagnostics for memory built-in self-test |
CN109344078B (en) * | 2018-10-29 | 2022-05-17 | 北京京航计算通讯研究所 | Time performance test method for embedded real-time operating system applying FPGA |
CN110262932A (en) * | 2019-05-31 | 2019-09-20 | 深圳市杰科数码有限公司 | Android plate test method, system and computer readable storage medium |
CN110554939A (en) * | 2019-08-01 | 2019-12-10 | 深圳亿智时代科技有限公司 | method, system and terminal for debugging embedded equipment |
CN113393892A (en) * | 2020-03-11 | 2021-09-14 | 长鑫存储技术有限公司 | Control chip test method and related equipment |
CN113391184A (en) | 2020-03-11 | 2021-09-14 | 长鑫存储技术有限公司 | Control chip test method and related equipment |
US11144696B1 (en) * | 2020-05-27 | 2021-10-12 | Chinsong Sul | Low cost design for test architecture |
CN111833959B (en) * | 2020-07-20 | 2022-08-02 | 北京百度网讯科技有限公司 | Method and device for testing memory, electronic equipment and computer readable storage medium |
KR102380506B1 (en) * | 2020-10-29 | 2022-03-31 | 포스필 주식회사 | Self diagnostic apparatus for electronic device |
CN112699030B (en) * | 2020-12-29 | 2023-10-20 | 中国航空工业集团公司西安飞机设计研究所 | Automatic testing method for power supply partition software |
CN113030702A (en) * | 2021-03-10 | 2021-06-25 | 英业达科技有限公司 | Automatic test system and method for chip |
CN113238910A (en) * | 2021-06-29 | 2021-08-10 | 长江存储科技有限责任公司 | Control device, aging test apparatus, aging test method, and storage medium |
TWI777889B (en) * | 2022-01-10 | 2022-09-11 | 芯測科技股份有限公司 | Method for generating an mbist algorithm circuit |
CN115037364B (en) * | 2022-06-08 | 2023-08-15 | 上海百功半导体有限公司 | Debugging system and method for optical communication chip |
CN115291082B (en) * | 2022-08-04 | 2023-06-13 | 北京京瀚禹电子工程技术有限公司 | Efficient test method and device for chip and storage medium |
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JPH032679A (en) * | 1989-02-23 | 1991-01-09 | Texas Instr Inc <Ti> | Test-data-formater |
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JPH04211871A (en) * | 1990-05-02 | 1992-08-03 | Toshiba Corp | Inspection supporting system for logic design |
KR970010656B1 (en) * | 1992-09-01 | 1997-06-30 | 마쯔시다 덴기 산교 가부시끼가이샤 | Semiconductor test device, semiconductor test circuit chip and probe card |
JP3212423B2 (en) * | 1993-09-30 | 2001-09-25 | 富士通株式会社 | Test pattern creation device |
US5586319A (en) * | 1994-07-27 | 1996-12-17 | Vlsi Technology, Inc. | Netlist editor allowing for direct, interactive low-level editing of netlists |
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US5745501A (en) * | 1995-10-20 | 1998-04-28 | Motorola, Inc. | Apparatus and method for generating integrated circuit test patterns |
JP3003587B2 (en) * | 1996-08-02 | 2000-01-31 | 日本電気株式会社 | Individual test program creation method |
US6114870A (en) * | 1996-10-04 | 2000-09-05 | Texas Instruments Incorporated | Test system and process with a microcomputer at each test location |
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US6061283A (en) * | 1998-10-23 | 2000-05-09 | Advantest Corp. | Semiconductor integrated circuit evaluation system |
US6757837B1 (en) * | 1999-10-19 | 2004-06-29 | Tivo, Inc. | Method and apparatus for software failure diagnosis and repair |
US6681359B1 (en) * | 2000-08-07 | 2004-01-20 | Cypress Semiconductor Corp. | Semiconductor memory self-test controllable at board level using standard interface |
CA2329597A1 (en) * | 2000-12-22 | 2002-06-22 | Logicvision, Inc. | Method for scan controlled sequential sampling of analog signals and circuit for use therewith |
-
2000
- 2000-09-28 CA CA002321346A patent/CA2321346A1/en not_active Abandoned
-
2001
- 2001-09-14 WO PCT/CA2001/001296 patent/WO2002027340A2/en active Application Filing
- 2001-09-14 AU AU2001291552A patent/AU2001291552A1/en not_active Abandoned
- 2001-09-14 JP JP2002530868A patent/JP2004509425A/en active Pending
- 2001-09-18 US US09/954,078 patent/US6961871B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6961871B2 (en) | 2005-11-01 |
WO2002027340A2 (en) | 2002-04-04 |
CA2321346A1 (en) | 2002-03-28 |
WO2002027340A3 (en) | 2002-05-16 |
US20020073374A1 (en) | 2002-06-13 |
JP2004509425A (en) | 2004-03-25 |
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