AU2001238287A1 - Dmos transistor structure having improved performance - Google Patents

Dmos transistor structure having improved performance

Info

Publication number
AU2001238287A1
AU2001238287A1 AU2001238287A AU3828701A AU2001238287A1 AU 2001238287 A1 AU2001238287 A1 AU 2001238287A1 AU 2001238287 A AU2001238287 A AU 2001238287A AU 3828701 A AU3828701 A AU 3828701A AU 2001238287 A1 AU2001238287 A1 AU 2001238287A1
Authority
AU
Australia
Prior art keywords
improved performance
transistor structure
dmos transistor
dmos
performance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001238287A
Inventor
Fwu-Iuan Hshieh
Koon Chong So
Yan Man Tsui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Semiconductor Inc
Original Assignee
General Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Semiconductor Inc filed Critical General Semiconductor Inc
Publication of AU2001238287A1 publication Critical patent/AU2001238287A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0626Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a localised breakdown region, e.g. built-in avalanching region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843Source or drain regions of field-effect devices
    • H01L29/0847Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0856Source regions
    • H01L29/0865Disposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
AU2001238287A 2000-02-29 2001-02-15 Dmos transistor structure having improved performance Abandoned AU2001238287A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09515335 2000-02-29
US09/515,335 US6548860B1 (en) 2000-02-29 2000-02-29 DMOS transistor structure having improved performance
PCT/US2001/004796 WO2001065607A2 (en) 2000-02-29 2001-02-15 Trench gate dmos field-effect transistor

Publications (1)

Publication Number Publication Date
AU2001238287A1 true AU2001238287A1 (en) 2001-09-12

Family

ID=24050918

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001238287A Abandoned AU2001238287A1 (en) 2000-02-29 2001-02-15 Dmos transistor structure having improved performance

Country Status (8)

Country Link
US (1) US6548860B1 (en)
EP (2) EP2267786A3 (en)
JP (1) JP2003529209A (en)
KR (1) KR20020079919A (en)
CN (1) CN1279620C (en)
AU (1) AU2001238287A1 (en)
TW (1) TW493280B (en)
WO (1) WO2001065607A2 (en)

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DE10127885B4 (en) * 2001-06-08 2009-09-24 Infineon Technologies Ag Trench power semiconductor device
US6838722B2 (en) * 2002-03-22 2005-01-04 Siliconix Incorporated Structures of and methods of fabricating trench-gated MIS devices
US8629019B2 (en) * 2002-09-24 2014-01-14 Vishay-Siliconix Method of forming self aligned contacts for a power MOSFET
US7494876B1 (en) 2005-04-21 2009-02-24 Vishay Siliconix Trench-gated MIS device having thick polysilicon insulation layer at trench bottom and method of fabricating the same
US7583485B1 (en) 2005-07-26 2009-09-01 Vishay-Siliconix Electrostatic discharge protection circuit for integrated circuits
US7544545B2 (en) * 2005-12-28 2009-06-09 Vishay-Siliconix Trench polysilicon diode
WO2007084688A1 (en) * 2006-01-18 2007-07-26 Vishay-Siliconix Floating gate structure with high electrostatic discharge performance
DE102006029750B4 (en) * 2006-06-28 2010-12-02 Infineon Technologies Austria Ag Trench transistor and method of manufacture
US20080206944A1 (en) * 2007-02-23 2008-08-28 Pan-Jit International Inc. Method for fabricating trench DMOS transistors and schottky elements
US10600902B2 (en) 2008-02-13 2020-03-24 Vishay SIliconix, LLC Self-repairing field effect transisitor
US9230810B2 (en) 2009-09-03 2016-01-05 Vishay-Siliconix System and method for substrate wafer back side and edge cross section seals
US9425305B2 (en) 2009-10-20 2016-08-23 Vishay-Siliconix Structures of and methods of fabricating split gate MIS devices
US9419129B2 (en) 2009-10-21 2016-08-16 Vishay-Siliconix Split gate semiconductor device with curved gate oxide profile
US9577089B2 (en) 2010-03-02 2017-02-21 Vishay-Siliconix Structures and methods of fabricating dual gate devices
CN103688363B (en) 2011-05-18 2017-08-04 威世硅尼克斯公司 Semiconductor devices
JP6524279B2 (en) * 2011-08-24 2019-06-05 ローム株式会社 Semiconductor device and method of manufacturing the same
JP6290526B2 (en) 2011-08-24 2018-03-07 ローム株式会社 Semiconductor device and manufacturing method thereof
JP6219140B2 (en) * 2013-11-22 2017-10-25 ルネサスエレクトロニクス株式会社 Semiconductor device
EP3183753A4 (en) 2014-08-19 2018-01-10 Vishay-Siliconix Electronic circuit
US11217541B2 (en) 2019-05-08 2022-01-04 Vishay-Siliconix, LLC Transistors with electrically active chip seal ring and methods of manufacture
US11218144B2 (en) 2019-09-12 2022-01-04 Vishay-Siliconix, LLC Semiconductor device with multiple independent gates

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58100460A (en) 1981-12-11 1983-06-15 Hitachi Ltd Vertical type metal oxide semiconductor device
US5072266A (en) 1988-12-27 1991-12-10 Siliconix Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
JPH0354868A (en) 1989-07-21 1991-03-08 Fuji Electric Co Ltd Mos type semiconductor device
JP3170966B2 (en) * 1993-08-25 2001-05-28 富士電機株式会社 Insulated gate control semiconductor device and manufacturing method thereof
JPH0878668A (en) * 1994-08-31 1996-03-22 Toshiba Corp Semiconductor device for power
US5688725A (en) * 1994-12-30 1997-11-18 Siliconix Incorporated Method of making a trench mosfet with heavily doped delta layer to provide low on-resistance
US5998837A (en) * 1995-06-02 1999-12-07 Siliconix Incorporated Trench-gated power MOSFET with protective diode having adjustable breakdown voltage
US5763915A (en) 1996-02-27 1998-06-09 Magemos Corporation DMOS transistors having trenched gate oxide
JP3257394B2 (en) * 1996-04-04 2002-02-18 株式会社日立製作所 Voltage driven semiconductor device
US5998266A (en) 1996-12-19 1999-12-07 Magepower Semiconductor Corp. Method of forming a semiconductor structure having laterally merged body layer
US5986304A (en) 1997-01-13 1999-11-16 Megamos Corporation Punch-through prevention in trenched DMOS with poly-silicon layer covering trench corners

Also Published As

Publication number Publication date
CN1416597A (en) 2003-05-07
WO2001065607A2 (en) 2001-09-07
EP1266406B1 (en) 2011-11-30
EP2267786A3 (en) 2011-01-12
CN1279620C (en) 2006-10-11
TW493280B (en) 2002-07-01
KR20020079919A (en) 2002-10-19
WO2001065607A3 (en) 2002-05-30
JP2003529209A (en) 2003-09-30
EP1266406A2 (en) 2002-12-18
EP2267786A2 (en) 2010-12-29
US6548860B1 (en) 2003-04-15

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