AU1652392A - Low power computer architecture and method - Google Patents

Low power computer architecture and method

Info

Publication number
AU1652392A
AU1652392A AU16523/92A AU1652392A AU1652392A AU 1652392 A AU1652392 A AU 1652392A AU 16523/92 A AU16523/92 A AU 16523/92A AU 1652392 A AU1652392 A AU 1652392A AU 1652392 A AU1652392 A AU 1652392A
Authority
AU
Australia
Prior art keywords
dynamic
architecture
components
circuitry
registers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU16523/92A
Other languages
English (en)
Inventor
Robert William Donner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Echelon Corp
Original Assignee
Echelon Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Echelon Corp filed Critical Echelon Corp
Publication of AU1652392A publication Critical patent/AU1652392A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Advance Control (AREA)
  • Power Sources (AREA)
  • Executing Machine-Instructions (AREA)
  • Microcomputers (AREA)
AU16523/92A 1991-03-28 1992-03-27 Low power computer architecture and method Abandoned AU1652392A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/677,648 US5203003A (en) 1991-03-28 1991-03-28 Computer architecture for conserving power by using shared resources and method for suspending processor execution in pipeline
US677648 1991-03-28

Publications (1)

Publication Number Publication Date
AU1652392A true AU1652392A (en) 1992-11-02

Family

ID=24719587

Family Applications (1)

Application Number Title Priority Date Filing Date
AU16523/92A Abandoned AU1652392A (en) 1991-03-28 1992-03-27 Low power computer architecture and method

Country Status (6)

Country Link
US (1) US5203003A (OSRAM)
EP (1) EP0577721B1 (OSRAM)
AT (1) ATE177545T1 (OSRAM)
AU (1) AU1652392A (OSRAM)
DE (1) DE69228600T2 (OSRAM)
WO (1) WO1992017837A1 (OSRAM)

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US5861894A (en) 1993-06-24 1999-01-19 Discovision Associates Buffer manager
JP2748822B2 (ja) * 1993-07-05 1998-05-13 日本電気株式会社 情報処理装置
JP2636695B2 (ja) * 1993-08-03 1997-07-30 日本電気株式会社 パイプライン処理回路
US5574772A (en) * 1993-11-01 1996-11-12 Scalisi; Joseph F. Personal apparatus for receiving radiotelephone communications
US5706407A (en) * 1993-12-28 1998-01-06 Kabushiki Kaisha Toshiba System for reallocation of memory banks in memory sized order
US5801973A (en) 1994-07-29 1998-09-01 Discovision Associates Video decompression
US5603038A (en) * 1994-09-07 1997-02-11 International Business Machines Corporation Automatic restoration of user options after power loss
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US5852737A (en) * 1995-04-24 1998-12-22 National Semiconductor Corporation Method and apparatus for operating digital static CMOS components in a very low voltage mode during power-down
US5587672A (en) * 1995-09-25 1996-12-24 Neomagic Corp. Dynamic logic having power-down mode with periodic clock refresh for a low-power graphics controller
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US6317803B1 (en) * 1996-03-29 2001-11-13 Intel Corporation High-throughput interconnect having pipelined and non-pipelined bus transaction modes
US5742781A (en) * 1996-08-09 1998-04-21 Hitachi America, Ltd. Decoded instruction buffer apparatus and method for reducing power consumption in a digital signal processor
US5949261A (en) 1996-12-17 1999-09-07 Cypress Semiconductor Corp. Method and circuit for reducing power and/or current consumption
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US5970241A (en) * 1997-11-19 1999-10-19 Texas Instruments Incorporated Maintaining synchronism between a processor pipeline and subsystem pipelines during debugging of a data processing system
US6065122A (en) * 1998-03-13 2000-05-16 Compaq Computer Corporation Smart battery power management in a computer system
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US6550005B1 (en) * 1999-11-29 2003-04-15 Arm Limited Mechanism for recovery from termination of a program instruction due to an exception in a pipeland processing system
US7260731B1 (en) 2000-10-23 2007-08-21 Transmeta Corporation Saving power when in or transitioning to a static mode of a processor
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US8493120B2 (en) 2011-03-10 2013-07-23 Arm Limited Storage circuitry and method with increased resilience to single event upsets
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Also Published As

Publication number Publication date
EP0577721A4 (OSRAM) 1994-01-26
DE69228600D1 (de) 1999-04-15
DE69228600T2 (de) 1999-10-14
ATE177545T1 (de) 1999-03-15
EP0577721A1 (en) 1994-01-12
EP0577721B1 (en) 1999-03-10
US5203003A (en) 1993-04-13
WO1992017837A1 (en) 1992-10-15

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