ATE553436T1 - Dma-transfereinrichtung und verfahren - Google Patents

Dma-transfereinrichtung und verfahren

Info

Publication number
ATE553436T1
ATE553436T1 AT08712081T AT08712081T ATE553436T1 AT E553436 T1 ATE553436 T1 AT E553436T1 AT 08712081 T AT08712081 T AT 08712081T AT 08712081 T AT08712081 T AT 08712081T AT E553436 T1 ATE553436 T1 AT E553436T1
Authority
AT
Austria
Prior art keywords
data
transfer
dma controller
queuing
shared memory
Prior art date
Application number
AT08712081T
Other languages
English (en)
Inventor
Tomoyoshi Kobori
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Application granted granted Critical
Publication of ATE553436T1 publication Critical patent/ATE553436T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Control Of Position, Course, Altitude, Or Attitude Of Moving Bodies (AREA)
  • Arrangement Or Mounting Of Control Devices For Change-Speed Gearing (AREA)
AT08712081T 2007-02-28 2008-02-28 Dma-transfereinrichtung und verfahren ATE553436T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007049976 2007-02-28
PCT/JP2008/053510 WO2008105494A1 (ja) 2007-02-28 2008-02-28 Ｄｍａ転送装置及び方法

Publications (1)

Publication Number Publication Date
ATE553436T1 true ATE553436T1 (de) 2012-04-15

Family

ID=39721318

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08712081T ATE553436T1 (de) 2007-02-28 2008-02-28 Dma-transfereinrichtung und verfahren

Country Status (5)

Country Link
US (1) US9367496B2 (de)
EP (1) EP2133797B1 (de)
JP (1) JP5360594B2 (de)
AT (1) ATE553436T1 (de)
WO (1) WO2008105494A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10248587B2 (en) 2013-11-08 2019-04-02 Sandisk Technologies Llc Reduced host data command processing
WO2015067983A1 (en) * 2013-11-08 2015-05-14 Sandisk Il Ltd. Reduced host data command processing
US8984179B1 (en) * 2013-11-15 2015-03-17 International Business Machines Corporation Determining a direct memory access data transfer mode

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Also Published As

Publication number Publication date
EP2133797A1 (de) 2009-12-16
EP2133797B1 (de) 2012-04-11
JPWO2008105494A1 (ja) 2010-06-03
US20100106865A1 (en) 2010-04-29
WO2008105494A1 (ja) 2008-09-04
EP2133797A4 (de) 2010-12-08
US9367496B2 (en) 2016-06-14
JP5360594B2 (ja) 2013-12-04

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