ATE521037T1 - Anforderungssteuerung, verarbeitungseinheit, verfahren zur steuerung von anforderungen und computerprogrammprodukt - Google Patents

Anforderungssteuerung, verarbeitungseinheit, verfahren zur steuerung von anforderungen und computerprogrammprodukt

Info

Publication number
ATE521037T1
ATE521037T1 AT07705825T AT07705825T ATE521037T1 AT E521037 T1 ATE521037 T1 AT E521037T1 AT 07705825 T AT07705825 T AT 07705825T AT 07705825 T AT07705825 T AT 07705825T AT E521037 T1 ATE521037 T1 AT E521037T1
Authority
AT
Austria
Prior art keywords
budget
controller
processing unit
request
resource
Prior art date
Application number
AT07705825T
Other languages
English (en)
Inventor
Florian Bogenberger
Vladimir Litovtchenko
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Application granted granted Critical
Publication of ATE521037T1 publication Critical patent/ATE521037T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
  • Stored Programmes (AREA)
AT07705825T 2007-02-08 2007-02-08 Anforderungssteuerung, verarbeitungseinheit, verfahren zur steuerung von anforderungen und computerprogrammprodukt ATE521037T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/IB2007/050420 WO2008096208A1 (en) 2007-02-08 2007-02-08 Request controller, processing unit, method for controlling requests and computer program product

Publications (1)

Publication Number Publication Date
ATE521037T1 true ATE521037T1 (de) 2011-09-15

Family

ID=38100607

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07705825T ATE521037T1 (de) 2007-02-08 2007-02-08 Anforderungssteuerung, verarbeitungseinheit, verfahren zur steuerung von anforderungen und computerprogrammprodukt

Country Status (4)

Country Link
US (1) US8429321B2 (de)
EP (1) EP2111584B1 (de)
AT (1) ATE521037T1 (de)
WO (1) WO2008096208A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008099238A1 (en) * 2007-02-16 2008-08-21 Freescale Semiconductor, Inc. Request controller, processing unit, arrangement, method for controlling requests and computer program product
WO2013136114A1 (en) 2012-03-12 2013-09-19 Freescale Semiconductor, Inc. Interrupt supervision system, processing system and method for interrupt supervision
CN109298922A (zh) * 2018-08-30 2019-02-01 百度在线网络技术（北京）有限公司 并行任务处理方法、协程框架、设备、介质和无人车

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3544079C2 (de) 1985-12-13 1998-07-30 Bosch Gmbh Robert Verfahren zur Verarbeitung von Interrupt-Signalen
US4930068A (en) 1986-11-07 1990-05-29 Nec Corporation Data processor having different interrupt processing modes
JP2507833B2 (ja) 1990-12-25 1996-06-19 三菱電機株式会社 マイクロコンピュ−タ
JPH04246763A (ja) 1991-01-31 1992-09-02 Nec Corp マルチプロセッサ回路
US5542076A (en) 1991-06-14 1996-07-30 Digital Equipment Corporation Method and apparatus for adaptive interrupt servicing in data processing system
US5535397A (en) 1993-06-30 1996-07-09 Intel Corporation Method and apparatus for providing a context switch in response to an interrupt in a computer process
US5805902A (en) 1993-07-02 1998-09-08 Elonex I.P. Holdings, Ltd. Structure and method for issuing interrupt requests as addresses and for decoding the addresses issued as interrupt requests
JPH07244649A (ja) 1994-03-08 1995-09-19 Fujitsu Ltd 割込処理分散方式
KR100218675B1 (ko) 1996-12-04 1999-09-01 정선종 지능적 우선순위 결정 방식의 다중 인터럽트 제어기 및 그 제어 방법
US6185639B1 (en) 1998-06-05 2001-02-06 International Business Machines Corporation System and method to reduce a computer system's interrupt processing overhead
US6065089A (en) 1998-06-25 2000-05-16 Lsi Logic Corporation Method and apparatus for coalescing I/O interrupts that efficiently balances performance and latency
US6216182B1 (en) 1998-07-30 2001-04-10 Fore Systems, Inc. Method and apparatus for serving data with adaptable interrupts
WO2000052586A1 (en) 1999-03-01 2000-09-08 Sun Microsystems, Inc. Method and apparatus for modulating interrupts in a network interface
US20020161961A1 (en) 2001-01-17 2002-10-31 Ajile Systems, Inc. Multiple virtual machine environment management system
US6993613B2 (en) 2001-09-17 2006-01-31 Intel Corporation Methods and apparatus for reducing receive interrupts via paced ingress indication
DE10160298A1 (de) 2001-12-07 2003-06-18 Bosch Gmbh Robert Verfahren und Vorrichtung zur Verarbeitung von Interrput-Signalen
US6889277B2 (en) 2002-04-18 2005-05-03 Sun Microsystems, Inc. System and method for dynamically tuning interrupt coalescing parameters
TW200502847A (en) 2003-07-08 2005-01-16 Benq Corp Control device and method for reducing number of interrupts in a processor
US7774585B2 (en) 2003-11-12 2010-08-10 Infineon Technologies Ag Interrupt and trap handling in an embedded multi-thread processor to avoid priority inversion and maintain real-time operation
US7099977B2 (en) 2004-01-12 2006-08-29 Hewlett-Packard Development Company, L.P. Processor interrupt filtering
US7080178B2 (en) 2004-02-09 2006-07-18 Arm Limited Interrupt pre-emption and ordering within a data processing system
US7120717B2 (en) 2004-02-13 2006-10-10 Hewlett-Packard Development Company, L.P. Method and apparatus for controlling interrupt storms
US7275122B2 (en) 2004-04-28 2007-09-25 Hewlett-Packard Development Company, L.P. Method and system for maintaining a desired service level for a processor receiving excessive interrupts
US7561877B2 (en) 2005-03-18 2009-07-14 Qualcomm Incorporated Apparatus and methods for managing malfunctions on a wireless device
US20080140895A1 (en) 2006-12-09 2008-06-12 International Business Machines Corporation Systems and Arrangements for Interrupt Management in a Processing Environment
WO2008099238A1 (en) 2007-02-16 2008-08-21 Freescale Semiconductor, Inc. Request controller, processing unit, arrangement, method for controlling requests and computer program product

Also Published As

Publication number Publication date
US8429321B2 (en) 2013-04-23
EP2111584A1 (de) 2009-10-28
EP2111584B1 (de) 2011-08-17
WO2008096208A1 (en) 2008-08-14
US20100011142A1 (en) 2010-01-14

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