WO2008108129A1 - メモリアクセス制御システム、メモリアクセス制御方法およびそのプログラム - Google Patents
メモリアクセス制御システム、メモリアクセス制御方法およびそのプログラム Download PDFInfo
- Publication number
- WO2008108129A1 WO2008108129A1 PCT/JP2008/051746 JP2008051746W WO2008108129A1 WO 2008108129 A1 WO2008108129 A1 WO 2008108129A1 JP 2008051746 W JP2008051746 W JP 2008051746W WO 2008108129 A1 WO2008108129 A1 WO 2008108129A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- ahead
- data read
- thread
- processing
- memory access
- Prior art date
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
- H04N19/43—Hardware specially adapted for motion estimation or compensation
- H04N19/433—Hardware specially adapted for motion estimation or compensation characterised by techniques for memory access
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
- H04N19/436—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation using parallelised computational arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
- H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
Abstract
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009502483A JP4821907B2 (ja) | 2007-03-06 | 2008-02-04 | メモリアクセス制御システム、メモリアクセス制御方法およびそのプログラム |
US12/526,233 US8447933B2 (en) | 2007-03-06 | 2008-02-04 | Memory access control system, memory access control method, and program thereof |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007055694 | 2007-03-06 | ||
JP2007-055694 | 2007-03-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2008108129A1 true WO2008108129A1 (ja) | 2008-09-12 |
Family
ID=39738025
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2008/051746 WO2008108129A1 (ja) | 2007-03-06 | 2008-02-04 | メモリアクセス制御システム、メモリアクセス制御方法およびそのプログラム |
Country Status (4)
Country | Link |
---|---|
US (1) | US8447933B2 (ja) |
JP (1) | JP4821907B2 (ja) |
TW (1) | TWI403901B (ja) |
WO (1) | WO2008108129A1 (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011048764A1 (ja) * | 2009-10-19 | 2011-04-28 | パナソニック株式会社 | 復号装置、復号方法、プログラム、及び集積回路 |
JP2011141743A (ja) * | 2010-01-07 | 2011-07-21 | Nec Corp | マルチプロセッサ、これを用いたコンピュータシステム、およびマルチプロセッサの処理方法 |
CN103207808A (zh) * | 2012-01-13 | 2013-07-17 | 百度在线网络技术(北京)有限公司 | 多核系统中的处理方法及装置 |
JP2016091305A (ja) * | 2014-11-05 | 2016-05-23 | コニカミノルタ株式会社 | 画像形成装置及び並列処理制御プログラム並びに並列処理制御方法 |
JP2016201784A (ja) * | 2015-04-09 | 2016-12-01 | 日本電信電話株式会社 | 参照画像バッファ |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100125717A1 (en) * | 2008-11-17 | 2010-05-20 | Mois Navon | Synchronization Controller For Multiple Multi-Threaded Processors |
US8327040B2 (en) | 2009-01-26 | 2012-12-04 | Micron Technology, Inc. | Host controller |
US8490111B2 (en) * | 2011-04-16 | 2013-07-16 | Throughputer, Inc. | Efficient network and memory architecture for multi-core data processing system |
US20130117168A1 (en) | 2011-11-04 | 2013-05-09 | Mark Henrik Sandstrom | Maximizing Throughput of Multi-user Parallel Data Processing Systems |
US8789065B2 (en) | 2012-06-08 | 2014-07-22 | Throughputer, Inc. | System and method for input data load adaptive parallel processing |
US9448847B2 (en) | 2011-07-15 | 2016-09-20 | Throughputer, Inc. | Concurrent program execution optimization |
US9330005B2 (en) | 2011-12-13 | 2016-05-03 | International Business Machines Corporation | Interface and method for inter-thread communication |
KR20130073360A (ko) * | 2011-12-23 | 2013-07-03 | 한국전자통신연구원 | 다중 반송파 시스템의 데이터 처리 장치 및 그것의 데이터 처리 방법 |
CN104951852A (zh) * | 2014-03-24 | 2015-09-30 | 阿里巴巴集团控股有限公司 | 周期性订单信息的处理方法及系统 |
CN108335719A (zh) * | 2018-02-24 | 2018-07-27 | 上海兆芯集成电路有限公司 | 性能评估装置及性能评估方法 |
CN112231243B (zh) * | 2020-10-29 | 2023-04-07 | 海光信息技术股份有限公司 | 一种数据处理方法、处理器及电子设备 |
Citations (7)
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JP2002312180A (ja) * | 2001-04-11 | 2002-10-25 | Hitachi Ltd | 動的命令変換機能を有するプロセッサシステム、該プロセッサシステムを備えたコンピュータにて実行されるバイナリートランスレーションプログラム及びそのプロセッサシステムを実装した半導体デバイス |
JP2005078264A (ja) * | 2003-08-29 | 2005-03-24 | Matsushita Electric Ind Co Ltd | コンピュータシステム、コンパイラ装置およびオペレーティングシステム |
WO2005033931A2 (en) * | 2003-09-30 | 2005-04-14 | Intel Corporation | Methods and apparatuses for compiler-creating helper threads for multi-threading |
WO2005033926A2 (en) * | 2003-10-02 | 2005-04-14 | Intel Corporation | Methods and apparatus for reducing memory latency in a software application |
WO2005033936A1 (en) * | 2003-09-30 | 2005-04-14 | Intel Corporation | Methods and apparatuses for thread management of multi-threading |
JP2006041898A (ja) * | 2004-07-27 | 2006-02-09 | Fujitsu Ltd | 動画像データ復号装置、および復号プログラム |
JP2007501449A (ja) * | 2003-08-02 | 2007-01-25 | インターナショナル・ビジネス・マシーンズ・コーポレーション | メッセージのキューを処理するための方法、装置、およびコンピュータ・プログラム |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0460863A (ja) | 1990-06-29 | 1992-02-26 | Nec Corp | マルチプロセッサシステム |
JP3732867B2 (ja) * | 1995-03-09 | 2006-01-11 | 株式会社ルネサステクノロジ | 画像伸張装置 |
US6266750B1 (en) | 1999-01-15 | 2001-07-24 | Advanced Memory International, Inc. | Variable length pipeline with parallel functional units |
JP3790653B2 (ja) | 1999-04-19 | 2006-06-28 | 松下電器産業株式会社 | 共有メモリアクセス管理装置 |
US6928571B1 (en) | 2000-09-15 | 2005-08-09 | Intel Corporation | Digital system of adjusting delays on circuit boards |
US7089368B2 (en) | 2002-02-12 | 2006-08-08 | Ip-First, Llc | Microprocessor apparatus and method for exclusively prefetching a block of cache lines from memory |
US7437724B2 (en) | 2002-04-03 | 2008-10-14 | Intel Corporation | Registers for data transfers |
-
2008
- 2008-02-04 US US12/526,233 patent/US8447933B2/en active Active
- 2008-02-04 WO PCT/JP2008/051746 patent/WO2008108129A1/ja active Application Filing
- 2008-02-04 JP JP2009502483A patent/JP4821907B2/ja active Active
- 2008-03-04 TW TW97107518A patent/TWI403901B/zh not_active IP Right Cessation
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002312180A (ja) * | 2001-04-11 | 2002-10-25 | Hitachi Ltd | 動的命令変換機能を有するプロセッサシステム、該プロセッサシステムを備えたコンピュータにて実行されるバイナリートランスレーションプログラム及びそのプロセッサシステムを実装した半導体デバイス |
JP2007501449A (ja) * | 2003-08-02 | 2007-01-25 | インターナショナル・ビジネス・マシーンズ・コーポレーション | メッセージのキューを処理するための方法、装置、およびコンピュータ・プログラム |
JP2005078264A (ja) * | 2003-08-29 | 2005-03-24 | Matsushita Electric Ind Co Ltd | コンピュータシステム、コンパイラ装置およびオペレーティングシステム |
WO2005033931A2 (en) * | 2003-09-30 | 2005-04-14 | Intel Corporation | Methods and apparatuses for compiler-creating helper threads for multi-threading |
WO2005033936A1 (en) * | 2003-09-30 | 2005-04-14 | Intel Corporation | Methods and apparatuses for thread management of multi-threading |
WO2005033926A2 (en) * | 2003-10-02 | 2005-04-14 | Intel Corporation | Methods and apparatus for reducing memory latency in a software application |
JP2006041898A (ja) * | 2004-07-27 | 2006-02-09 | Fujitsu Ltd | 動画像データ復号装置、および復号プログラム |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011048764A1 (ja) * | 2009-10-19 | 2011-04-28 | パナソニック株式会社 | 復号装置、復号方法、プログラム、及び集積回路 |
CN102197652A (zh) * | 2009-10-19 | 2011-09-21 | 松下电器产业株式会社 | 解码装置、解码方法、程序以及集成电路 |
JP2011141743A (ja) * | 2010-01-07 | 2011-07-21 | Nec Corp | マルチプロセッサ、これを用いたコンピュータシステム、およびマルチプロセッサの処理方法 |
CN103207808A (zh) * | 2012-01-13 | 2013-07-17 | 百度在线网络技术(北京)有限公司 | 多核系统中的处理方法及装置 |
JP2016091305A (ja) * | 2014-11-05 | 2016-05-23 | コニカミノルタ株式会社 | 画像形成装置及び並列処理制御プログラム並びに並列処理制御方法 |
JP2016201784A (ja) * | 2015-04-09 | 2016-12-01 | 日本電信電話株式会社 | 参照画像バッファ |
Also Published As
Publication number | Publication date |
---|---|
TWI403901B (zh) | 2013-08-01 |
JPWO2008108129A1 (ja) | 2010-06-10 |
US20100223431A1 (en) | 2010-09-02 |
US8447933B2 (en) | 2013-05-21 |
TW200900931A (en) | 2009-01-01 |
JP4821907B2 (ja) | 2011-11-24 |
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