ATE497208T1 - Verfahren und systeme für ein speichersystem - Google Patents

Verfahren und systeme für ein speichersystem

Info

Publication number
ATE497208T1
ATE497208T1 AT09153548T AT09153548T ATE497208T1 AT E497208 T1 ATE497208 T1 AT E497208T1 AT 09153548 T AT09153548 T AT 09153548T AT 09153548 T AT09153548 T AT 09153548T AT E497208 T1 ATE497208 T1 AT E497208T1
Authority
AT
Austria
Prior art keywords
data
memory
section
addresses
section controller
Prior art date
Application number
AT09153548T
Other languages
English (en)
Inventor
Melvin Bullen
Steven Dodd
Wiliam T Lynch
David Herbison
Original Assignee
Ring Technology Entpr S Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/284,268 external-priority patent/US7707351B2/en
Priority claimed from US10/284,199 external-priority patent/US7197662B2/en
Priority claimed from US10/284,278 external-priority patent/US7415565B2/en
Application filed by Ring Technology Entpr S Llc filed Critical Ring Technology Entpr S Llc
Application granted granted Critical
Publication of ATE497208T1 publication Critical patent/ATE497208T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2017—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where memory access, memory control or I/O control functionality is redundant
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2041—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with more than one idle spare processing component
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2043—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant where the redundant components share a common memory address space

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Software Systems (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Multi Processors (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Transfer Systems (AREA)
AT09153548T 2002-10-31 2003-10-23 Verfahren und systeme für ein speichersystem ATE497208T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/284,268 US7707351B2 (en) 2002-10-31 2002-10-31 Methods and systems for an identifier-based memory section
US10/284,199 US7197662B2 (en) 2002-10-31 2002-10-31 Methods and systems for a storage system
US10/284,278 US7415565B2 (en) 2002-10-31 2002-10-31 Methods and systems for a storage system with a program-controlled switch for routing data

Publications (1)

Publication Number Publication Date
ATE497208T1 true ATE497208T1 (de) 2011-02-15

Family

ID=32314844

Family Applications (3)

Application Number Title Priority Date Filing Date
AT09153548T ATE497208T1 (de) 2002-10-31 2003-10-23 Verfahren und systeme für ein speichersystem
AT10184634T ATE557349T1 (de) 2002-10-31 2003-10-23 Speichersystem und verfahren für ein speichersystem
AT03777844T ATE429676T1 (de) 2002-10-31 2003-10-23 Verfahren und systeme für ein speichersystem

Family Applications After (2)

Application Number Title Priority Date Filing Date
AT10184634T ATE557349T1 (de) 2002-10-31 2003-10-23 Speichersystem und verfahren für ein speichersystem
AT03777844T ATE429676T1 (de) 2002-10-31 2003-10-23 Verfahren und systeme für ein speichersystem

Country Status (7)

Country Link
EP (3) EP2302517B1 (de)
JP (2) JP2006505065A (de)
KR (3) KR20100072067A (de)
AT (3) ATE497208T1 (de)
AU (1) AU2003286638A1 (de)
DE (2) DE60327357D1 (de)
WO (1) WO2004042505A2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6879526B2 (en) 2002-10-31 2005-04-12 Ring Technology Enterprises Llc Methods and apparatus for improved memory access
US7707351B2 (en) 2002-10-31 2010-04-27 Ring Technology Enterprises Of Texas, Llc Methods and systems for an identifier-based memory section
US7058738B2 (en) * 2004-04-28 2006-06-06 Microsoft Corporation Configurable PCI express switch which allows multiple CPUs to be connected to multiple I/O devices
JP4819369B2 (ja) 2005-02-15 2011-11-24 株式会社日立製作所 ストレージシステム
US8307180B2 (en) 2008-02-28 2012-11-06 Nokia Corporation Extended utilization area for a memory device
US7941697B2 (en) * 2008-12-30 2011-05-10 Symantec Operating Corporation Failure handling using overlay objects on a file system using object based storage devices
US8874824B2 (en) 2009-06-04 2014-10-28 Memory Technologies, LLC Apparatus and method to share host system RAM with mass storage memory RAM
US9417998B2 (en) 2012-01-26 2016-08-16 Memory Technologies Llc Apparatus and method to provide cache move with non-volatile mass memory system
US9311226B2 (en) 2012-04-20 2016-04-12 Memory Technologies Llc Managing operational state data of a memory module using host memory in association with state change
US9766823B2 (en) 2013-12-12 2017-09-19 Memory Technologies Llc Channel optimized storage modules
US10255134B2 (en) * 2017-01-20 2019-04-09 Samsung Electronics Co., Ltd. Control plane method and apparatus for providing erasure code protection across multiple storage devices
KR102816405B1 (ko) * 2019-01-07 2025-06-04 에스케이하이닉스 주식회사 데이터 저장 장치 및 동작 방법, 이를 위한 컨트롤러
KR20230085629A (ko) * 2021-12-07 2023-06-14 에스케이하이닉스 주식회사 저장 장치 및 그 동작 방법

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US4816989A (en) * 1987-04-15 1989-03-28 Allied-Signal Inc. Synchronizer for a fault tolerant multiple node processing system
JPH0795258B2 (ja) * 1988-12-22 1995-10-11 富士通株式会社 二重化ディスク制御方式
US4984240A (en) * 1988-12-22 1991-01-08 Codex Corporation Distributed switching architecture for communication module redundancy
US5134619A (en) * 1990-04-06 1992-07-28 Sf2 Corporation Failure-tolerant mass storage system
JP2829091B2 (ja) * 1990-04-19 1998-11-25 株式会社東芝 データ処理システム
US5729763A (en) * 1995-08-15 1998-03-17 Emc Corporation Data storage system
US5922077A (en) * 1996-11-14 1999-07-13 Data General Corporation Fail-over switching system
JPH1117775A (ja) * 1997-06-20 1999-01-22 Sony Corp シリアルインタフェース回路
JP2000242434A (ja) * 1998-12-22 2000-09-08 Hitachi Ltd 記憶装置システム
US6370605B1 (en) * 1999-03-04 2002-04-09 Sun Microsystems, Inc. Switch based scalable performance storage architecture
IE20000203A1 (en) * 1999-03-25 2001-02-21 Converge Net Technologies Inc Storage domain management system
JP3454183B2 (ja) * 1999-04-13 2003-10-06 日本電気株式会社 ディスクアレイ装置
JP3726559B2 (ja) * 1999-06-01 2005-12-14 株式会社日立製作所 ダイレクトバックアップ方法および記憶装置システム
JP4175764B2 (ja) * 2000-05-18 2008-11-05 株式会社日立製作所 計算機システム
GB2367648B (en) * 2000-10-03 2002-08-28 Sun Microsystems Inc Multiple trap avoidance mechanism
US8949471B2 (en) * 2000-11-02 2015-02-03 Oracle America, Inc. TCP/UDP acceleration
US6880100B2 (en) * 2001-07-18 2005-04-12 Smartmatic Corp. Peer-to-peer fault detection
US6947981B2 (en) * 2002-03-26 2005-09-20 Hewlett-Packard Development Company, L.P. Flexible data replication mechanism
US6879526B2 (en) 2002-10-31 2005-04-12 Ring Technology Enterprises Llc Methods and apparatus for improved memory access

Also Published As

Publication number Publication date
EP1565819A4 (de) 2007-11-21
ATE557349T1 (de) 2012-05-15
KR20100072068A (ko) 2010-06-29
DE60327357D1 (de) 2009-06-04
ATE429676T1 (de) 2009-05-15
EP1565819A2 (de) 2005-08-24
JP2010250813A (ja) 2010-11-04
KR20050075764A (ko) 2005-07-21
EP2060976A1 (de) 2009-05-20
EP2302517B1 (de) 2012-05-09
AU2003286638A1 (en) 2004-06-07
WO2004042505A3 (en) 2005-03-10
EP2060976B1 (de) 2011-01-26
EP2302517A1 (de) 2011-03-30
DE60335926D1 (de) 2011-03-10
EP1565819B1 (de) 2009-04-22
KR20100072067A (ko) 2010-06-29
JP2006505065A (ja) 2006-02-09
WO2004042505A2 (en) 2004-05-21
AU2003286638A8 (en) 2004-06-07

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