ATE472136T1 - Vorrichtung und verfahren zur bussignalabschluss- kompensation während erfassten ruhe zyklus - Google Patents
Vorrichtung und verfahren zur bussignalabschluss- kompensation während erfassten ruhe zyklusInfo
- Publication number
- ATE472136T1 ATE472136T1 AT03796997T AT03796997T ATE472136T1 AT E472136 T1 ATE472136 T1 AT E472136T1 AT 03796997 T AT03796997 T AT 03796997T AT 03796997 T AT03796997 T AT 03796997T AT E472136 T1 ATE472136 T1 AT E472136T1
- Authority
- AT
- Austria
- Prior art keywords
- bus
- quiet cycle
- bus signal
- signal compensation
- compensation during
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0278—Arrangements for impedance matching
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
- H03K17/163—Soft switching
- H03K17/164—Soft switching using parallel switching arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Dc Digital Transmission (AREA)
- Small-Scale Networks (AREA)
- Power Sources (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Selective Calling Equipment (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/335,032 US6842035B2 (en) | 2002-12-31 | 2002-12-31 | Apparatus and method for bus signal termination compensation during detected quiet cycle |
PCT/US2003/039634 WO2004061690A2 (en) | 2002-12-31 | 2003-12-12 | Apparatus and method for bus signal termination compensation during detected quiet cycle |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE472136T1 true ATE472136T1 (de) | 2010-07-15 |
Family
ID=32655237
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT03796997T ATE472136T1 (de) | 2002-12-31 | 2003-12-12 | Vorrichtung und verfahren zur bussignalabschluss- kompensation während erfassten ruhe zyklus |
Country Status (10)
Country | Link |
---|---|
US (2) | US6842035B2 (de) |
EP (1) | EP1579337B1 (de) |
KR (1) | KR100923363B1 (de) |
CN (1) | CN100367260C (de) |
AT (1) | ATE472136T1 (de) |
AU (1) | AU2003297926A1 (de) |
DE (1) | DE60333125D1 (de) |
HK (1) | HK1076882A1 (de) |
TW (1) | TWI240172B (de) |
WO (1) | WO2004061690A2 (de) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2812474B1 (fr) * | 2000-07-31 | 2004-06-18 | Valeo Climatisation | Dispositif de protection d'une source electrique propre a alimenter un organe electrique |
US7356555B2 (en) * | 2002-03-29 | 2008-04-08 | Intel Corporation | In-protocol impedance compensation control |
US7894260B2 (en) * | 2003-01-03 | 2011-02-22 | Samsung Electronics Co., Ltd. | Synchronous semiconductor memory device having on-die termination circuit and on-die termination method |
JP4201128B2 (ja) * | 2003-07-15 | 2008-12-24 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
US6924660B2 (en) | 2003-09-08 | 2005-08-02 | Rambus Inc. | Calibration methods and circuits for optimized on-die termination |
US6980020B2 (en) | 2003-12-19 | 2005-12-27 | Rambus Inc. | Calibration methods and circuits for optimized on-die termination |
US7020818B2 (en) * | 2004-03-08 | 2006-03-28 | Intel Corporation | Method and apparatus for PVT controller for programmable on die termination |
US7574634B2 (en) * | 2004-06-21 | 2009-08-11 | Micron Technology, Inc. | Real time testing using on die termination (ODT) circuit |
US7196567B2 (en) | 2004-12-20 | 2007-03-27 | Rambus Inc. | Systems and methods for controlling termination resistance values for a plurality of communication channels |
US7138823B2 (en) * | 2005-01-20 | 2006-11-21 | Micron Technology, Inc. | Apparatus and method for independent control of on-die termination for output buffers of a memory device |
US7529955B2 (en) * | 2005-06-30 | 2009-05-05 | Intel Corporation | Dynamic bus parking |
KR100599215B1 (ko) * | 2005-07-19 | 2006-07-12 | 삼성전자주식회사 | 시그너쳐 회로 및 시그너쳐 정보 독출방법과 이를 이용한반도체 칩 |
US7560956B2 (en) * | 2005-08-03 | 2009-07-14 | Micron Technology, Inc. | Method and apparatus for selecting an operating mode based on a determination of the availability of internal clock signals |
CN1980057B (zh) * | 2005-12-01 | 2011-10-26 | 瑞昱半导体股份有限公司 | 输出驱动电路的阻抗匹配装置 |
US7439760B2 (en) | 2005-12-19 | 2008-10-21 | Rambus Inc. | Configurable on-die termination |
US7486104B2 (en) | 2006-06-02 | 2009-02-03 | Rambus Inc. | Integrated circuit with graduated on-die termination |
US20080005434A1 (en) * | 2006-06-02 | 2008-01-03 | Macronix International Co., Ltd. | Method and Apparatus for Communicating Data Over Multiple Pins of A Multi-Mode Bus |
US8599631B2 (en) | 2006-12-21 | 2013-12-03 | Rambus Inc. | On-die termination of address and command signals |
US20080162748A1 (en) * | 2006-12-31 | 2008-07-03 | Blaise Fanning | Efficient power management techniques for computer systems |
US7876123B2 (en) * | 2007-10-09 | 2011-01-25 | Lsi Corporation | High speed multiple memory interface I/O cell |
CA2697991C (en) * | 2009-04-01 | 2018-05-01 | Accenture Global Services Gmbh | System for monitoring the energy efficiency of technology components |
US7843225B2 (en) * | 2009-04-14 | 2010-11-30 | Via Technologies, Inc. | Protocol-based bus termination for multi-core processors |
US7767492B1 (en) * | 2009-04-14 | 2010-08-03 | Via Technologies, Inc. | Location-based bus termination for multi-core/multi-package processor configurations |
US8242802B2 (en) * | 2009-04-14 | 2012-08-14 | Via Technologies, Inc. | Location-based bus termination for multi-core processors |
US8085062B2 (en) * | 2009-04-14 | 2011-12-27 | Via Technologies, Inc. | Configurable bus termination for multi-core/multi-package processor configurations |
US7940076B2 (en) * | 2009-06-06 | 2011-05-10 | Texas Instruments Incorporated | Local interconnect network transceiver driver |
CN102859598A (zh) | 2010-06-17 | 2013-01-02 | 拉姆伯斯公司 | 平衡式裸片上终结 |
GB2482013B (en) * | 2010-07-15 | 2016-08-03 | Cray Uk Ltd | Crossbar packet switch with simultaneous reassertion of blocked requests |
US9075585B2 (en) | 2010-08-06 | 2015-07-07 | International Business Machines Corporation | Initializing components of an integrated circuit |
TWI489478B (zh) * | 2012-05-07 | 2015-06-21 | Etron Technology Inc | 共用記憶體電路內的阻抗匹配電路執行初始校正及全時更新模式校正的方法和可於初始校正及全時更新模式校正共用阻抗匹配電路的記憶體電路 |
US11068433B2 (en) * | 2018-10-18 | 2021-07-20 | Texas Instruments Incorporated | Serial bus repeater with low power state detection |
US12066959B2 (en) | 2022-05-12 | 2024-08-20 | Intel Corporation | Provisioning a reference voltage based on an evaluation of a pseudo-precision resistor of an IC die |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5272396B2 (en) * | 1991-09-05 | 1996-11-26 | Unitrode Corp | Controllable bus terminator with voltage regulation |
US5535406A (en) * | 1993-12-29 | 1996-07-09 | Kolchinsky; Alexander | Virtual processor module including a reconfigurable programmable matrix |
US5970254A (en) * | 1997-06-27 | 1999-10-19 | Cooke; Laurence H. | Integrated processor and programmable data path chip for reconfigurable computing |
JPH11145814A (ja) * | 1997-11-07 | 1999-05-28 | Toshiba Corp | 半導体集積回路 |
US6282627B1 (en) * | 1998-06-29 | 2001-08-28 | Chameleon Systems, Inc. | Integrated processor and programmable data path chip for reconfigurable computing |
US6438636B2 (en) * | 1998-12-23 | 2002-08-20 | Intel Corporation | Updating termination for a bus |
US6157206A (en) | 1998-12-31 | 2000-12-05 | Intel Corporation | On-chip termination |
US6418500B1 (en) * | 1999-02-12 | 2002-07-09 | Fujitsu Limited | Feedback control for termination adjustment |
US6572747B1 (en) * | 1999-03-08 | 2003-06-03 | Delphi Technologies, Inc. | Method for making a wide range sensor element |
US6300789B1 (en) | 1999-12-22 | 2001-10-09 | Intel Corporation | Dynamic termination for non-symmetric transmission line network topologies |
US6356105B1 (en) | 2000-06-28 | 2002-03-12 | Intel Corporation | Impedance control system for a center tapped termination bus |
US6693450B1 (en) | 2000-09-29 | 2004-02-17 | Intel Corporation | Dynamic swing voltage adjustment |
US6424170B1 (en) | 2001-05-18 | 2002-07-23 | Intel Corporation | Apparatus and method for linear on-die termination in an open drain bus architecture system |
US6573747B2 (en) * | 2001-09-28 | 2003-06-03 | Intel Corporation | Digital update scheme for adaptive impedance control of on-die input/output circuits |
KR100422451B1 (ko) * | 2002-05-24 | 2004-03-11 | 삼성전자주식회사 | 온-다이 터미네이션 제어방법 및 그에 따른 제어회로 |
US6965529B2 (en) * | 2002-06-21 | 2005-11-15 | Intel Coproration | Memory bus termination |
-
2002
- 2002-12-31 US US10/335,032 patent/US6842035B2/en not_active Expired - Lifetime
-
2003
- 2003-08-29 TW TW092123960A patent/TWI240172B/zh not_active IP Right Cessation
- 2003-12-12 AT AT03796997T patent/ATE472136T1/de not_active IP Right Cessation
- 2003-12-12 WO PCT/US2003/039634 patent/WO2004061690A2/en not_active Application Discontinuation
- 2003-12-12 AU AU2003297926A patent/AU2003297926A1/en not_active Abandoned
- 2003-12-12 KR KR1020057012408A patent/KR100923363B1/ko not_active IP Right Cessation
- 2003-12-12 DE DE60333125T patent/DE60333125D1/de not_active Expired - Lifetime
- 2003-12-12 EP EP03796997A patent/EP1579337B1/de not_active Expired - Lifetime
- 2003-12-12 CN CNB2003801076737A patent/CN100367260C/zh not_active Expired - Fee Related
-
2004
- 2004-12-31 US US11/026,651 patent/US7227377B2/en not_active Expired - Fee Related
-
2005
- 2005-10-05 HK HK05108823.1A patent/HK1076882A1/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US20050151562A1 (en) | 2005-07-14 |
KR20050093812A (ko) | 2005-09-23 |
CN100367260C (zh) | 2008-02-06 |
TW200416551A (en) | 2004-09-01 |
HK1076882A1 (en) | 2006-01-27 |
US7227377B2 (en) | 2007-06-05 |
US20040124874A1 (en) | 2004-07-01 |
TWI240172B (en) | 2005-09-21 |
KR100923363B1 (ko) | 2009-10-23 |
AU2003297926A1 (en) | 2004-07-29 |
WO2004061690A3 (en) | 2005-03-24 |
AU2003297926A8 (en) | 2004-07-29 |
US6842035B2 (en) | 2005-01-11 |
EP1579337B1 (de) | 2010-06-23 |
EP1579337A2 (de) | 2005-09-28 |
DE60333125D1 (de) | 2010-08-05 |
CN1732450A (zh) | 2006-02-08 |
WO2004061690A2 (en) | 2004-07-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |