ATE456829T1 - Datenverarbeitungsschaltung mit funktionseinheiten mit gemeinsamen leseports - Google Patents
Datenverarbeitungsschaltung mit funktionseinheiten mit gemeinsamen leseportsInfo
- Publication number
- ATE456829T1 ATE456829T1 AT05801343T AT05801343T ATE456829T1 AT E456829 T1 ATE456829 T1 AT E456829T1 AT 05801343 T AT05801343 T AT 05801343T AT 05801343 T AT05801343 T AT 05801343T AT E456829 T1 ATE456829 T1 AT E456829T1
- Authority
- AT
- Austria
- Prior art keywords
- ports
- functional units
- processing circuit
- data processing
- write ports
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30105—Register structure
- G06F9/30112—Register structure comprising data of variable length
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04104582 | 2004-09-22 | ||
PCT/IB2005/053102 WO2006033078A2 (en) | 2004-09-22 | 2005-09-21 | Data processing circuit wherein functional units share read ports |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE456829T1 true ATE456829T1 (de) | 2010-02-15 |
Family
ID=34929596
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT05801343T ATE456829T1 (de) | 2004-09-22 | 2005-09-21 | Datenverarbeitungsschaltung mit funktionseinheiten mit gemeinsamen leseports |
Country Status (8)
Country | Link |
---|---|
US (1) | US8108658B2 (de) |
EP (1) | EP1794672B1 (de) |
JP (1) | JP5346467B2 (de) |
KR (1) | KR101311187B1 (de) |
CN (1) | CN101027635A (de) |
AT (1) | ATE456829T1 (de) |
DE (1) | DE602005019180D1 (de) |
WO (1) | WO2006033078A2 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8713286B2 (en) * | 2005-04-26 | 2014-04-29 | Qualcomm Incorporated | Register files for a digital signal processor operating in an interleaved multi-threaded environment |
US9402062B2 (en) * | 2007-07-18 | 2016-07-26 | Mediatek Inc. | Digital television chip, system and method thereof |
GB2451845B (en) * | 2007-08-14 | 2010-03-17 | Imagination Tech Ltd | Compound instructions in a multi-threaded processor |
GB2488985A (en) * | 2011-03-08 | 2012-09-19 | Advanced Risc Mach Ltd | Mixed size data processing operation with integrated operand conversion instructions |
KR102177871B1 (ko) * | 2013-12-20 | 2020-11-12 | 삼성전자주식회사 | 멀티 쓰레딩을 지원하기 위한 연산 유닛, 이를 포함하는 프로세서 및 프로세서의 동작 방법 |
JP6237241B2 (ja) * | 2014-01-07 | 2017-11-29 | 富士通株式会社 | 処理装置 |
JP2021166010A (ja) * | 2020-04-08 | 2021-10-14 | 富士通株式会社 | 演算処理装置 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6370623B1 (en) * | 1988-12-28 | 2002-04-09 | Philips Electronics North America Corporation | Multiport register file to accommodate data of differing lengths |
JPH0764789A (ja) * | 1993-08-25 | 1995-03-10 | Mitsubishi Electric Corp | 並列処理プロセッサおよびそのプロセッシングユニットならびにこの並列処理プロセッサの動作方法 |
JP3655403B2 (ja) * | 1995-10-09 | 2005-06-02 | 株式会社ルネサステクノロジ | データ処理装置 |
US6076154A (en) | 1998-01-16 | 2000-06-13 | U.S. Philips Corporation | VLIW processor has different functional units operating on commands of different widths |
US6219776B1 (en) | 1998-03-10 | 2001-04-17 | Billions Of Operations Per Second | Merged array controller and processing element |
KR100638935B1 (ko) * | 1998-06-08 | 2006-10-25 | 코닌클리즈케 필립스 일렉트로닉스 엔.브이. | 데이터 프로세서 |
KR100345173B1 (ko) * | 2000-06-12 | 2002-07-24 | 주식회사 테크라프 | 폐전지 처리방법 |
DE60143945D1 (de) | 2000-07-18 | 2011-03-10 | Cornell Res Foundation Inc | Medizinische verwendung von agonisten des mu-opioid rezeptors |
US20040014848A1 (en) | 2000-09-11 | 2004-01-22 | Kazuya Tanaka | Organic Hydrophicizing agent for aluminiferous metals |
KR20030007403A (ko) * | 2000-11-27 | 2003-01-23 | 코닌클리즈케 필립스 일렉트로닉스 엔.브이. | 데이터 프로세싱 장치 |
WO2002048871A1 (en) * | 2000-12-11 | 2002-06-20 | Koninklijke Philips Electronics N.V. | Signal processing device and method for supplying a signal processing result to a plurality of registers |
CN1685310A (zh) | 2002-09-24 | 2005-10-19 | 皇家飞利浦电子股份有限公司 | 在一个超长指令字处理器中启动加载立即指令的处理的装置、方法和编译器 |
US20040128475A1 (en) * | 2002-12-31 | 2004-07-01 | Gad Sheaffer | Widely accessible processor register file and method for use |
-
2005
- 2005-09-21 AT AT05801343T patent/ATE456829T1/de not_active IP Right Cessation
- 2005-09-21 EP EP05801343A patent/EP1794672B1/de active Active
- 2005-09-21 JP JP2007531946A patent/JP5346467B2/ja active Active
- 2005-09-21 KR KR1020077006438A patent/KR101311187B1/ko active IP Right Grant
- 2005-09-21 DE DE602005019180T patent/DE602005019180D1/de active Active
- 2005-09-21 CN CNA2005800320526A patent/CN101027635A/zh active Pending
- 2005-09-21 US US11/575,501 patent/US8108658B2/en active Active
- 2005-09-21 WO PCT/IB2005/053102 patent/WO2006033078A2/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
KR20070067687A (ko) | 2007-06-28 |
JP5346467B2 (ja) | 2013-11-20 |
US8108658B2 (en) | 2012-01-31 |
WO2006033078A2 (en) | 2006-03-30 |
WO2006033078A3 (en) | 2006-05-11 |
DE602005019180D1 (de) | 2010-03-18 |
EP1794672B1 (de) | 2010-01-27 |
CN101027635A (zh) | 2007-08-29 |
JP2008513878A (ja) | 2008-05-01 |
KR101311187B1 (ko) | 2013-09-26 |
EP1794672A2 (de) | 2007-06-13 |
US20090070559A1 (en) | 2009-03-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ATE456829T1 (de) | Datenverarbeitungsschaltung mit funktionseinheiten mit gemeinsamen leseports | |
US7908461B2 (en) | Cellular engine for a data processing system | |
US9652231B2 (en) | All-to-all permutation of vector elements based on a permutation pattern encoded in mantissa and exponent bits in a floating-point SIMD architecture | |
US7865693B2 (en) | Aligning precision converted vector data using mask indicating offset relative to element boundary corresponding to precision type | |
CN104813280B (zh) | 用于加速器的低等待时间调用的装置和方法 | |
CN104798033B (zh) | 用于混合等待时间‑吞吐量处理器的装置和方法 | |
TW200710718A (en) | Register file for a digital signal processor operating in an interleaved multi-threaded environment | |
US8423983B2 (en) | Generating and executing programs for a floating point single instruction multiple data instruction set architecture | |
CN101097512B (zh) | 用于实施混洗和移位操作的方法、设备和系统 | |
US7900025B2 (en) | Floating point only SIMD instruction set architecture including compare, select, Boolean, and alignment operations | |
CN103109261B (zh) | 用于通用逻辑操作的方法和设备 | |
Hill et al. | Readings in computer architecture | |
US20110040821A1 (en) | Matrix Multiplication Operations with Data Pre-Conditioning in a High Performance Computing Architecture | |
CN104049941A (zh) | 跟踪指令的控制流程 | |
TW200739420A (en) | Unified non-partitioned register file for a digital signal processor operating in an interleaved multi-threaded environment | |
SE0402710D0 (sv) | Management of internal logic for electronic pens | |
CN103984530A (zh) | 一种提高store指令执行效率的流水线结构及方法 | |
ATE436050T1 (de) | Pipeline-asynchron-anweisungs-prozessorschaltun | |
DE602004025691D1 (de) | Rechnersystem mit parallelität auf befehls- und draht-ebene | |
WO2005111792A3 (en) | Lower power vltw | |
KR100636596B1 (ko) | 고에너지 효율 병렬 처리 데이터 패스 구조 | |
WO2004046914A3 (en) | Vliw processor with copy register file | |
SE0400494L (sv) | Ett kassasystem | |
TW200511084A (en) | Computer system using BIOS memory to store data of transmission controller | |
CN115562723A (zh) | 多指令集处理器中整数寄存器文件的实现方法及装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |