ATE416522T1 - Erzeugung von einem phasenverriegelten schleifesignal mit reduzierten störemissionen - Google Patents

Erzeugung von einem phasenverriegelten schleifesignal mit reduzierten störemissionen

Info

Publication number
ATE416522T1
ATE416522T1 AT06019202T AT06019202T ATE416522T1 AT E416522 T1 ATE416522 T1 AT E416522T1 AT 06019202 T AT06019202 T AT 06019202T AT 06019202 T AT06019202 T AT 06019202T AT E416522 T1 ATE416522 T1 AT E416522T1
Authority
AT
Austria
Prior art keywords
locked loop
phase locked
generation
loop signal
reduced interference
Prior art date
Application number
AT06019202T
Other languages
English (en)
Inventor
Hans Hagberg
Magnus Nilsson
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Application granted granted Critical
Publication of ATE416522T1 publication Critical patent/ATE416522T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B15/00—Suppression or limitation of noise or interference
    • H04B15/02—Reducing interference from electric apparatus by means located at or near the interfering apparatus
    • H04B15/04—Reducing interference from electric apparatus by means located at or near the interfering apparatus the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Gyroscopes (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
AT06019202T 2001-09-12 2002-09-11 Erzeugung von einem phasenverriegelten schleifesignal mit reduzierten störemissionen ATE416522T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/949,845 US6952138B2 (en) 2001-09-12 2001-09-12 Generation of a phase locked loop output signal having reduced spurious spectral components

Publications (1)

Publication Number Publication Date
ATE416522T1 true ATE416522T1 (de) 2008-12-15

Family

ID=25489591

Family Applications (2)

Application Number Title Priority Date Filing Date
AT02797983T ATE355661T1 (de) 2001-09-12 2002-09-11 Erzeugung eines phasenregelkreisausgangssignals mit verringerten spektralen störkomponenten
AT06019202T ATE416522T1 (de) 2001-09-12 2002-09-11 Erzeugung von einem phasenverriegelten schleifesignal mit reduzierten störemissionen

Family Applications Before (1)

Application Number Title Priority Date Filing Date
AT02797983T ATE355661T1 (de) 2001-09-12 2002-09-11 Erzeugung eines phasenregelkreisausgangssignals mit verringerten spektralen störkomponenten

Country Status (5)

Country Link
US (1) US6952138B2 (de)
EP (2) EP1729432B1 (de)
AT (2) ATE355661T1 (de)
DE (2) DE60218496T2 (de)
WO (1) WO2003024005A1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7049852B2 (en) * 2004-02-02 2006-05-23 Melanson John L Fractional-integer phase-locked loop system with a fractional-frequency-interval phase frequency detector
US7613249B1 (en) 2004-04-21 2009-11-03 Marvell International Ltd. Spurious component reduction
DE102005050621B4 (de) * 2005-10-21 2011-06-01 Infineon Technologies Ag Phasenregelkreis und Verfahren zum Betrieb eines Phasenregelkreises
US7482885B2 (en) * 2005-12-29 2009-01-27 Orca Systems, Inc. Method of frequency synthesis for fast switching
US7519349B2 (en) * 2006-02-17 2009-04-14 Orca Systems, Inc. Transceiver development in VHF/UHF/GSM/GPS/bluetooth/cordless telephones
JP2007295363A (ja) 2006-04-26 2007-11-08 Nec Electronics Corp Ｐｌｌ回路、ｐｌｌ回路の干渉防止方法及びこのｐｌｌ回路を搭載した光ディスク装置
US20070252620A1 (en) * 2006-04-28 2007-11-01 Motorola, Inc. Phase offset control phase-frequency detector
US7929929B2 (en) * 2007-09-25 2011-04-19 Motorola Solutions, Inc. Method and apparatus for spur reduction in a frequency synthesizer
US8138840B2 (en) * 2009-01-23 2012-03-20 International Business Machines Corporation Optimal dithering of a digitally controlled oscillator with clock dithering for gain and bandwidth control
US8866556B2 (en) * 2009-02-27 2014-10-21 Analog Bits, Inc. Phase shift phase locked loop
TW201121246A (en) * 2009-12-14 2011-06-16 Univ Nat Taiwan Frequency synthesizers
US8400197B2 (en) * 2010-07-28 2013-03-19 Marvell World Trade Ltd. Fractional spur reduction using controlled clock jitter
US9397647B2 (en) 2010-07-28 2016-07-19 Marvell World Trade Ltd. Clock spurs reduction technique
JP6809484B2 (ja) * 2016-01-08 2021-01-06 ソニー株式会社 同期回路および同期回路の制御方法
WO2018224144A1 (en) 2017-06-07 2018-12-13 Telefonaktiebolaget Lm Ericsson (Publ) Phase control of phase locked loop
CN113071508B (zh) * 2021-06-07 2021-08-20 北京理工大学 一种dcps架构下的车辆协同能量管理方法和系统

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63252014A (ja) * 1987-04-08 1988-10-19 Kokusai Denshin Denwa Co Ltd <Kdd> 位相同期方式
US5631920A (en) 1993-11-29 1997-05-20 Lexmark International, Inc. Spread spectrum clock generator
CA2123477A1 (en) 1994-05-12 1995-11-13 Thomas Atkin Denning Riley Delta-sigma fractional-n frequency synthesizer and frequency discriminator suitable for use therein
US5986512A (en) 1997-12-12 1999-11-16 Telefonaktiebolaget L M Ericsson (Publ) Σ-Δ modulator-controlled phase-locked-loop circuit
EP0940922B1 (de) 1998-03-03 2002-12-04 Motorola Semiconducteurs S.A. Frequenzsynthetisierer
FI104768B (fi) 1998-03-05 2000-03-31 Nokia Networks Oy Menetelmä häiriöiden vähentämiseksi ja syntetisaattorijärjestely
GB2335322B (en) 1998-03-13 2002-04-24 Ericsson Telefon Ab L M Phase detector
US6219397B1 (en) 1998-03-20 2001-04-17 Samsung Electronics Co., Ltd. Low phase noise CMOS fractional-N frequency synthesizer for wireless communications
US6114888A (en) 1998-09-25 2000-09-05 Conexant Systems, Inc. Digital phase lock loop divider cycling method, apparatus, and communication system incorporating the same
US6002273A (en) 1998-10-05 1999-12-14 Motorola, Inc. Linear low noise phase-frequency detector
US6160456A (en) 1999-06-14 2000-12-12 Realtek Semiconductor Corp. Phase-locked loop having adjustable delay elements

Also Published As

Publication number Publication date
EP1428335A1 (de) 2004-06-16
EP1729432A1 (de) 2006-12-06
EP1428335B1 (de) 2007-02-28
EP1729432B1 (de) 2008-12-03
DE60218496T2 (de) 2007-11-08
DE60218496D1 (de) 2007-04-12
ATE355661T1 (de) 2006-03-15
US20030050030A1 (en) 2003-03-13
DE60230202D1 (de) 2009-01-15
WO2003024005A1 (en) 2003-03-20
US6952138B2 (en) 2005-10-04

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