ATE372548T1 - Integrierte schaltung mit dynamischer speicherzuteilung - Google Patents

Integrierte schaltung mit dynamischer speicherzuteilung

Info

Publication number
ATE372548T1
ATE372548T1 AT04744598T AT04744598T ATE372548T1 AT E372548 T1 ATE372548 T1 AT E372548T1 AT 04744598 T AT04744598 T AT 04744598T AT 04744598 T AT04744598 T AT 04744598T AT E372548 T1 ATE372548 T1 AT E372548T1
Authority
AT
Austria
Prior art keywords
memory
modules
global
integrated circuit
local
Prior art date
Application number
AT04744598T
Other languages
English (en)
Inventor
Francoise Harmsze
Artur Burchard
Harm Kenter
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE372548T1 publication Critical patent/ATE372548T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
AT04744598T 2003-07-28 2004-07-16 Integrierte schaltung mit dynamischer speicherzuteilung ATE372548T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP03102312 2003-07-28

Publications (1)

Publication Number Publication Date
ATE372548T1 true ATE372548T1 (de) 2007-09-15

Family

ID=34089701

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04744598T ATE372548T1 (de) 2003-07-28 2004-07-16 Integrierte schaltung mit dynamischer speicherzuteilung

Country Status (7)

Country Link
US (1) US7483314B2 (de)
EP (1) EP1652093B1 (de)
JP (1) JP2007500390A (de)
CN (1) CN1829976A (de)
AT (1) ATE372548T1 (de)
DE (1) DE602004008780T2 (de)
WO (1) WO2005010759A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200717246A (en) * 2005-06-24 2007-05-01 Koninkl Philips Electronics Nv Self-synchronizing data streaming between address-based producer and consumer circuits
US20080046518A1 (en) * 2006-08-16 2008-02-21 James I Tonnison Enhanced E-Mail System
JP5190368B2 (ja) 2006-09-21 2013-04-24 株式会社オートネットワーク技術研究所 電子制御システム及び電子制御装置
EP1950932A1 (de) * 2007-01-29 2008-07-30 Stmicroelectronics Sa System zur Datenübertragung innerhalb eines Netzwerkes zwischen Knoten des Netzwerkes und Datenflusssteuerungsverfahren für die Übertragung dieser Daten
US20100058016A1 (en) * 2008-08-26 2010-03-04 Jari Nikara Method, apparatus and software product for multi-channel memory sandbox
US20100058025A1 (en) * 2008-08-26 2010-03-04 Kimmo Kuusilinna Method, apparatus and software product for distributed address-channel calculator for multi-channel memory
US11048410B2 (en) 2011-08-24 2021-06-29 Rambus Inc. Distributed procedure execution and file systems on a memory interface
US9098209B2 (en) 2011-08-24 2015-08-04 Rambus Inc. Communication via a memory interface
WO2013028827A1 (en) 2011-08-24 2013-02-28 Rambus Inc. Methods and systems for mapping a peripheral function onto a legacy memory interface
KR102130578B1 (ko) * 2014-12-02 2020-07-06 에스케이하이닉스 주식회사 반도체 장치
US10467148B2 (en) * 2016-06-16 2019-11-05 SK Hynix Inc. System of multiple configurations and operating method thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7707320B2 (en) * 2003-09-05 2010-04-27 Qualcomm Incorporated Communication buffer manager and method therefor

Also Published As

Publication number Publication date
US7483314B2 (en) 2009-01-27
US20070064500A1 (en) 2007-03-22
DE602004008780D1 (de) 2007-10-18
DE602004008780T2 (de) 2008-01-10
EP1652093A1 (de) 2006-05-03
EP1652093B1 (de) 2007-09-05
JP2007500390A (ja) 2007-01-11
CN1829976A (zh) 2006-09-06
WO2005010759A1 (en) 2005-02-03

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