ATE350764T1 - Verfahren zur selbst-justierten herstellung von implantierten gebieten - Google Patents

Verfahren zur selbst-justierten herstellung von implantierten gebieten

Info

Publication number
ATE350764T1
ATE350764T1 AT99200531T AT99200531T ATE350764T1 AT E350764 T1 ATE350764 T1 AT E350764T1 AT 99200531 T AT99200531 T AT 99200531T AT 99200531 T AT99200531 T AT 99200531T AT E350764 T1 ATE350764 T1 AT E350764T1
Authority
AT
Austria
Prior art keywords
self
implanted areas
adjustable production
adjustable
production
Prior art date
Application number
AT99200531T
Other languages
English (en)
Inventor
Ricardo Alves Donaton
Karen Irma Josef Maex
Rita Verbeeck
Philippe Jansen
Rita Rooyackers
Ludo Deferm
Mikhail Rodionovich Baklanov
Original Assignee
Imec Inter Uni Micro Electr
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Imec Inter Uni Micro Electr filed Critical Imec Inter Uni Micro Electr
Application granted granted Critical
Publication of ATE350764T1 publication Critical patent/ATE350764T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66492—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a pocket or a lightly doped drain selectively formed at the side of the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6653—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using the removal of at least part of spacer, e.g. disposable spacer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/108—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the Schottky type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1083—Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Weting (AREA)
  • Light Receiving Elements (AREA)
  • Drying Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Organic Low-Molecular-Weight Compounds And Preparation Thereof (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
AT99200531T 1995-06-19 1996-06-19 Verfahren zur selbst-justierten herstellung von implantierten gebieten ATE350764T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US242695P 1995-06-19 1995-06-19

Publications (1)

Publication Number Publication Date
ATE350764T1 true ATE350764T1 (de) 2007-01-15

Family

ID=21700706

Family Applications (2)

Application Number Title Priority Date Filing Date
AT96870078T ATE231286T1 (de) 1995-06-19 1996-06-19 Ätzverfahren für cosi2-schichten und verfahren zur herstellung von schottky-barrieren detektoren unter verwendung desselben
AT99200531T ATE350764T1 (de) 1995-06-19 1996-06-19 Verfahren zur selbst-justierten herstellung von implantierten gebieten

Family Applications Before (1)

Application Number Title Priority Date Filing Date
AT96870078T ATE231286T1 (de) 1995-06-19 1996-06-19 Ätzverfahren für cosi2-schichten und verfahren zur herstellung von schottky-barrieren detektoren unter verwendung desselben

Country Status (4)

Country Link
US (2) US6153484A (de)
EP (1) EP0750338B1 (de)
AT (2) ATE231286T1 (de)
DE (2) DE69636818T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3183249B2 (ja) * 1998-03-30 2001-07-09 日本電気株式会社 高抵抗負荷スタチック型ｒａｍの製造方法
US20030235936A1 (en) * 1999-12-16 2003-12-25 Snyder John P. Schottky barrier CMOS device and method
US6692976B1 (en) * 2000-08-31 2004-02-17 Agilent Technologies, Inc. Post-etch cleaning treatment
US6368963B1 (en) * 2000-09-12 2002-04-09 Advanced Micro Devices, Inc. Passivation of semiconductor device surfaces using an iodine/ethanol solution
JP2005516389A (ja) 2002-01-23 2005-06-02 スピネカ セミコンダクター， インコーポレイテッド 歪み半導体基板を用いてショットキまたはショットキのような接触を形成するソースおよび／またはドレインを有する電界効果トランジスタ
US6974737B2 (en) * 2002-05-16 2005-12-13 Spinnaker Semiconductor, Inc. Schottky barrier CMOS fabrication method
US7049667B2 (en) 2002-09-27 2006-05-23 Hrl Laboratories, Llc Conductive channel pseudo block process and circuit to inhibit reverse engineering
GB2430800B (en) * 2002-11-22 2007-06-27 Hrl Lab Llc Use of silicon block process step to camouflage a false transistor
US6979606B2 (en) * 2002-11-22 2005-12-27 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
WO2004055868A2 (en) 2002-12-13 2004-07-01 Hrl Laboratories, Llc Integrated circuit modification using well implants
US6905923B1 (en) 2003-07-15 2005-06-14 Advanced Micro Devices, Inc. Offset spacer process for forming N-type transistors
US7179745B1 (en) * 2004-06-04 2007-02-20 Advanced Micro Devices, Inc. Method for offsetting a silicide process from a gate electrode of a semiconductor device
US7242063B1 (en) 2004-06-29 2007-07-10 Hrl Laboratories, Llc Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
US7371333B2 (en) 2005-06-07 2008-05-13 Micron Technology, Inc. Methods of etching nickel silicide and cobalt silicide and methods of forming conductive lines
US8168487B2 (en) 2006-09-28 2012-05-01 Hrl Laboratories, Llc Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer
US8193602B2 (en) * 2010-04-20 2012-06-05 Texas Instruments Incorporated Schottky diode with control gate for optimization of the on state resistance, the reverse leakage, and the reverse breakdown
CN104752168B (zh) * 2015-04-23 2017-10-17 上海华力微电子有限公司 一种去除鳍式场效应晶体管中掺磷碳化硅薄膜缺陷的方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4378628A (en) * 1981-08-27 1983-04-05 Bell Telephone Laboratories, Incorporated Cobalt silicide metallization for semiconductor integrated circuits
US4569722A (en) * 1984-11-23 1986-02-11 At&T Bell Laboratories Ethylene glycol etch for processes using metal silicides
GB2214349B (en) * 1988-01-19 1991-06-26 Standard Microsyst Smc Process for fabricating mos devices
US5821175A (en) * 1988-07-08 1998-10-13 Cauldron Limited Partnership Removal of surface contaminants by irradiation using various methods to achieve desired inert gas flow over treated surface
US4990988A (en) * 1989-06-09 1991-02-05 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Laterally stacked Schottky diodes for infrared sensor applications
US5290715A (en) * 1991-12-31 1994-03-01 U.S. Philips Corporation Method of making dielectrically isolated metal base transistors and permeable base transistors
US5605865A (en) * 1995-04-03 1997-02-25 Motorola Inc. Method for forming self-aligned silicide in a semiconductor device using vapor phase reaction
US5728625A (en) * 1996-04-04 1998-03-17 Lucent Technologies Inc. Process for device fabrication in which a thin layer of cobalt silicide is formed
US5780362A (en) * 1996-06-04 1998-07-14 Wang; Qingfeng CoSi2 salicide method
US5814537A (en) * 1996-12-18 1998-09-29 Sharp Microelectronics Technology,Inc. Method of forming transistor electrodes from directionally deposited silicide
US5849091A (en) * 1997-06-02 1998-12-15 Micron Technology, Inc. Megasonic cleaning methods and apparatus
US5934980A (en) * 1997-06-09 1999-08-10 Micron Technology, Inc. Method of chemical mechanical polishing
US5834356A (en) * 1997-06-27 1998-11-10 Vlsi Technology, Inc. Method of making high resistive structures in salicided process semiconductor devices
US6074960A (en) * 1997-08-20 2000-06-13 Micron Technology, Inc. Method and composition for selectively etching against cobalt silicide
US5937319A (en) * 1997-10-31 1999-08-10 Advanced Micro Devices, Inc. Method of making a metal oxide semiconductor (MOS) transistor polysilicon gate with a size beyond photolithography limitation by using polysilicidation and selective etching

Also Published As

Publication number Publication date
DE69625747D1 (de) 2003-02-20
DE69636818T2 (de) 2007-11-08
DE69636818D1 (de) 2007-02-15
EP0750338A3 (de) 1997-04-16
EP0750338B1 (de) 2003-01-15
ATE231286T1 (de) 2003-02-15
US6255227B1 (en) 2001-07-03
DE69625747T2 (de) 2003-10-23
EP0750338A2 (de) 1996-12-27
US6153484A (en) 2000-11-28

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