ATE347111T1 - Mehrpegelsignalschnittstellenprüfung mit binärer prüfvorrichtung durch emulation von mehrpegelsignalen - Google Patents
Mehrpegelsignalschnittstellenprüfung mit binärer prüfvorrichtung durch emulation von mehrpegelsignalenInfo
- Publication number
- ATE347111T1 ATE347111T1 AT02798942T AT02798942T ATE347111T1 AT E347111 T1 ATE347111 T1 AT E347111T1 AT 02798942 T AT02798942 T AT 02798942T AT 02798942 T AT02798942 T AT 02798942T AT E347111 T1 ATE347111 T1 AT E347111T1
- Authority
- AT
- Austria
- Prior art keywords
- signals
- emulation
- signal interface
- test device
- level
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31712—Input or output aspects
- G01R31/31715—Testing of input or output circuits; test of circuitry between the I/C pins and the functional core, e.g. testing of input or output driver, receiver, buffer
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31926—Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5004—Voltage
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Computer Hardware Design (AREA)
- Tests Of Electronic Circuits (AREA)
- Dc Digital Transmission (AREA)
- Logic Circuits (AREA)
- Amplifiers (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/953,514 US20030070126A1 (en) | 2001-09-14 | 2001-09-14 | Built-in self-testing of multilevel signal interfaces |
US09/953,486 US7162672B2 (en) | 2001-09-14 | 2001-09-14 | Multilevel signal interface testing with binary test apparatus by emulation of multilevel signals |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE347111T1 true ATE347111T1 (de) | 2006-12-15 |
Family
ID=27130338
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT02798942T ATE347111T1 (de) | 2001-09-14 | 2002-09-09 | Mehrpegelsignalschnittstellenprüfung mit binärer prüfvorrichtung durch emulation von mehrpegelsignalen |
AT02798941T ATE345509T1 (de) | 2001-09-14 | 2002-09-09 | Eingebaute selbstprüfung von mehrpegelsignalschnittstellen |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT02798941T ATE345509T1 (de) | 2001-09-14 | 2002-09-09 | Eingebaute selbstprüfung von mehrpegelsignalschnittstellen |
Country Status (4)
Country | Link |
---|---|
EP (2) | EP1425593B1 (de) |
AT (2) | ATE347111T1 (de) |
DE (2) | DE60216125T2 (de) |
WO (2) | WO2003025599A1 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7126378B2 (en) | 2003-12-17 | 2006-10-24 | Rambus, Inc. | High speed signaling system with adaptive transmit pre-emphasis |
US7092472B2 (en) | 2003-09-16 | 2006-08-15 | Rambus Inc. | Data-level clock recovery |
US7397848B2 (en) | 2003-04-09 | 2008-07-08 | Rambus Inc. | Partial response receiver |
US7233164B2 (en) | 2003-12-17 | 2007-06-19 | Rambus Inc. | Offset cancellation in a multi-level signaling system |
US9042427B2 (en) | 2011-03-14 | 2015-05-26 | Mohit Singh | Methods for generating multi-level pseudo-random sequences |
US9535119B2 (en) * | 2014-06-30 | 2017-01-03 | Intel Corporation | Duty cycle based timing margining for I/O AC timing |
DE102015205478A1 (de) * | 2015-03-26 | 2016-09-29 | Bayerische Motoren Werke Aktiengesellschaft | Verfahren und Vorrichtung zur Konfiguration einer Übertragungsverbindung |
US10229748B1 (en) | 2017-11-28 | 2019-03-12 | International Business Machines Corporation | Memory interface latch with integrated write-through function |
US10381098B2 (en) | 2017-11-28 | 2019-08-13 | International Business Machines Corporation | Memory interface latch with integrated write-through and fence functions |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1533576A (en) * | 1975-09-24 | 1978-11-29 | Computer Technology Ltd | Computer systems |
US5097144A (en) * | 1990-04-30 | 1992-03-17 | International Business Machines Corporation | Driver circuit for testing bi-directional transceiver semiconductor products |
JP2766119B2 (ja) * | 1992-04-20 | 1998-06-18 | 日本電気株式会社 | 空間スイッチ回路 |
US6055661A (en) * | 1994-06-13 | 2000-04-25 | Luk; Fong | System configuration and methods for on-the-fly testing of integrated circuits |
JPH10325854A (ja) * | 1997-05-26 | 1998-12-08 | Sony Corp | 半導体装置 |
US6275962B1 (en) * | 1998-10-23 | 2001-08-14 | Teradyne, Inc. | Remote test module for automatic test equipment |
US6230221B1 (en) * | 1998-12-30 | 2001-05-08 | Emc Corporation | Data storage system having a host computer coupled to bank of disk drives through interface comprising plurality of directors, busses, and reference voltage generators |
US6452411B1 (en) * | 1999-03-01 | 2002-09-17 | Formfactor, Inc. | Efficient parallel testing of integrated circuit devices using a known good device to generate expected responses |
US6175939B1 (en) * | 1999-03-30 | 2001-01-16 | Credence Systems Corporation | Integrated circuit testing device with dual purpose analog and digital channels |
-
2002
- 2002-09-09 WO PCT/US2002/028629 patent/WO2003025599A1/en active IP Right Grant
- 2002-09-09 WO PCT/US2002/028631 patent/WO2003025600A1/en active IP Right Grant
- 2002-09-09 EP EP02798941A patent/EP1425593B1/de not_active Revoked
- 2002-09-09 AT AT02798942T patent/ATE347111T1/de not_active IP Right Cessation
- 2002-09-09 AT AT02798941T patent/ATE345509T1/de not_active IP Right Cessation
- 2002-09-09 DE DE60216125T patent/DE60216125T2/de not_active Revoked
- 2002-09-09 DE DE60216484T patent/DE60216484T2/de not_active Revoked
- 2002-09-09 EP EP02798942A patent/EP1425594B1/de not_active Revoked
Also Published As
Publication number | Publication date |
---|---|
EP1425594A4 (de) | 2005-01-12 |
WO2003025599A1 (en) | 2003-03-27 |
DE60216125D1 (de) | 2006-12-28 |
DE60216484D1 (de) | 2007-01-11 |
WO2003025600A1 (en) | 2003-03-27 |
EP1425593A4 (de) | 2005-01-12 |
EP1425593B1 (de) | 2006-11-15 |
ATE345509T1 (de) | 2006-12-15 |
EP1425593A1 (de) | 2004-06-09 |
EP1425594A1 (de) | 2004-06-09 |
DE60216125T2 (de) | 2007-10-04 |
EP1425594B1 (de) | 2006-11-29 |
DE60216484T2 (de) | 2007-08-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |