ATE344560T1 - Zeitmultiplex-vermittlungssystem (tdm) mit sehr breitem speicher - Google Patents

Zeitmultiplex-vermittlungssystem (tdm) mit sehr breitem speicher

Info

Publication number
ATE344560T1
ATE344560T1 AT00302910T AT00302910T ATE344560T1 AT E344560 T1 ATE344560 T1 AT E344560T1 AT 00302910 T AT00302910 T AT 00302910T AT 00302910 T AT00302910 T AT 00302910T AT E344560 T1 ATE344560 T1 AT E344560T1
Authority
AT
Austria
Prior art keywords
packets
width
packet
system includes
memory
Prior art date
Application number
AT00302910T
Other languages
English (en)
Inventor
Ronald P Bianchini Jr
Original Assignee
Ericsson Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Ab filed Critical Ericsson Ab
Application granted granted Critical
Publication of ATE344560T1 publication Critical patent/ATE344560T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13103—Memory
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13292—Time division multiplexing, TDM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13299—Bus
AT00302910T 1999-04-15 2000-04-06 Zeitmultiplex-vermittlungssystem (tdm) mit sehr breitem speicher ATE344560T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/293,563 US7031330B1 (en) 1999-04-15 1999-04-15 Very wide memory TDM switching system

Publications (1)

Publication Number Publication Date
ATE344560T1 true ATE344560T1 (de) 2006-11-15

Family

ID=23129591

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00302910T ATE344560T1 (de) 1999-04-15 2000-04-06 Zeitmultiplex-vermittlungssystem (tdm) mit sehr breitem speicher

Country Status (5)

Country Link
US (1) US7031330B1 (de)
EP (1) EP1045558B1 (de)
JP (1) JP4480845B2 (de)
AT (1) ATE344560T1 (de)
DE (1) DE60031596T2 (de)

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US7408957B2 (en) * 2002-06-13 2008-08-05 International Business Machines Corporation Selective header field dispatch in a network processing system
GB2396447A (en) * 2002-12-21 2004-06-23 Robert Clive Roust Data flow processing technique
US7492760B1 (en) * 2003-03-31 2009-02-17 Pmc-Sierra, Inc. Memory egress self selection architecture
US8427490B1 (en) 2004-05-14 2013-04-23 Nvidia Corporation Validating a graphics pipeline using pre-determined schedules
US8624906B2 (en) * 2004-09-29 2014-01-07 Nvidia Corporation Method and system for non stalling pipeline instruction fetching from memory
US8424012B1 (en) * 2004-11-15 2013-04-16 Nvidia Corporation Context switching on a video processor having a scalar execution unit and a vector execution unit
US8072887B1 (en) * 2005-02-07 2011-12-06 Extreme Networks, Inc. Methods, systems, and computer program products for controlling enqueuing of packets in an aggregated queue including a plurality of virtual queues using backpressure messages from downstream queues
US9092170B1 (en) 2005-10-18 2015-07-28 Nvidia Corporation Method and system for implementing fragment operation processing across a graphics bus interconnect
US7852866B2 (en) * 2006-12-29 2010-12-14 Polytechnic Institute of New York Universiity Low complexity scheduling algorithm for a buffered crossbar switch with 100% throughput
US7978690B2 (en) * 2007-03-31 2011-07-12 International Business Machines Corporation Method to operate a crossbar switch
US8683126B2 (en) 2007-07-30 2014-03-25 Nvidia Corporation Optimal use of buffer space by a storage controller which writes retrieved data directly to a memory
US8659601B1 (en) 2007-08-15 2014-02-25 Nvidia Corporation Program sequencer for generating indeterminant length shader programs for a graphics processor
US8411096B1 (en) 2007-08-15 2013-04-02 Nvidia Corporation Shader program instruction fetch
US9024957B1 (en) 2007-08-15 2015-05-05 Nvidia Corporation Address independent shader program loading
US8698819B1 (en) 2007-08-15 2014-04-15 Nvidia Corporation Software assisted shader merging
US9064333B2 (en) 2007-12-17 2015-06-23 Nvidia Corporation Interrupt handling techniques in the rasterizer of a GPU
US8780123B2 (en) 2007-12-17 2014-07-15 Nvidia Corporation Interrupt handling techniques in the rasterizer of a GPU
US8923385B2 (en) 2008-05-01 2014-12-30 Nvidia Corporation Rewind-enabled hardware encoder
US8681861B2 (en) 2008-05-01 2014-03-25 Nvidia Corporation Multistandard hardware video encoder
US8489851B2 (en) 2008-12-11 2013-07-16 Nvidia Corporation Processing of read requests in a memory controller using pre-fetch mechanism
US8452908B2 (en) * 2009-12-29 2013-05-28 Juniper Networks, Inc. Low latency serial memory interface
WO2011118519A1 (ja) * 2010-03-24 2011-09-29 日本電気株式会社 伝送装置及び伝送方法
US8873955B2 (en) * 2010-10-25 2014-10-28 Polytechnic Institute Of New York University Distributed scheduling for an optical switch
US9039432B2 (en) 2011-07-08 2015-05-26 Cisco Technology, Inc. System and method for high connectivity platform
US8545246B2 (en) 2011-07-25 2013-10-01 Cisco Technology, Inc. High connectivity platform
CN111724804A (zh) * 2020-06-29 2020-09-29 北京百度网讯科技有限公司 用于处理信息的方法和装置

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US5475680A (en) * 1989-09-15 1995-12-12 Gpt Limited Asynchronous time division multiplex switching system
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US5309432A (en) * 1992-05-06 1994-05-03 At&T Bell Laboratories High-speed packet switch
US5732041A (en) * 1993-08-19 1998-03-24 Mmc Networks, Inc. Memory interface unit, shared memory switch system and associated method
JP2856104B2 (ja) * 1995-04-18 1999-02-10 日本電気株式会社 Ａｔｍスイッチ
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US5574505A (en) * 1995-05-16 1996-11-12 Thomson Multimedia S.A. Method and apparatus for operating a transport stream encoder to produce a stream of packets carrying data representing a plurality of component signals
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Also Published As

Publication number Publication date
EP1045558A2 (de) 2000-10-18
US7031330B1 (en) 2006-04-18
JP4480845B2 (ja) 2010-06-16
DE60031596T2 (de) 2007-09-06
EP1045558B1 (de) 2006-11-02
JP2000349789A (ja) 2000-12-15
DE60031596D1 (de) 2006-12-14
EP1045558A3 (de) 2004-11-17

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