ATE239262T1 - Verfahren und gerät zum automatischen test eines simulierten integrierten schaltkreises - Google Patents

Verfahren und gerät zum automatischen test eines simulierten integrierten schaltkreises

Info

Publication number
ATE239262T1
ATE239262T1 AT98952916T AT98952916T ATE239262T1 AT E239262 T1 ATE239262 T1 AT E239262T1 AT 98952916 T AT98952916 T AT 98952916T AT 98952916 T AT98952916 T AT 98952916T AT E239262 T1 ATE239262 T1 AT E239262T1
Authority
AT
Austria
Prior art keywords
integrated circuit
automatic test
flip
simulated integrated
flop
Prior art date
Application number
AT98952916T
Other languages
English (en)
Inventor
David Baker
Original Assignee
Virata Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Virata Ltd filed Critical Virata Ltd
Application granted granted Critical
Publication of ATE239262T1 publication Critical patent/ATE239262T1/de

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318522—Test of Sequential circuits
    • G01R31/31853—Test of registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
AT98952916T 1997-11-25 1998-11-11 Verfahren und gerät zum automatischen test eines simulierten integrierten schaltkreises ATE239262T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB9724895.9A GB9724895D0 (en) 1997-11-25 1997-11-25 Method and apparatus for automatically testing the design of a simulated integrated circuit
PCT/GB1998/003384 WO1999027472A1 (en) 1997-11-25 1998-11-11 Method and apparatus for automatically testing the design of a simulated integrated circuit

Publications (1)

Publication Number Publication Date
ATE239262T1 true ATE239262T1 (de) 2003-05-15

Family

ID=10822614

Family Applications (1)

Application Number Title Priority Date Filing Date
AT98952916T ATE239262T1 (de) 1997-11-25 1998-11-11 Verfahren und gerät zum automatischen test eines simulierten integrierten schaltkreises

Country Status (7)

Country Link
EP (1) EP1070297B1 (de)
AT (1) ATE239262T1 (de)
AU (1) AU1045899A (de)
DE (1) DE69814176T2 (de)
GB (1) GB9724895D0 (de)
IL (1) IL135259A (de)
WO (1) WO1999027472A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014052936A1 (en) * 2012-09-28 2014-04-03 Arteris SAS Automatic safety logic insertion

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994023388A1 (en) * 1993-03-31 1994-10-13 Alcatel N.V. Method for solving asynchronisms in digital logic simulators

Also Published As

Publication number Publication date
DE69814176T2 (de) 2004-03-25
EP1070297B1 (de) 2003-05-02
DE69814176D1 (de) 2003-06-05
IL135259A0 (en) 2001-05-20
GB9724895D0 (en) 1998-01-28
EP1070297A1 (de) 2001-01-24
WO1999027472A1 (en) 1999-06-03
IL135259A (en) 2004-06-01
AU1045899A (en) 1999-06-15

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties