ATE238602T1 - Speichermodulsprüfeinrichtung mit verminderter ausgangstreiberimpendanz - Google Patents
Speichermodulsprüfeinrichtung mit verminderter ausgangstreiberimpendanzInfo
- Publication number
- ATE238602T1 ATE238602T1 AT00957543T AT00957543T ATE238602T1 AT E238602 T1 ATE238602 T1 AT E238602T1 AT 00957543 T AT00957543 T AT 00957543T AT 00957543 T AT00957543 T AT 00957543T AT E238602 T1 ATE238602 T1 AT E238602T1
- Authority
- AT
- Austria
- Prior art keywords
- memory module
- test signal
- loadboard
- test
- test system
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31905—Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31924—Voltage or current aspects, e.g. driver, receiver
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/378,876 US6442718B1 (en) | 1999-08-23 | 1999-08-23 | Memory module test system with reduced driver output impedance |
PCT/US2000/022660 WO2001015174A1 (en) | 1999-08-23 | 2000-08-17 | A memory module test system with reduced driver output impedance |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE238602T1 true ATE238602T1 (de) | 2003-05-15 |
Family
ID=23494908
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT00957543T ATE238602T1 (de) | 1999-08-23 | 2000-08-17 | Speichermodulsprüfeinrichtung mit verminderter ausgangstreiberimpendanz |
Country Status (7)
Country | Link |
---|---|
US (1) | US6442718B1 (de) |
EP (1) | EP1208568B1 (de) |
JP (1) | JP2003507841A (de) |
AT (1) | ATE238602T1 (de) |
AU (1) | AU6914500A (de) |
DE (1) | DE60002349T2 (de) |
WO (1) | WO2001015174A1 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6714433B2 (en) | 2001-06-15 | 2004-03-30 | Sun Microsystems, Inc. | Memory module with equal driver loading |
CN1184833C (zh) | 2001-12-21 | 2005-01-12 | 华为技术有限公司 | 一种基于移动国家码确定保密通信中加密算法的方法 |
US6995355B2 (en) * | 2003-06-23 | 2006-02-07 | Advanced Optical Technologies, Llc | Optical integrating chamber lighting using multiple color sources |
US7292046B2 (en) * | 2003-09-03 | 2007-11-06 | Infineon Technologies Ag | Simulated module load |
US7511526B2 (en) * | 2006-08-23 | 2009-03-31 | Munt Kenneth A | Circuit module testing apparatus and method |
WO2010048971A1 (en) * | 2008-10-30 | 2010-05-06 | Verigy (Singapore) Pte., Ltd. | Test arrangement, pogo-pin and method for testing a device under test |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01277949A (ja) | 1988-04-28 | 1989-11-08 | Fanuc Ltd | メモリ試験方式 |
US5134311A (en) * | 1990-06-07 | 1992-07-28 | International Business Machines Corporation | Self-adjusting impedance matching driver |
US5146161A (en) | 1991-04-05 | 1992-09-08 | Vlsi Technology, Inc. | Integrated circuit test system |
US5107230A (en) * | 1991-04-26 | 1992-04-21 | Hewlett-Packard Company | Switched drivers providing backmatch impedance for circuit test systems |
US5430400A (en) * | 1993-08-03 | 1995-07-04 | Schlumberger Technologies Inc. | Driver circuits for IC tester |
WO1997024622A1 (fr) | 1994-07-15 | 1997-07-10 | Advantest Corporation | Circuit electronique a broche d'entree/sortie |
US5559441A (en) * | 1995-04-19 | 1996-09-24 | Hewlett-Packard Company | Transmission line driver with self adjusting output impedance |
US5742557A (en) * | 1996-06-20 | 1998-04-21 | Northern Telecom Limited | Multi-port random access memory |
US5745003A (en) * | 1996-09-11 | 1998-04-28 | Schlumberger Technologies Inc. | Driver circuits for IC tester |
US5856758A (en) * | 1996-11-20 | 1999-01-05 | Adtran, Inc. | Low distortion driver employing positive feedback for reducing power loss in output impedance that effectively matches the impedance of driven line |
AU7122798A (en) | 1997-04-17 | 1998-11-11 | Tollgrade Communications, Inc. | Telephony test system with adjustable output impedance |
US5877993A (en) * | 1997-05-13 | 1999-03-02 | Micron Technology, Inc. | Memory circuit voltage regulator |
JP3019810B2 (ja) * | 1997-07-24 | 2000-03-13 | 日本電気株式会社 | 集積回路試験装置 |
JP3828652B2 (ja) * | 1998-01-09 | 2006-10-04 | 株式会社アドバンテスト | 差動信号伝送回路 |
-
1999
- 1999-08-23 US US09/378,876 patent/US6442718B1/en not_active Expired - Lifetime
-
2000
- 2000-08-17 WO PCT/US2000/022660 patent/WO2001015174A1/en active IP Right Grant
- 2000-08-17 AU AU69145/00A patent/AU6914500A/en not_active Abandoned
- 2000-08-17 EP EP00957543A patent/EP1208568B1/de not_active Expired - Lifetime
- 2000-08-17 JP JP2001519448A patent/JP2003507841A/ja active Pending
- 2000-08-17 DE DE60002349T patent/DE60002349T2/de not_active Expired - Fee Related
- 2000-08-17 AT AT00957543T patent/ATE238602T1/de not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
WO2001015174A1 (en) | 2001-03-01 |
EP1208568B1 (de) | 2003-04-23 |
DE60002349D1 (de) | 2003-05-28 |
US6442718B1 (en) | 2002-08-27 |
WO2001015174A9 (en) | 2002-07-11 |
JP2003507841A (ja) | 2003-02-25 |
EP1208568A1 (de) | 2002-05-29 |
AU6914500A (en) | 2001-03-19 |
DE60002349T2 (de) | 2003-12-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |