ATE161671T1 - Anordnung zur erzeugung eines taktsignals mit bitgenauen lücken - Google Patents
Anordnung zur erzeugung eines taktsignals mit bitgenauen lückenInfo
- Publication number
- ATE161671T1 ATE161671T1 AT93112719T AT93112719T ATE161671T1 AT E161671 T1 ATE161671 T1 AT E161671T1 AT 93112719 T AT93112719 T AT 93112719T AT 93112719 T AT93112719 T AT 93112719T AT E161671 T1 ATE161671 T1 AT E161671T1
- Authority
- AT
- Austria
- Prior art keywords
- clock
- bit
- gaps
- clock signal
- generating
- Prior art date
Links
- 238000001514 detection method Methods 0.000 abstract 1
- 238000000605 extraction Methods 0.000 abstract 1
- 230000001360 synchronised effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/40—Monitoring; Error detection; Preventing or correcting improper counter operation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0602—Systems characterised by the synchronising information used
- H04J3/0614—Systems characterised by the synchronising information used the synchronising signal being characterised by the amplitude, duration or polarity
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
- H04J3/0688—Change of the master or reference, e.g. take-over or failure of the master
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronizing For Television (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Time-Division Multiplex Systems (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE4227285 | 1992-08-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE161671T1 true ATE161671T1 (de) | 1998-01-15 |
Family
ID=6465784
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT93112719T ATE161671T1 (de) | 1992-08-18 | 1993-08-09 | Anordnung zur erzeugung eines taktsignals mit bitgenauen lücken |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP0588050B1 (OSRAM) |
| AT (1) | ATE161671T1 (OSRAM) |
| DE (1) | DE59307881D1 (OSRAM) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19830130B4 (de) * | 1998-07-06 | 2007-01-18 | Robert Bosch Gmbh | Schaltungsanordnung für eine PLL-Schaltung (Phase-locked-Loop) zur Frequenzvervielfachung |
| CN117241362A (zh) * | 2022-06-06 | 2023-12-15 | 中兴通讯股份有限公司 | 时钟异常检测装置、方法及基站 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2996248A (en) * | 1957-12-31 | 1961-08-15 | Bell Telephone Labor Inc | Supervisory system for an electronic counter |
| FR2473235A1 (fr) * | 1980-01-08 | 1981-07-10 | Schirlin Marcel | Dispositif de restitution de signal de rythme pour systeme de synchronisation maitre-esclave, notamment pour systeme de synchronisation d'un reseau de telecommunications par voies numeriques |
| DE3227848A1 (de) * | 1982-07-26 | 1984-01-26 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung zur takterzeugung in fernmeldeanlagen, insbesondere zeitmultiplex-digital-vermittlungsanlagen |
| US4651103A (en) * | 1985-12-30 | 1987-03-17 | At&T Company | Phase adjustment system |
| US4672299A (en) * | 1986-05-23 | 1987-06-09 | American Telephone And Telegraph Co. | Clock control circuit for phase control |
| EP0419895B1 (de) * | 1989-09-27 | 1995-11-29 | Siemens Aktiengesellschaft | Taktversorgung für Multiplexsysteme |
-
1993
- 1993-08-09 AT AT93112719T patent/ATE161671T1/de not_active IP Right Cessation
- 1993-08-09 EP EP93112719A patent/EP0588050B1/de not_active Expired - Lifetime
- 1993-08-09 DE DE59307881T patent/DE59307881D1/de not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| EP0588050A2 (de) | 1994-03-23 |
| DE59307881D1 (de) | 1998-02-05 |
| EP0588050A3 (OSRAM) | 1994-04-27 |
| EP0588050B1 (de) | 1997-12-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| REN | Ceased due to non-payment of the annual fee |