ATE114094T1 - Schaltungsanordung zum synchronisieren eines asynchronen digitalen signals auf einen systemstakt. - Google Patents
Schaltungsanordung zum synchronisieren eines asynchronen digitalen signals auf einen systemstakt.Info
- Publication number
- ATE114094T1 ATE114094T1 AT89114851T AT89114851T ATE114094T1 AT E114094 T1 ATE114094 T1 AT E114094T1 AT 89114851 T AT89114851 T AT 89114851T AT 89114851 T AT89114851 T AT 89114851T AT E114094 T1 ATE114094 T1 AT E114094T1
- Authority
- AT
- Austria
- Prior art keywords
- digital signal
- asynchronous digital
- synchronizing
- circuit arrangement
- system clock
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Synchronizing For Television (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3828606 | 1988-08-23 |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE114094T1 true ATE114094T1 (de) | 1994-11-15 |
Family
ID=6361435
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT89114851T ATE114094T1 (de) | 1988-08-23 | 1989-08-10 | Schaltungsanordung zum synchronisieren eines asynchronen digitalen signals auf einen systemstakt. |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0355607B1 (fr) |
AT (1) | ATE114094T1 (fr) |
DE (1) | DE58908622D1 (fr) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5548622A (en) * | 1995-03-24 | 1996-08-20 | Sgs-Thomson Microelectronics, Inc. | Method and structure for synchronization of asynchronous signals |
FR2786052B1 (fr) * | 1998-11-18 | 2001-02-02 | Gemplus Card Int | Procede de transmission numerique |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3950705A (en) * | 1974-12-23 | 1976-04-13 | Tull Aviation Corporation | Noise rejection method and apparatus for digital data systems |
DE3005396C2 (de) * | 1980-02-13 | 1981-10-29 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung zur Gewinnung eines taktgebundenen Signals |
DE3105905C2 (de) * | 1981-02-18 | 1982-11-04 | Eurosil GmbH, 8000 München | Schaltungsanordnung zum Umwandeln von Eingangsimpulsen in prellfreie und mit einem vorgegebenen Takt synchrone Ausgangsimpulse |
-
1989
- 1989-08-10 AT AT89114851T patent/ATE114094T1/de active
- 1989-08-10 DE DE58908622T patent/DE58908622D1/de not_active Expired - Fee Related
- 1989-08-10 EP EP89114851A patent/EP0355607B1/fr not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0355607A2 (fr) | 1990-02-28 |
DE58908622D1 (de) | 1994-12-15 |
EP0355607B1 (fr) | 1994-11-09 |
EP0355607A3 (fr) | 1991-03-20 |
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