CN113447140B

CN113447140B - CMOS infrared microbridge detector

Info

Publication number: CN113447140B
Application number: CN202110711254.4A
Authority: CN
Inventors: 翟光杰; 潘辉; 武佩; 翟光强
Original assignee: Beijing North Gaoye Technology Co ltd
Current assignee: Beijing North Gaoye Technology Co ltd
Priority date: 2021-06-25
Filing date: 2021-06-25
Publication date: 2023-01-06
Anticipated expiration: 2041-06-25
Also published as: CN113447140A

Abstract

The utility model relates to a CMOS infrared microbridge detector, CMOS measurement circuitry and CMOS infrared sensing structure in the infrared microbridge detector all use CMOS technology preparation, in the infrared microbridge detector, first columnar structure is located between reflector layer and the beam structure, second columnar structure is located between absorption board and the beam structure, first columnar structure and second columnar structure are hollow columnar structure, absorption board and beam structure all include electrode layer and at least two-layer dielectric layer, first columnar structure and second columnar structure all include the electrode layer at least. Through the technical scheme of this disclosure, the performance that has solved traditional MEMS technology infrared focal plane detector is low, and the pixel scale is low, the low and poor problem of uniformity of yield, is favorable to reducing the thermal conductance of first columnar structure and second columnar structure, increases the area of absorption board, promotes infrared detection sensitivity of infrared microbridge detector.

Description

CMOS infrared microbridge detector

Technical Field

The present disclosure relates to the field of infrared detection technologies, and in particular, to a CMOS infrared microbridge detector.

Background

The fields of monitoring markets, vehicle and auxiliary markets, home markets, intelligent manufacturing markets, mobile phone applications and the like have strong demands on uncooled high-performance chips, certain requirements are provided for the performance of the chips, the performance consistency and the product price, the potential demands of more than one hundred million chips are expected every year, and the current process scheme and architecture cannot meet the market demands.

At present, an infrared focal plane detector adopts a mode of combining a measuring circuit and an infrared sensing structure, the measuring circuit is prepared by adopting a Complementary Metal-Oxide-Semiconductor (CMOS) process, and the infrared sensing structure is prepared by adopting a Micro-Electro-Mechanical System (MEMS) process, so that the following problems are caused:

(1) The infrared sensing structure is prepared by adopting an MEMS (micro-electromechanical systems) process, polyimide is used as a sacrificial layer, and the infrared sensing structure is incompatible with a CMOS (complementary metal oxide semiconductor) process.

(2) Polyimide is used as a sacrificial layer, so that the problem that the vacuum degree of a detector chip is influenced due to incomplete release exists, the growth temperature of a subsequent film is limited, and the selection of materials is not facilitated.

(3) Polyimide can cause the height of the resonant cavity to be inconsistent, and the working dominant wavelength is difficult to guarantee.

(4) The control of the MEMS process is far worse than that of the CMOS process, and the performance consistency and the detection performance of the chip are restricted.

(5) MEMS has low productivity, low yield and high cost, and can not realize large-scale batch production.

(6) The existing process capability of the MEMS is not enough to support the preparation of a detector with higher performance, and the MEMS has smaller line width and thinner film thickness, thereby being not beneficial to realizing the miniaturization of a chip.

Disclosure of Invention

In order to solve the technical problem or at least partially solve the technical problem, the present disclosure provides a CMOS infrared microbridge detector, which solves the problems of low performance, low pixel scale, low yield and poor consistency of the conventional MEMS infrared focal plane detector, is beneficial to reducing the thermal conductance of the first columnar structure and the second columnar structure, increases the area of the absorption plate, and improves the infrared detection sensitivity of the infrared microbridge detector.

The present disclosure provides a CMOS infrared microbridge detector, including:

the CMOS infrared sensing structure comprises a CMOS measuring circuit system and a CMOS infrared sensing structure, wherein the CMOS measuring circuit system and the CMOS infrared sensing structure are both prepared by using a CMOS process, and the CMOS infrared sensing structure is directly prepared on the CMOS measuring circuit system;

the CMOS measurement circuit system comprises at least one layer of closed release isolation layer above the CMOS measurement circuit system, wherein the closed release isolation layer is used for protecting the CMOS measurement circuit system from being influenced by a process in the release etching process of manufacturing the CMOS infrared sensing structure;

the CMOS manufacturing process of the CMOS infrared sensing structure comprises a metal interconnection process, a through hole process, an IMD (in-mold decoration) process and an RDL (remote description language) process, wherein the CMOS infrared sensing structure comprises at least three metal interconnection layers, at least three dielectric layers and a plurality of interconnection through holes, the metal interconnection layers at least comprise a reflecting layer and two electrode layers, and the dielectric layers at least comprise two sacrificial layers and one heat-sensitive dielectric layer; the thermal sensitive medium layer is used for converting temperature change corresponding to infrared radiation absorbed by the thermal sensitive medium layer into resistance change, and further converting an infrared target signal into a signal capable of realizing electric reading through the CMOS measuring circuit system;

the CMOS infrared sensing structure comprises a resonant cavity formed by the reflecting layer and the heat sensitive medium layer, a suspended micro-bridge structure for controlling heat transfer, a first columnar structure and a second columnar structure which have the functions of electric connection and support, wherein the suspended micro-bridge structure comprises an absorption plate and a plurality of beam structures, the first columnar structure is positioned between the reflecting layer and the beam structures, the beam structures are electrically connected with the CMOS measuring circuit system through the first columnar structure, the beam structures are positioned on one side of the absorption plate close to or far away from the CMOS measuring circuit system, the second columnar structure is positioned between the absorption plate and the beam structures, and the absorption plate is used for converting infrared signals into electric signals and is electrically connected with the corresponding first columnar structure through the second columnar structure and the corresponding beam structure;

the first columnar structure and the second columnar structure are both hollow columnar structures, the absorption plate and the beam structure both comprise an electrode layer and at least two dielectric layers, and the first columnar structure and the second columnar structure both comprise at least an electrode layer;

the CMOS measuring circuit system is used for measuring and processing an array resistance value formed by one or more CMOS infrared sensing structures and converting an infrared signal into an image electric signal; the CMOS measuring circuit system comprises a bias voltage generating circuit, a column-level analog front-end circuit and a row-level circuit, wherein the input end of the bias voltage generating circuit is connected with the output end of the row-level circuit, the input end of the column-level analog front-end circuit is connected with the output end of the bias voltage generating circuit, the row-level circuit comprises row-level mirror image pixels and row selection switches, and the column-level analog front-end circuit comprises blind pixels; the row-level circuit is distributed in each pixel, selects a signal to be processed according to a row strobe signal of the time sequence generating circuit, and outputs a current signal to the column-level analog front-end circuit under the action of the bias voltage generating circuit so as to perform current-voltage conversion and output;

the column-level analog front-end circuit obtains two paths of currents according to the first bias voltage and the second bias voltage, performs transimpedance amplification on the difference between the two paths of generated currents and outputs the amplified current as an output voltage.

Optionally, the CMOS infrared sensing structure is fabricated on an upper layer or a same layer of a metal interconnection layer of the CMOS measurement circuitry.

Optionally, the sacrificial layer is used for enabling the CMOS infrared sensing structure to form a hollow structure, the material forming the sacrificial layer is silicon oxide, and the sacrificial layer is etched by a post-CMOS process.

Optionally, the reflective layer is configured to reflect an infrared signal and form the resonant cavity with the thermal sensitive dielectric layer, the reflective layer includes at least one metal interconnection layer, the first pillar structure connects the beam structure and the CMOS measurement circuitry through the metal interconnection process and the via process, and the second pillar structure connects the absorber plate and the beam structure through the metal interconnection process and the via process;

the beam structure sequentially comprises a first dielectric layer, a first electrode layer and a second dielectric layer along the direction far away from the CMOS measuring circuit system, the first columnar structure at least comprises the first electrode layer, the absorption plate sequentially comprises a third dielectric layer, a second electrode layer and a fourth dielectric layer, and the second columnar structure at least comprises the second electrode layer; the material forming the first dielectric layer comprises at least one of amorphous silicon, amorphous germanium-silicon, amorphous carbon or aluminum oxide, the material forming the second dielectric layer comprises at least one of amorphous silicon, amorphous germanium-silicon, amorphous carbon or aluminum oxide, the material forming the third dielectric layer comprises at least one of materials prepared from amorphous silicon, amorphous germanium-silicon or amorphous carbon and having a resistance temperature coefficient larger than a set value, and the material forming the fourth dielectric layer comprises at least one of materials prepared from amorphous silicon, amorphous germanium-silicon or amorphous carbon and having a resistance temperature coefficient larger than a set value; alternatively, the first and second liquid crystal display panels may be,

along the direction far away from the CMOS measuring circuit system, the beam structure sequentially comprises a first dielectric layer, a first electrode layer and a second dielectric layer, the first columnar structure at least comprises the first electrode layer, the absorption plate sequentially comprises a third dielectric layer, a second electrode layer, a heat-sensitive dielectric layer and a fourth dielectric layer or the absorption plate sequentially comprises a third dielectric layer, a heat-sensitive dielectric layer, a second electrode layer and a fourth dielectric layer, and the second columnar structure at least comprises the second electrode layer; wherein the material for forming the first dielectric layer comprises at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon or aluminum oxide, the material for forming the second dielectric layer comprises at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon or aluminum oxide, the material for forming the third dielectric layer comprises at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon or aluminum oxide, the material for forming the fourth dielectric layer comprises at least one of amorphous silicon, amorphous germanium-silicon, amorphous carbon or aluminum oxide, and the material for forming the heat sensitive dielectric layer comprises at least one of materials with the resistance temperature coefficient larger than a set value, which are prepared from titanium oxide, vanadium oxide, amorphous silicon, amorphous germanium-silicon, amorphous germanium-oxygen-silicon, germanium-silicon, germanium-oxygen-silicon, graphene, barium strontium titanate film, copper or platinum;

the material forming the first electrode layer comprises at least one of titanium, titanium nitride, tantalum nitride, titanium-tungsten alloy, nickel-chromium alloy, nickel-platinum alloy, nickel-silicon alloy, nickel, chromium, platinum, tungsten, aluminum or copper, and the material forming the second electrode layer comprises at least one of titanium, titanium nitride, tantalum nitride, titanium-tungsten alloy, nickel-chromium alloy, nickel-platinum alloy, nickel-silicon alloy, nickel, chromium, platinum, tungsten, aluminum or copper.

Optionally, the infrared detector further includes a first reinforcing structure, the first reinforcing structure is disposed at a position corresponding to the first columnar structure, and the first reinforcing structure is configured to enhance connection stability between the first columnar structure and the beam structure and between the first columnar structure and the reflective layer;

the first reinforcing structure is located on one side, close to or far away from the CMOS measuring circuit system, of the first electrode layer.

Optionally, the infrared detector further includes a second reinforcing structure, where the second reinforcing structure is disposed corresponding to the second columnar structure, and the second reinforcing structure is configured to enhance connection stability between the second columnar structure and the absorption plate and between the second columnar structure and the beam structure;

the second reinforcing structure is positioned on one side of the second electrode layer, which is close to or far away from the CMOS measuring circuit system.

Optionally, the first dielectric layer and/or the second dielectric layer between the oppositely arranged beam structures form a patterned film structure, the patterned film structure includes a plurality of stripe patterns, and the patterns in the patterned film structure are symmetrically arranged with respect to the beam structures.

Optionally, at least one hole-shaped structure is formed on the absorption plate, and the hole-shaped structure at least penetrates through the medium layer in the absorption plate; and/or at least one hole-shaped structure is formed on the beam structure, and the hole-shaped structure at least penetrates through the medium layer in the beam structure.

Optionally, the hermetic release barrier is located at an interface between the CMOS measurement circuitry and the CMOS infrared sensing structure and/or in the CMOS infrared sensing structure;

the closed release isolation layer is located on the reflection layer and is arranged in contact with the reflection layer, the closed release isolation layer comprises at least one dielectric layer, and materials forming the closed release isolation layer comprise at least one of silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, silicon germanium, amorphous carbon or aluminum oxide.

Optionally, the infrared detector is based on 3nm, 7nm, 10nm, 14nm, 22nm, 28nm, 32nm, 45nm, 65nm, 90nm, 130nm, 150nm, 180nm, 250nm, or 350nm CMOS process;

the metal connecting wire material forming the metal interconnection layer comprises at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium or cobalt.

Compared with the prior art, the technical scheme provided by the embodiment of the disclosure has the following advantages:

the CMOS process is utilized to realize the integrated preparation of the CMOS measuring circuit system and the CMOS infrared sensing structure on the CMOS production line, compared with the MEMS process, the CMOS process has no process compatibility problem, the technical difficulty of the MEMS process is solved, the transportation cost can be reduced by adopting the CMOS process production line process to prepare the infrared microbridge detector, and the risk caused by the problems of transportation and the like is reduced; the infrared microbridge detector takes silicon oxide as a sacrificial layer, the silicon oxide is completely compatible with a CMOS (complementary metal oxide semiconductor) process, the preparation process is simple and easy to control, the CMOS process does not have the problem that polyimide of the sacrificial layer is not released cleanly to influence the vacuum degree of a detector chip, the subsequent film growth temperature is not limited by the material of the sacrificial layer, the multilayer process design of the sacrificial layer can be realized, the process is not limited, the planarization can be easily realized by using the sacrificial layer, and the process difficulty and the possible risks are reduced; the infrared microbridge detector prepared by the integrated CMOS process can realize the aims of high yield, low cost, high yield and large-scale integrated production of chips, and provides a wider application market for the infrared microbridge detector; the infrared microbridge detector based on the CMOS process can realize smaller size and thinner film thickness of a characteristic structure, and the infrared microbridge detector has larger duty ratio, lower thermal conductivity and smaller thermal capacity, so that the infrared microbridge detector has higher detection sensitivity, longer detection distance and better detection performance; the infrared microbridge detector based on the CMOS process can enable the pixel size of the detector to be smaller, realize smaller chip area under the same array pixel and be more beneficial to realizing chip miniaturization; the infrared microbridge detector based on the CMOS process has the advantages of mature process production line, higher process control precision, better meeting of design requirements, better product consistency, more contribution to circuit piece adjustment performance and more contribution to industrialized batch production. In addition, absorption board and beam structure are located different layers, are favorable to increasing the area of absorption board, promote infrared detection sensitivity of infrared microbridge detector, and first columnar structure and second columnar structure are hollow columnar structure, the absorption board with beam structure all includes electrode layer and two-layer dielectric layer at least, and first columnar structure and second columnar structure all include the electrode layer at least, are favorable to reducing the thermal conductance of first columnar structure and second columnar structure, simplify infrared microbridge detector's preparation technology.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.

In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present disclosure, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.

Fig. 1 is a schematic perspective structure diagram of an infrared microbridge detector pixel provided in an embodiment of the present disclosure;

fig. 2 is a schematic cross-sectional structure diagram of an infrared microbridge detector pixel provided in an embodiment of the present disclosure;

fig. 3 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure;

fig. 4 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure;

FIG. 5 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure;

FIG. 6 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure;

FIG. 7 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure;

FIG. 8 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure;

FIG. 9 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure;

fig. 10 is a schematic structural diagram of a CMOS measurement circuitry according to an embodiment of the disclosure;

FIG. 11 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure;

FIG. 12 is a schematic perspective view of another infrared microbridge detector pixel provided in the embodiments of the present disclosure;

FIG. 13 is a schematic perspective view of another infrared microbridge detector pixel provided in the embodiments of the present disclosure;

FIG. 14 is a schematic perspective view of another infrared microbridge detector pixel provided in the embodiments of the present disclosure;

FIG. 15 is a schematic perspective view of another infrared microbridge detector pixel provided in the embodiments of the present disclosure;

fig. 16 is a schematic top view of a polarization structure provided in an embodiment of the present disclosure;

fig. 17 is a schematic top view of another polarization structure provided in an embodiment of the disclosure;

FIG. 18 is a schematic diagram illustrating a top view of another polarization structure provided in an embodiment of the present disclosure;

FIG. 19 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided by an embodiment of the present disclosure;

FIG. 20 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure;

FIG. 21 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure;

FIG. 22 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure;

fig. 23 is a schematic top view of a first dielectric layer according to an embodiment of the disclosure.

Detailed Description

In order that the above objects, features and advantages of the present disclosure may be more clearly understood, aspects of the present disclosure will be further described below. It should be noted that, in the case of no conflict, the embodiments and features in the embodiments of the present disclosure may be combined with each other.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure, but the present disclosure may be practiced in other ways than those described herein; it is to be understood that the embodiments disclosed in the specification are only a few embodiments of the present disclosure, and not all embodiments.

Fig. 1 is a schematic perspective structure diagram of an infrared microbridge detector pixel provided in an embodiment of the present disclosure, and fig. 2 is a schematic cross-sectional structure diagram of an infrared microbridge detector pixel provided in an embodiment of the present disclosure. With reference to fig. 1 and fig. 2, the infrared microbridge detector includes a plurality of infrared microbridge detector pixels arranged in an array, the infrared microbridge detector based on the CMOS process includes a CMOS measurement circuit system 1 and a CMOS infrared sensing structure 2, both the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are manufactured by using the CMOS process, and the CMOS infrared sensing structure 2 is directly manufactured on the CMOS measurement circuit system 1.

Specifically, the CMOS infrared sensing structure 2 is used for converting an external infrared signal into an electric signal and transmitting the electric signal to the CMOS measuring circuit system 1, and the CMOS measuring circuit system 1 reflects temperature information of a corresponding infrared signal according to the received electric signal, so that the temperature detection function of the infrared microbridge detector is realized. The CMOS measuring circuit system 1 and the CMOS infrared sensing structure 2 are both prepared by using a CMOS process, and the CMOS infrared sensing structure 2 is directly prepared on the CMOS measuring circuit system 1, namely, the CMOS measuring circuit system 1 is prepared by using the CMOS process, and then the CMOS infrared sensing structure 2 is continuously prepared by using the CMOS process by using the CMOS production line and parameters of various processes compatible with the production line.

Therefore, the CMOS process is utilized in the embodiment of the disclosure to realize the integrated preparation of the CMOS measuring circuit system 1 and the CMOS infrared sensing structure 2 on the CMOS production line, compared with the MEMS process, the CMOS has no process compatibility problem, the technical difficulty faced by the MEMS process is solved, and the adoption of the CMOS production line process to prepare the infrared microbridge detector can also reduce the transportation cost and reduce the risk caused by the transportation and other problems; the infrared microbridge detector takes silicon oxide as a sacrificial layer, the silicon oxide is completely compatible with a CMOS (complementary metal oxide semiconductor) process, the preparation process is simple and easy to control, the CMOS process does not have the problem that polyimide of the sacrificial layer is not released cleanly to influence the vacuum degree of a detector chip, the subsequent film growth temperature is not limited by the material of the sacrificial layer, the multilayer process design of the sacrificial layer can be realized, the process is not limited, the planarization can be easily realized by using the sacrificial layer, and the process difficulty and the possible risks are reduced; the infrared microbridge detector prepared by the integrated CMOS process can realize the aims of high yield, low cost, high yield and large-scale integrated production of chips, and provides a wider application market for the infrared microbridge detector; the infrared microbridge detector based on the CMOS process can realize smaller size and thinner film thickness of a characteristic structure, and the infrared microbridge detector has larger duty ratio, lower thermal conductivity and smaller thermal capacity, so that the infrared microbridge detector has higher detection sensitivity, longer detection distance and better detection performance; the infrared microbridge detector based on the CMOS process can enable the pixel size of the detector to be smaller, realize smaller chip area under the same array pixel and be more beneficial to realizing chip miniaturization; the infrared microbridge detector based on the CMOS process has the advantages of mature process production line, higher process control precision, better meeting of design requirements, better product consistency, better contribution to circuit piece adjustment performance and industrial batch production.

Referring to fig. 1 and 2, the cmos infrared sensing structure 2 includes a resonant cavity formed by the reflective layer 4 and the heat sensitive medium layer, a suspended microbridge structure 40 for controlling heat transfer, and a first pillar structure 61 and a second pillar structure 62 having electrical connection and support functions. Specifically, the CMOS infrared sensing structure 2 includes a reflective layer 4 located on the CMOS measurement circuit system 1 and a suspended microbridge structure 40 for controlling heat transfer, the suspended microbridge structure 40 includes an absorption plate 10, the absorption plate 10 includes a heat sensitive medium layer, and a resonant cavity is formed between the reflective layer 4 and the heat sensitive medium layer. The suspended microbridge structure 40 includes an absorption plate 10 and a plurality of beam structures 11, the beam structures 11 are located on one side of the absorption plate 10 close to or far from the CMOS measurement circuitry 1, fig. 1 exemplarily shows that the suspended microbridge structure 40 includes two beam structures 11, and the beam structures 11 are located on one side of the absorption plate 10 close to the CMOS measurement circuitry 1.

The first columnar structure 61 is located between the reflective layer 4 and the beam structure 11, the beam structure 11 is electrically connected to the CMOS measurement circuitry 1 through the first columnar structure 61, that is, the first columnar structure 61 directly electrically connects the supporting base 42 in the reflective layer 4 and the corresponding beam structure 11, the beam structure 11 is electrically connected to the CMOS measurement circuitry 1 through the first columnar structure 61 and the supporting base 42, and the first columnar structure 61 is used for supporting the corresponding beam structure 11 after the sacrificial layer between the reflective layer 4 and the corresponding beam structure 11 is released. The second columnar structure 62 is located between the absorption plate 10 and the beam structure 11, the second columnar structure 62 is directly electrically connected with the absorption plate 10 and the beam structure 11, the absorption plate 10 is used for converting infrared signals into electric signals and is electrically connected with the first columnar structure 61 through the second columnar structure 62 and the beam structure 11, namely, the electric signals converted by the absorption plate 10 through the infrared signals are sequentially transmitted to the CMOS measurement circuit system 1 through the second columnar structure 62, the beam structure 11, the first columnar structure 61 and the supporting base 42, the CMOS measurement circuit system 1 processes the received electric signals to reflect temperature information, non-contact infrared temperature detection of the infrared microbridge detector is achieved, and the second columnar structure 62 is used for supporting the corresponding absorption plate 10 after a sacrificial layer between the corresponding absorption plate 10 and the corresponding released beam structure 11 falls.

The CMOS infrared sensing structure 2 outputs a positive electrical signal and a ground electrical signal through different electrode structures, and the positive electrical signal and the ground electrical signal are transmitted to the corresponding supporting base 42 through different sets of columnar structures, one set of columnar structures includes a first columnar structure 61 and a second columnar structure 62. Illustratively, the CMOS infrared sensing structure 2 may be arranged in a direction parallel to the CMOS measurement circuitry 1, and comprises two sets of pillar structures, one of which may be arranged for transmitting a positive electrical signal and the other for transmitting a ground electrical signal. Or as shown in fig. 1, the direction parallel to the CMOS measurement circuit system 1 is set, the CMOS infrared sensing structure 2 includes four groups of columnar structures, each two of the four groups of columnar structures can be a group that transmits a positive electric signal and a ground electric signal, respectively, because the infrared microbridge detector includes a plurality of infrared microbridge detector pixels arranged in an array, the four groups of columnar structures can also select two groups of columnar structures to transmit a positive electric signal and a ground electric signal, respectively, and the other two groups of columnar structures provide the adjacent infrared microbridge detector pixels with electric signal transmission. In addition, the reflection layer 4 includes a reflection plate 41 and a supporting base 42, a portion of the reflection layer 4 is used as a dielectric medium for electrically connecting the first columnar structure 61 with the CMOS measurement circuit system 1, that is, the supporting base 42, the reflection plate 41 is used for reflecting infrared rays to the heat sensitive medium layer in the absorption plate 10, and the secondary absorption of infrared rays is realized by matching with a resonant cavity formed between the reflection layer 4 and the heat sensitive medium layer in the absorption plate 10, so as to improve the infrared absorption rate of the infrared microbridge detector and optimize the infrared detection performance of the infrared microbridge detector.

Fig. 3 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure. In contrast to the structures shown in fig. 1 and 2, the infrared microbridge detector arrangement beam structure 11 of the structure shown in fig. 3 is located on the side of the absorber plate 10 facing away from the CMOS measurement circuitry 1. Specifically, the electrode layer in the absorption plate 10 is electrically connected to the electrode layer in the beam structure 11 through the second columnar structure 62, the electrode layer in the beam structure 11 is electrically connected to the support base 42 through the first columnar structure 61, and the electrical signal converted by the absorption plate 10 via the infrared signal is transmitted to the CMOS measurement circuit system 1 through the second columnar structure 62, the beam structure 11, the first columnar structure 61, and the support base 42 in sequence.

With reference to fig. 1 to fig. 3, the first columnar structure 61 and the second columnar structure 62 are both hollow columnar structures, that is, a hollow structure is formed at the position of the first columnar structure 61, a hollow structure is formed at the position of the second columnar structure 62, the absorption plate 10 and the beam structure 11 both include an electrode layer and at least two dielectric layers, that is, the absorption plate 10 includes an electrode layer and at least two dielectric layers, the beam structure 11 includes an electrode layer and at least two dielectric layers, the first columnar structure 61 and the second columnar structure 62 both include at least an electrode layer, that is, the first columnar structure 61 includes at least an electrode layer, and the second columnar structure 62 includes at least an electrode layer. Specifically, the hollow columnar structure is favorable for reducing the thermal conductance of first columnar structure 61 and second columnar structure 62, and then reduces the influence of the thermal conductance that first columnar structure 61 and second columnar structure 62 produced to the signal of telecommunication that unsettled microbridge structure 40 generated, is favorable to promoting infrared microbridge detector pixel and the infrared detection performance of the infrared microbridge detector including this infrared microbridge detector pixel. In addition, set up first columnar structure 61 and second columnar structure 62 and be located different layers for infrared micro-bridge detector pixel forms bilayer structure, and the area of absorbing plate 10 can not be influenced in the setting of beam structure 11, is favorable to increasing the area of absorbing plate 10, improves infrared micro-bridge detector pixel and includes the infrared detection sensitivity of the infrared micro-bridge detector of infrared micro-bridge detector pixel.

Exemplarily, in conjunction with fig. 2 and 3, it may be provided that in a direction away from the CMOS measurement circuitry 1, the beam structure 11 comprises in sequence a first dielectric layer 13, an electrode layer 14 and a second dielectric layer 15, the first columnar structure 61 comprises at least the first electrode layer 14, fig. 2 and 3 exemplarily provide in a direction away from the CMOS measurement circuitry 1, the first columnar structure 61 likewise comprises in sequence the first dielectric layer 13, the electrode layer 14 and the second dielectric layer 15, in a direction away from the CMOS measurement circuitry 1, the absorber plate 10 comprises in sequence a third dielectric layer 130, a second electrode layer 140 and a fourth dielectric layer 150, the second columnar structure 62 comprises at least the electrode layer, fig. 2 exemplarily provides in a direction away from the CMOS measurement circuitry 1, the second columnar structure 62 likewise comprises in sequence the third dielectric layer 130, the second electrode layer 140 and the fourth dielectric layer 150, i.e. the second columnar structure 62 comprises at least the second electrode layer 140, fig. 3 exemplarily provides in a direction away from the CMOS measurement circuitry 1, the second columnar structure 62 comprises in sequence the first dielectric layer 13, the first electrode layer 14 and the second dielectric layer 62, i.e. the second columnar structure 14 comprises at least the first dielectric layer 14. As shown in fig. 2, it may be configured that the first dielectric layer 13 in the beam structure 11 and the first dielectric layer 13 in the first columnar structure 61 are simultaneously fabricated, the second dielectric layer 15 in the beam structure 11 and the second dielectric layer 15 in the first columnar structure 61 are simultaneously fabricated, the first electrode layer 14 in the beam structure 11 and the first electrode layer 14 in the first columnar structure 61 are simultaneously fabricated, the third dielectric layer 130 in the absorption plate 10 and the third dielectric layer 130 in the second columnar structure 62 are simultaneously fabricated, the fourth dielectric layer 150 in the absorption plate 10 and the fourth dielectric layer 150 in the second columnar structure 62 are simultaneously fabricated, and the second electrode layer 140 in the absorption plate 10 and the second electrode layer 140 in the second columnar structure 62 are simultaneously fabricated, so as to simplify a fabrication process of the infrared micro-bridge detector. As shown in fig. 3, it may be arranged that the first dielectric layer 13 in the beam structure 11, the first dielectric layer 13 in the first columnar structure 61, and the first dielectric layer 13 in the second columnar structure 62 are simultaneously fabricated, the second dielectric layer 15 in the beam structure 11, the second dielectric layer 15 in the first columnar structure 61, and the second dielectric layer 15 in the second columnar structure 62 are simultaneously fabricated, and the first electrode layer 14 in the beam structure 11, the first electrode layer 14 in the first columnar structure 61, and the first electrode layer 14 in the second columnar structure 62 are simultaneously fabricated. In addition, as shown in fig. 2, the second electrode layer 140 in the absorber plate 10, the second electrode layer 140 in the second pillar structure 61, the first electrode layer 14 in the beam structure 11, the first electrode layer 14 in the first pillar structure 61, and the support pedestal 42 are electrically connected to ensure that the electrical signal generated by the suspended microbridge structure 40 is transmitted to the CMOS measurement circuitry 1. As shown in fig. 3, the second electrode layer 140 in the absorber plate 10, the first electrode layer 14 in the second columnar structure 61, the first electrode layer 14 in the beam structure 11, the first electrode layer 14 in the first columnar structure 61, and the support pedestal 42 are electrically connected to ensure that the electrical signal generated by the suspended micro-bridge structure 40 is transmitted to the CMOS measurement circuitry 1.

The material forming the first dielectric layer 13 includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon, or aluminum oxide, the material forming the second dielectric layer 15 includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon, or aluminum oxide, the material forming the third dielectric layer 130 includes at least one of materials having a temperature coefficient of resistance greater than a set value, which are prepared from amorphous silicon, amorphous germanium, amorphous silicon germanium, or amorphous carbon, the material forming the fourth dielectric layer 150 includes at least one of materials having a temperature coefficient of resistance greater than a set value, which are prepared from amorphous silicon, amorphous germanium, amorphous silicon germanium, or amorphous carbon, and the set value may be, for example, 0.015/K. Therefore, the first dielectric layer 13 serves as a supporting layer in the beam structure 11, the second dielectric layer 15 serves as a passivation layer in the beam structure 11, the third dielectric layer 130 serves as a heat sensitive dielectric layer while serving as a supporting layer in the absorption plate 10, and the fourth dielectric layer 150 also serves as a heat sensitive dielectric layer while serving as a passivation layer in the absorption plate 10, so that the thickness of the absorption plate 10 is reduced, and the preparation process of the infrared micro-bridge detector is simplified. Specifically, the supporting layer is used for supporting a film layer located above the supporting layer after a sacrificial layer below the supporting layer is released, the heat-sensitive dielectric layer is used for converting infrared temperature detection signals into infrared detection electric signals, the second electrode layer 140 and the first electrode layer 14 are used for transmitting the infrared detection electric signals converted from the heat-sensitive dielectric layer in the absorption plate 10 to the CMOS measurement circuit system 1 through the beam structures 11 on the left side and the right side, the two beam structures 11 respectively transmit positive and negative signals of the infrared detection electric signals, a reading circuit in the CMOS measurement circuit system 1 realizes non-contact infrared temperature detection through analysis of the acquired infrared detection electric signals, and the passivation layer is used for protecting an electrode layer wrapped by the passivation layer from oxidation or corrosion. In addition, corresponding to the beam structure 11, the first electrode layer 14 is located in a closed space formed by the first dielectric layer 13, namely the support layer, and the second dielectric layer 15, namely the passivation layer, so that the first electrode layer 14 in the beam structure 11 is protected; corresponding to the absorber plate 10, the second electrode layer 140 is located in a closed space formed by the third dielectric layer 130, i.e., the support layer, and the fourth dielectric layer 150, i.e., the passivation layer, so that the second electrode layer 140 in the absorber plate 10 is protected.

Fig. 4 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure. Different from the infrared micro-bridge detector pixel with the structure shown in fig. 2 and 3, the infrared micro-bridge detector pixel with the structure shown in fig. 4 is arranged along the direction away from the CMOS measurement circuit system 1, the beam structure 11 sequentially includes a first dielectric layer 13, a first electrode layer 14 and a second dielectric layer 15, the first columnar structure 61 at least includes the first electrode layer 14, fig. 4 is exemplarily arranged along the direction away from the CMOS measurement circuit system 1, and the first columnar structure 61 also sequentially includes the first dielectric layer 13, the electrode layer 14 and the second dielectric layer 15. Along a direction away from the CMOS measurement circuit system 1, the absorber plate 10 includes a third dielectric layer 130, a second electrode layer 140, a second heat-sensitive dielectric layer 120, and a fourth dielectric layer 150 in sequence, or the absorber plate 10 includes a third dielectric layer 130, a second heat-sensitive dielectric layer 120, a second electrode layer 140, and a fourth dielectric layer 150 in sequence, that is, the heat-sensitive dielectric layer 120 of the absorber plate 10 may be disposed on a side of the second electrode layer 140 away from the CMOS measurement circuit system 1, or the heat-sensitive dielectric layer 120 of the absorber plate 10 may be disposed on a side of the second electrode layer 140 close to the CMOS measurement circuit system 1, fig. 4 exemplarily sets along a direction away from the CMOS measurement circuit system 1, the absorber plate 10 includes a third dielectric layer 130, a second electrode layer 140, a second heat-sensitive dielectric layer 120, and a fourth dielectric layer 150 in sequence, the second columnar structure 62 includes at least a second electrode layer 140, fig. 4 exemplarily sets along a direction away from the CMOS measurement circuit system 1, and the second columnar structure 62 includes a third dielectric layer 130, a second electrode layer 140, and a fourth dielectric layer 150 in sequence. The first dielectric layer 13 in the beam structure 11 and the first dielectric layer 13 in the first columnar structure 61 may be simultaneously fabricated, the second dielectric layer 15 in the beam structure 11 and the second dielectric layer 15 in the first columnar structure 61 may be simultaneously fabricated, the first electrode layer 14 in the beam structure 11 and the first electrode layer 14 in the first columnar structure 61 may be simultaneously fabricated, the third dielectric layer 130 in the absorption plate 10 and the third dielectric layer 130 in the second columnar structure 62 may be simultaneously fabricated, the fourth dielectric layer 150 in the absorption plate 10 and the fourth dielectric layer 150 in the second columnar structure 62 may be simultaneously fabricated, and the second electrode layer 140 in the absorption plate 10 and the second electrode layer 140 in the second columnar structure 62 may be simultaneously fabricated, so as to simplify the fabrication process of the infrared micro-bridge detector. In addition, the second electrode layer 140 in the absorber plate 10, the second electrode layer 140 in the second columnar structure 61, the first electrode layer 14 in the beam structure 11, the first electrode layer 14 in the first columnar structure 61, and the support pedestal 42 are electrically connected to ensure that the electrical signal generated by the suspended micro-bridge structure 40 is transmitted to the CMOS measurement circuitry 1.

The material constituting the first dielectric layer 13 includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon or aluminum oxide, the material constituting the second dielectric layer 15 includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon or aluminum oxide, the material constituting the third dielectric layer 130 includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon or aluminum oxide, the material constituting the fourth dielectric layer 150 includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon or aluminum oxide, the material constituting the thermally sensitive dielectric layer 120 includes at least one of materials having a temperature coefficient of resistance greater than a set value, which may be, for example, 0.015/K, and prepared from titanium oxide, vanadium oxide, amorphous silicon, amorphous germanium, amorphous silicon germanium oxygen, silicon germanium, germanium oxygen silicon, graphene, barium strontium titanate, copper or platinum. Thus, the first dielectric layer 13 acts as a support layer in the beam structure 11, the second dielectric layer 15 acts as a passivation layer in the beam structure 11, the third dielectric layer 130 acts as a support layer in the absorber plate 10, and the fourth dielectric layer 150 acts as a passivation layer in the absorber plate 10. Specifically, the supporting layer is used for supporting a film layer located above the supporting layer after a sacrificial layer below the supporting layer is released, the heat sensitive medium layer 120 is used for converting infrared temperature detection signals into infrared detection electric signals, the second electrode layer 140 and the first electrode layer 14 are used for transmitting the infrared detection electric signals converted from the heat sensitive medium layer 12 in the absorption plate 10 to the CMOS measurement circuit system 1 through the beam structures 11 on the left side and the right side, the two beam structures 11 respectively transmit positive and negative signals of the infrared detection electric signals, a reading circuit in the CMOS measurement circuit system 1 realizes non-contact infrared temperature detection through analysis of the acquired infrared detection electric signals, and the passivation layer is used for protecting an electrode layer wrapped by the passivation layer from oxidation or corrosion. In addition, corresponding to the beam structure 11, the first electrode layer 14 is located in a closed space formed by the first dielectric layer 13, namely the support layer, and the second dielectric layer 15, namely the passivation layer, so that the first electrode layer 14 in the beam structure 11 is protected; corresponding to the absorber plate 10, the second electrode layer 140 is located in a closed space formed by the third dielectric layer 130, i.e., the support layer, and the fourth dielectric layer 150, i.e., the passivation layer, so that the second electrode layer 140 in the absorber plate 10 is protected.

Illustratively, the material constituting the first electrode layer 14 may be set to include at least one of titanium, titanium nitride, tantalum nitride, titanium tungsten alloy, nickel chromium alloy, nickel platinum alloy, nickel silicon alloy, nickel, chromium, platinum, tungsten, aluminum, or copper, wherein when the material of the first electrode layer 14 is at least one of titanium, titanium nitride, tantalum, or tantalum nitride, it is preferable to set the first electrode layer 14 to be covered by the first dielectric layer 13 and the second dielectric layer 15, preventing the first electrode layer 14 from being affected by the etching process. The material constituting the second electrode layer 140 includes at least one of titanium, titanium nitride, tantalum nitride, titanium tungsten alloy, nickel-chromium alloy, nickel-platinum alloy, nickel-silicon alloy, nickel, chromium, platinum, tungsten, aluminum, or copper, wherein when at least one of titanium, titanium nitride, tantalum, or tantalum nitride is used as the material of the second electrode layer 140, it is preferable that the second electrode layer 140 is covered by the third dielectric layer 130 and the fourth dielectric layer 150 to prevent the second electrode layer 140 from being affected by the etching process.

Fig. 5 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure. Fig. 5 only exemplarily shows the first pillar structure 61 and a part of the beam structure 11, the structure above the beam structure 11 is not shown, taking the first pillar structure 61 as an example, for the first pillar structure 61 at least including the first electrode layer 14, different from the infrared microbridge detector pixel of the structures shown in fig. 2 to 4, the infrared microbridge detector pixel of the structure shown in fig. 5 is exemplarily arranged along a direction away from the CMOS measurement circuit system 1, the first pillar structure 61 sequentially includes the first electrode layer 14 and the second dielectric layer 15, the second dielectric layer 15 in the beam structure 11 and the second dielectric layer 15 in the first pillar structure 61 can be arranged to be simultaneously manufactured, the first electrode layer 14 in the beam structure 11 and the first electrode layer 14 in the first pillar structure 61 are simultaneously manufactured, so as to simplify the manufacturing process of the infrared microbridge detector pixel, and further simplify the manufacturing process of the infrared microbridge detector.

Fig. 6 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure. Fig. 6 only exemplarily shows the first columnar structure 61 and a part of the beam structure 11, a structure above the beam structure 11 is not shown, taking the first columnar structure 61 as an example, the first columnar structure 61 at least includes the first electrode layer 14, and unlike the infrared micro-bridge detector pixel with the structure shown in fig. 2 to 5, the infrared micro-bridge detector pixel with the structure shown in fig. 6 is exemplarily disposed along a direction away from the CMOS measurement circuit system 1, the first columnar structure 61 sequentially includes the first dielectric layer 13 and the electrode layer 14, it may be set that the first dielectric layer 13 in the beam structure 11 and the first dielectric layer 13 in the first columnar structure 61 are simultaneously fabricated, and the first electrode layer 14 in the beam structure 11 and the first electrode layer 14 in the first columnar structure 61 are simultaneously fabricated, so as to simplify a fabrication process of the infrared micro-bridge detector, and further simplify a fabrication process of the infrared micro-bridge detector.

Fig. 7 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure. Fig. 7 only exemplarily shows the first columnar structure 61 and a part of the beam structure 11, a structure above the beam structure 11 is not shown, taking the first columnar structure 61 as an example, the first columnar structure 61 at least includes the first electrode layer 14, and different from the infrared micro-bridge detector pixel of the structures shown in fig. 2 to 6, the infrared micro-bridge detector pixel of the structure shown in fig. 7 exemplarily sets that the first columnar structure 61 only includes the first electrode layer 14, and the first electrode layer 14 in the beam structure 11 and the first electrode layer 14 in the first columnar structure 61 can be set to be simultaneously manufactured, so as to simplify a manufacturing process of the infrared micro-bridge detector pixel, and further simplify a manufacturing process of the infrared micro-bridge detector.

In addition, similar design of the film layer of the second columnar structure 62 may also be performed on the second columnar structure 62 with reference to the first columnar structure 61 in the structures shown in fig. 5 to fig. 7, that is, the second columnar structure 62 may only include the second electrode layer 140, or along the direction away from the CMOS measurement circuit system 1, the second columnar structure 62 sequentially includes the third dielectric layer 130 and the second electrode layer 140, or along the direction away from the CMOS measurement circuit system 1, the second columnar structure 62 sequentially includes the second electrode layer 140 and the fourth dielectric layer 150, which is not described and illustrated herein again, and the first columnar structure 61 and the second columnar structure 62 in different film layer conditions may be arbitrarily combined to ensure that the first columnar structure 61 at least includes the first electrode layer 14, and the second columnar structure 62 at least includes the second electrode layer 140.

With reference to fig. 1 to 7, at least one hole structure may be formed on the absorption plate 10, wherein the hole structure penetrates through at least the medium layer in the absorption plate 10; and/or, at least one hole-shaped structure is formed on the beam structure 11, and the hole-shaped structure at least penetrates through the medium layer in the beam structure 11, that is, only the absorption plate 10, only the beam structure 11, or both the absorption plate 10 and the beam structure 11 may be provided with the hole-shaped structure. For example, whether the hole structures on the absorption plate 10 or the beam structure 11 are hole structures, the hole structures may be circular hole structures, square hole structures, polygonal hole structures, or irregular pattern hole structures, the shape of the hole structures on the absorption plate 10 and the beam structure 11 is not specifically limited by the embodiments of the present disclosure, and the number of the hole structures on the absorption plate 10 and the beam structure 11 is not specifically limited by the embodiments of the present disclosure.

Therefore, at least one hole-shaped structure is formed on the absorption plate 10, the hole-shaped structure at least penetrates through the medium layer in the absorption plate 10, a sacrificial layer which is contacted with the absorption plate 10 and needs to be released finally is arranged in the infrared micro-bridge detector, the sacrificial layer needs to be corroded by chemical reagents at the end of the infrared micro-bridge detector manufacturing process when the sacrificial layer is released, the hole-shaped structure on the absorption plate 10 is beneficial to increasing the contact area of the chemical reagents for releasing and the sacrificial layer, and the release rate of the sacrificial layer is accelerated. In addition, the area of the absorption plate 10 is larger than that of the beam structure 11, the hole-shaped structure on the absorption plate 10 is beneficial to releasing the internal stress of the absorption plate 10, optimizing the planarization degree of the absorption plate 10, and being beneficial to improving the structural stability of the absorption plate 10, so that the structural stability of the whole infrared micro-bridge detector is improved. In addition, at least one porous structure is formed on the beam structure 11, and the porous structure at least penetrates through the dielectric layer in the beam structure 11, so that the thermal conductivity of the beam structure 11 is further reduced, and the infrared detection sensitivity of the infrared microbridge detector is improved.

Taking the infrared microbridge detector with the structure shown in fig. 2 and fig. 3 as an example, at this time, the hole structure on the absorption plate 10 may penetrate through the third dielectric layer 130 and the fourth dielectric layer 150 in the absorption plate 10, the hole structure on the absorption plate 10 may also penetrate through the third dielectric layer 130, the second electrode layer 140 and the fourth dielectric layer 150 in the absorption plate 10, and the hole structure on the beam structure 11 may penetrate through the first dielectric layer 13 and the second dielectric layer 15 in the beam structure 11 where the first electrode layer 14 is not disposed, or the hole structure on the beam structure 11 penetrates through the first dielectric layer 13, the electrode layer 14 and the second dielectric layer 15 in the beam structure 11. Taking the infrared microbridge detector with the structure shown in fig. 4 as an example, at this time, the hole structure on the absorption plate 10 may penetrate through the third dielectric layer 130 and the fourth dielectric layer 150 in the absorption plate 10, the hole structure on the absorption plate 10 may also penetrate through the third dielectric layer 130, the second electrode layer 140, the second heat-sensitive dielectric layer 120 and the fourth dielectric layer 150 in the absorption plate 10, the hole structure on the beam structure 11 may penetrate through the first dielectric layer 13 and the second dielectric layer 15 in the beam structure 11 where the first electrode layer 14 is not disposed, or the hole structure on the beam structure 11 penetrates through the first dielectric layer 13, the electrode layer 14 and the second dielectric layer 15 in the beam structure 11.

With reference to fig. 2 to 7, at least one hermetic release isolation layer 3 may be included above the CMOS measurement circuitry 1, and the hermetic release isolation layer 3 is used to protect the CMOS measurement circuitry 1 from process influence during the release etching process for fabricating the CMOS infrared sensing structure 2. Optionally, the close release isolation layer 3 is located at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 and/or in the CMOS infrared sensing structure 2, that is, the close release isolation layer 3 may be located at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2, or the close release isolation layer 3 is located in the CMOS infrared sensing structure 2, or the close release isolation layer 3 is located at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 and is provided with the close release isolation layer 3, and the close release isolation layer 3 is used for protecting the CMOS measurement circuit system 1 from erosion when a sacrificial layer is released by a corrosion process, and the close release isolation layer 3 at least includes a dielectric layer, and a dielectric material constituting the close release isolation layer 3 includes at least one of silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, silicon, amorphous carbon, or aluminum oxide.

Fig. 2 to 7 exemplarily set the hermetic release isolation layer 3 in the CMOS infrared sensing structure 2, the hermetic release isolation layer 3 may be, for example, one or more dielectric layers located above the metal interconnection layer of the reflective layer 4, where the hermetic release isolation layer 3 is exemplarily shown as one dielectric layer, and the material constituting the hermetic release isolation layer 3 may include at least one of silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, silicon germanium, amorphous carbon, or aluminum oxide, and the thickness of the hermetic release isolation layer 3 is smaller than that of the sacrificial layer. The resonant cavity of the infrared microbridge detector is realized by releasing the vacuum cavity after the silicon oxide sacrifice layer, the reflecting layer 4 is used as the reflecting layer of the resonant cavity, the sacrifice layer is positioned between the reflecting layer 4 and the suspended microbridge structure 40, and when at least one layer of closed release isolating layer 3 positioned on the reflecting layer 4 is arranged to select silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium silicon, germanium, silicon germanium alloy, amorphous carbon or aluminum oxide and other materials as one part of the resonant cavity, the reflecting effect of the reflecting layer 4 is not influenced, the height of the resonant cavity can be reduced, the thickness of the sacrifice layer is further reduced, and the release difficulty of the sacrifice layer formed by silicon oxide is reduced. In addition, the sealing release isolation layer 3 and the first columnar structure 61 are arranged to form a sealing structure, so that the CMOS measurement circuit system 1 is completely separated from the sacrificial layer, and the CMOS measurement circuit system 1 is protected.

Fig. 8 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure. On the basis of the above embodiment, fig. 8 also provides that the hermetic release isolation layer 3 is located in the CMOS infrared sensing structure 2, the hermetic release isolation layer 3 may be, for example, one or more dielectric layers located above the metal interconnection layer of the reflective layer 4, here, the hermetic release isolation layer 3 is exemplarily shown to be one dielectric layer, and the hermetic release isolation layer 3 covers the first pillar structure 61, at this time, the material constituting the hermetic release isolation layer 3 may include at least one of silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, silicon germanium, amorphous carbon, or aluminum oxide, and the thickness of the hermetic release isolation layer 3 is also smaller than that of the sacrificial layer. Through setting up the first columnar structure 61 of airtight release insulating layer 3 cladding, can utilize airtight release insulating layer 3 as the support of first columnar structure 61 department on the one hand, improve first columnar structure 61's stability, guarantee first columnar structure 61 and unsettled microbridge structure 40 and support base 42's electricity and be connected. On the other hand, the airtight release insulating layer 3 covering the first columnar structure 61 can reduce the contact between the first columnar structure 61 and the external environment, reduce the contact resistance between the first columnar structure 61 and the external environment, further reduce the noise of the infrared microbridge detector pixel, improve the detection sensitivity of the infrared detection sensor, and prevent the electrical breakdown of the exposed metal of the first columnar structure 61. Similarly, the resonant cavity of the infrared microbridge detector is realized by releasing the vacuum cavity after the silicon oxide sacrificial layer is released, the reflecting layer 4 is used as the reflecting layer of the resonant cavity, the sacrificial layer is positioned between the reflecting layer 4 and the suspended microbridge structure 40, and when at least one layer of airtight release isolation layer 3 positioned on the reflecting layer 4 is arranged to select silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, silicon germanium, amorphous carbon or aluminum oxide and other materials as a part of the resonant cavity, the reflecting effect of the reflecting layer 4 is not affected, the height of the resonant cavity can be reduced, the thickness of the sacrificial layer is further reduced, and the release difficulty of the sacrificial layer formed by silicon oxide is reduced. In addition, the sealing release isolation layer 3 and the first columnar structure 61 are arranged to form a sealing structure, so that the CMOS measurement circuit system 1 is completely separated from the sacrificial layer, and the CMOS measurement circuit system 1 is protected.

Fig. 9 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure. Unlike the infrared microbridge detector with the structure shown in the above embodiment, in the infrared microbridge detector with the structure shown in fig. 9, the hermetic release isolation layer 3 is located at the interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2, for example, the hermetic release isolation layer 3 is located between the reflective layer 4 and the CMOS measurement circuit system 1, that is, the hermetic release isolation layer 3 is located below the metal interconnection layer of the reflective layer 4, and the supporting base 42 is electrically connected with the CMOS measurement circuit system 1 through a through hole penetrating through the hermetic release isolation layer 3. Specifically, because the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are both formed by using a CMOS process, after the CMOS measurement circuit system 1 is formed, a wafer including the CMOS measurement circuit system 1 is transferred to a next process to form the CMOS infrared sensing structure 2, and since silicon oxide is a most commonly used dielectric material in the CMOS process, and silicon oxide is mostly used as an insulating layer between metal layers on a CMOS circuit, if no insulating layer is used as a barrier when silicon oxide with a thickness of about 2um is corroded, the circuit will be seriously affected, and in order to ensure that the silicon oxide medium on the CMOS measurement circuit system is not corroded when the silicon oxide of a sacrificial layer is released, a closed release insulating layer 3 is provided at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 according to the embodiment of the present disclosure. After the CMOS measuring circuit system 1 is prepared and formed, a closed release isolation layer 3 is prepared and formed on the CMOS measuring circuit system 1, the CMOS measuring circuit system 1 is protected by the closed release isolation layer 3, in order to ensure the electric connection between the support base 42 and the CMOS measuring circuit system 1, after the closed release isolation layer 3 is prepared and formed, a through hole is formed in the area of the closed release isolation layer 3 corresponding to the support base 42 by adopting an etching process, and the support base 42 is electrically connected with the CMOS measuring circuit system 1 through the through hole. In addition, the sealing release isolation layer 3 and the supporting base 42 are arranged to form a sealing structure, so that the CMOS measurement circuit system 1 is completely separated from the sacrificial layer, and the CMOS measurement circuit system 1 is protected.

Illustratively, the material constituting hermetic release barrier layer 3 may include at least one of silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, silicon germanium, amorphous carbon, or aluminum oxide. Specifically, silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, silicon germanium, amorphous carbon, or aluminum oxide are all CMOS process corrosion-resistant materials, i.e., these materials are not corroded by the sacrificial layer release agent, so the hermetic release barrier layer 3 can be used to protect the CMOS measurement circuit system 1 from corrosion when the sacrificial layer is released by the corrosion process. In addition, the closed release isolation layer 3 covers the CMOS measurement circuit system 1, and the closed release isolation layer 3 can also be used for protecting the CMOS measurement circuit system 1 from being influenced by the process in the release etching process for manufacturing the CMOS infrared sensing structure 2. In addition, when being provided with the airtight isolated layer 3 that releases of at least one deck on reflection stratum 4, the material that sets up to constitute airtight isolated layer 3 that releases includes carborundum, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium silicon, germanium silicon, at least one in amorphous carbon or the aluminium oxide, when setting up airtight isolated layer 3 that releases and improving first columnar structure 61 stability, airtight isolated layer 3 that releases can hardly influence the reflection course in the resonant cavity, can avoid airtight isolated layer 3 that releases to influence the reflection course of resonant cavity, and then avoid airtight isolated layer 3 that releases to the influence of infrared microbridge detector detection sensitivity.

With reference to fig. 1 to 9, a CMOS fabrication process of the CMOS infrared sensing structure 2 includes a Metal interconnection process, a via process, an IMD (Inter Metal Dielectric) process, and an RDL (redistribution) process, where the CMOS infrared sensing structure 2 includes at least three Metal interconnection layers, at least three Dielectric layers, and a plurality of interconnection vias, the Dielectric layers include at least two sacrificial layers and a heat sensitive Dielectric layer, the Metal interconnection layers include at least a reflective layer 4 and two electrode layers, the two electrode layers are a first electrode layer 14 and a second electrode layer 140, the heat sensitive Dielectric layer includes a thermal sensitive material with a resistance temperature coefficient greater than a predetermined value, the resistance temperature coefficient may be, for example, greater than or equal to 0.015/K, the thermal sensitive Dielectric layer is made of a thermal sensitive material with a resistance temperature coefficient greater than the predetermined value, and is configured to convert a temperature change corresponding to infrared radiation absorbed by the thermal sensitive Dielectric layer into a resistance change, so as to convert an infrared target signal into a signal capable of being electrically read through the CMOS measurement circuit system 1. In addition, the heat-sensitive medium layer comprises a heat-sensitive material with a resistance temperature coefficient larger than a set value, and the resistance temperature coefficient can be larger than or equal to 0.015/K, so that the detection sensitivity of the infrared microbridge detector can be improved.

Specifically, the metal interconnection process is used to realize electrical connection between upper and lower metal interconnection layers, for example, to realize electrical connection between the first electrode layer 14 in the first columnar structure 61 and the support pedestal 42, the via process is used to form an interconnection via for connecting the upper and lower metal interconnection layers, for example, to form an interconnection via for connecting the first electrode layer 14 in the first columnar structure 61 and the support pedestal, the IMD process is used to realize isolation, that is, electrical insulation, between the upper and lower metal interconnection layers, for example, to realize electrical insulation between the electrode layers in the absorber plate 10 and the beam structure 11 and the reflector plate 41, the RDL process is a redistribution layer process, specifically, a layer of metal is re-laid above the top layer of circuit metal and has a metal pillar, for example, a tungsten pillar, and the RDL process is used to prepare the reflective layer 4 in the infrared micro-bridge detector on the top layer of the CMOS measurement circuit system 1, and the support pedestal 42 on the reflective layer 4 is electrically connected to the top layer of the CMOS measurement circuit system 1. In addition, as shown in fig. 2, the CMOS manufacturing process of the CMOS measurement circuit system 1 may also include a metal interconnection process and a via process, the CMOS measurement circuit system 1 includes metal interconnection layers 101, dielectric layers 102 and a silicon substrate 103 at the bottom, which are arranged at intervals, and the upper and lower metal interconnection layers 101 are electrically connected through vias 104.

With reference to fig. 1 to 9, the CMOS infrared sensing structure 2 includes a resonant cavity formed by a reflective layer 4 and a heat sensitive medium layer, and a suspended microbridge structure 40 for controlling heat transfer, the CMOS measurement circuit system 1 is configured to measure and process an array resistance value formed by one or more CMOS infrared sensing structures 2, and convert an infrared signal into an image electrical signal, the infrared microbridge detector includes a plurality of infrared microbridge detector pixels arranged in an array, and each infrared microbridge detector pixel includes one CMOS infrared sensing structure 2. Specifically, the resonant cavity may be formed by a cavity between the reflective layer 4 and the heat-sensitive medium layer in the absorption plate 10, for example, and infrared light is reflected back and forth in the resonant cavity through the absorption plate 10 to improve the detection sensitivity of the infrared microbridge detector.

Fig. 10 is a schematic structural diagram of a CMOS measurement circuit system according to an embodiment of the present disclosure. With reference to fig. 1 to 10, the cmos measurement circuit system 1 includes a bias voltage generation circuit 7, a column-level analog front-end circuit 8 and a row-level circuit 9, an input end of the bias voltage generation circuit 7 is connected to an output end of the row-level circuit 9, an input end of the column-level analog front-end circuit 8 is connected to an output end of the bias voltage generation circuit 7, the row-level circuit 9 includes a row-level mirror image element Rsm and a row selection switch K1, and the column-level analog front-end circuit 8 includes a blind image element RD; the row-level circuit 9 is distributed in each pixel, selects a signal to be processed according to a row strobe signal of the timing sequence generating circuit, and outputs a current signal to the column-level analog front-end circuit 8 under the action of the bias generating circuit 7 to perform current-voltage conversion output; the row stage circuit 9 outputs a third bias voltage VRsm to the bias generation circuit 7 when being controlled by the row selection switch K1 to be gated, the bias generation circuit 7 outputs a first bias voltage V1 and a second bias voltage V2 according to an input constant voltage and the third bias voltage VRsm, and the column stage analog front-end circuit 8 obtains two currents according to the first bias voltage V1 and the second bias voltage V2, performs transimpedance amplification on a difference between the two generated currents, and outputs the amplified current as an output voltage.

Specifically, the row-level circuit 9 includes a row-level mirror image element Rsm and a row selection switch K1, and the row-level circuit 9 is configured to generate a third bias voltage VRsm according to a gating state of the row selection switch K1. Illustratively, the row-level image elements Rsm may be subjected to a shading process, so that the row-level image elements Rsm are subjected to a fixed radiation of a shading sheet having a temperature constantly equal to the substrate temperature, the row selection switch K1 may be implemented by a transistor, the row selection switch K1 is closed, and the row-level image elements Rsm are connected to the bias generation circuit 7, that is, the row-level circuit 9 outputs the third bias voltage VRsm to the bias generation circuit 7 when being controlled by the row selection switch K1 to be turned on. The bias generating circuit 7 may include a first bias generating circuit 71 and a second bias generating circuit 72, the first bias generating circuit 71 being configured to generate a first bias voltage V1 according to an input constant voltage, which may be, for example, a positive power supply signal with a constant voltage. The second bias generating circuit 72 may include a bias control sub-circuit 721 and a plurality of gate driving sub-circuits 722, the bias control sub-circuit 721 controlling the gate driving sub-circuits 722 to generate the corresponding second bias voltages V2, respectively, according to the third bias voltage VRsm.

The column-level analog front-end circuit 8 includes a plurality of column control sub-circuits 81, the column control sub-circuits 81 are disposed in correspondence with the gate driving sub-circuits 722, and exemplarily, the column control sub-circuits 81 may be disposed in one-to-one correspondence with the gate driving sub-circuits 722, and the gate driving sub-circuits 722 are configured to provide the second bias voltage V2 to the corresponding column control sub-circuits 81 according to their own gate states. Illustratively, it may be set that when the gate driving sub-circuit 722 is gated, the gate driving sub-circuit 722 supplies the second bias voltage V2 to the corresponding column control sub-circuit 81; when the gate driving sub-circuit 722 is not gated, the gate driving sub-circuit 722 stops supplying the second bias voltage V2 to the corresponding column control sub-circuit 81.

The column-level analog front-end circuit 8 comprises an effective pixel RS and a blind pixel RD, the column control sub-circuit is used for generating a first current I1 according to a first bias voltage V1 and the blind pixel RD, generating a second current I2 according to a second bias voltage V2 and the effective pixel RS, performing transimpedance amplification on a difference value of the first current I1 and the second current I2 and outputting the difference value, and the row-level image pixel Rsm and the effective pixel RS have the same temperature drift amount under the same environment temperature.

Illustratively, the row-level image elements Rsm are thermally insulated from the CMOS measurement circuitry 1 and are shaded, and the row-level image elements Rsm are subjected to a fixed radiation from a shade sheet having a temperature constantly equal to the substrate temperature. The absorption plate 10 of the active pixel RS is thermally insulated from the CMOS measurement circuitry 1 and the active pixel RS receives external radiation. The absorbing plates 10 of the row-level mirror image elements Rsm and the effective elements RS are thermally insulated from the CMOS measuring circuit system 1, so that the row-level mirror image elements Rsm and the effective elements RS have a self-heating effect.

When the corresponding row-level mirror image element Rsm is gated by the row selection switch K1, the resistance value of both the row-level mirror image element Rsm and the effective pixel RS changes due to joule heat, but when the row-level mirror image element Rsm and the effective pixel RS are subjected to the same fixed radiation, the resistance value of the row-level mirror image element Rsm and the resistance value of the effective pixel RS are the same, the temperature coefficients of the row-level mirror image element Rsm and the temperature coefficient of the effective pixel RS are also the same, the temperature drift amounts of the row-level mirror image element Rsm and the effective pixel RS at the same environmental temperature are the same, the changes of the row-level mirror image element Rsm and the effective pixel RS at the same environmental temperature are synchronized, the characteristic that the temperature drift amounts of the row-level mirror image element Rsm and the effective pixel RS at the same environmental temperature are the utilized is favorable for effectively compensating the resistance value changes of the row-level mirror image element Rsm and the effective pixel RS due to the self-heating effect, and realizing the stable output of the CMOS measurement circuit system 1.

In addition, by arranging the second bias generating circuit 72 to include a bias control sub-circuit 721 and a plurality of gate driving sub-circuits 722, the bias control sub-circuit 721 is configured to control the gate driving sub-circuits 722 to generate corresponding second bias voltages V2 respectively according to the row control signal, so that each row of pixels has one path to drive the entire row of pixels in the row individually, thereby reducing the requirement for the second bias voltage V2, that is, improving the driving capability of the bias generating circuit 7, and facilitating the use of the CMOS measurement circuit system 1 to drive a larger-scale infrared microbridge detector pixel array. In addition, the specific detailed operation principle of the CMOS measurement circuit system 1 is well known to those skilled in the art, and will not be described herein.

Alternatively, the CMOS infrared sensing structure 2 may be disposed on a metal interconnect layer of the CMOS measurement circuitry 1 or fabricated on the same layer. Specifically, the metal interconnection layer of the CMOS measurement circuitry 1 may be a top metal layer in the CMOS measurement circuitry 1, and in conjunction with fig. 1 to 9, the CMOS infrared sensing structure 2 may be fabricated on the top metal interconnection layer of the CMOS measurement circuitry 1, and the CMOS infrared sensing structure 2 is electrically connected to the CMOS measurement circuitry 1 through a supporting base 42 on the top metal interconnection layer of the CMOS measurement circuitry 1, so as to transmit the electrical signal converted by the infrared signal to the CMOS measurement circuitry 1.

Fig. 11 is a schematic cross-sectional structure view of another infrared microbridge detector provided in the embodiment of the present disclosure. As shown in fig. 11, the CMOS infrared sensing structure 2 may also be prepared on the same layer as the metal interconnection layer of the CMOS measurement circuitry 1, that is, the CMOS measurement circuitry 1 and the CMOS infrared sensing structure 2 are arranged on the same layer, for example, as shown in fig. 11, the CMOS infrared sensing structure 2 may be arranged on one side of the CMOS measurement circuitry 1, and the top of the CMOS measurement circuitry 1 may also be provided with a hermetic release isolation layer 3 to protect the CMOS measurement circuitry 1.

Optionally, in conjunction with fig. 1 to 11, the sacrificial layer is used to make the CMOS infrared sensing structure 2 form a hollow structure, the material constituting the sacrificial layer is silicon oxide, and the sacrificial layer is etched by a post-CMOS process. For example, the post-CMOS process may etch the sacrificial layer using at least one of gases having corrosive properties to silicon oxide, such as gaseous hydrogen fluoride, carbon tetrafluoride, and trifluoromethane. Specifically, sacrificial layers (not shown in fig. 1 to 11) are respectively arranged between the reflection layer 4 and the suspended micro-bridge structure 40 and between the beam structure 11 and the absorption plate 10, when the closed release isolation layer 3 is arranged on the reflection layer 4, the sacrificial layers are arranged between the closed release isolation layer 3 and the suspended micro-bridge structure 40, the material forming the sacrificial layers is silicon oxide, so as to be compatible with a CMOS process, and a post-CMOS process can be adopted, that is, the post-CMOS process corrodes the sacrificial layers to release the sacrificial layers in the final infrared detection chip product.

Optionally, the absorption plate 10 is configured to absorb an infrared target signal and convert the infrared target signal into an electrical signal, the absorption plate 10 includes a metal interconnection layer and at least one layer of a thermal sensitive medium layer, the metal interconnection layer in the absorption plate 10 is a second electrode layer 140 in the absorption plate 10 and is configured to transmit the electrical signal converted from the infrared signal, the second electrode layer 140 in the absorption plate 10 includes two patterned electrode structures, the two patterned electrode structures output a positive electrical signal and a ground electrical signal respectively, and the positive electrical signal and the ground electrical signal are transmitted to the corresponding support base 42 through a different second pillar structure 62, a different beam structure 11, and a different first pillar structure 61 and are further transmitted to the CMOS measurement circuit system 1. The beam structure 11 comprises at least a metal interconnection layer, the metal interconnection layer in the beam structure 11 is the first electrode layer 14 in the beam structure 11, and the first electrode layer 14 in the beam structure 11 and the second electrode layer 140 in the absorber plate 10 are electrically connected.

The first columnar structure 61 is connected with the corresponding beam structure 11 and the CMOS measurement circuit system 1 by using a metal interconnection process and a through hole process, and with reference to fig. 2 to 11, the upper side of the first columnar structure 61 needs to be electrically connected with the first electrode layer 14 in the beam structure 11 through a through hole penetrating through a sacrificial layer between the reflective layer 4 and the beam structure 11, the lower side of the first columnar structure 6 needs to be electrically connected with the corresponding support base 42 through a through hole penetrating through a dielectric layer on the support base 42, and further, the first electrode layer 14 in the beam structure 11 is electrically connected with the corresponding support base 42 through the corresponding first columnar structure 61. The second columnar structures 62 are connected to the corresponding absorption plates 10 and the corresponding beam structures 11 by using a metal interconnection process and a via process, and referring to fig. 2 and fig. 4 to fig. 11, the upper sides of the second columnar structures 62 need to be electrically connected to the second electrode layers 140 in the absorption plates 10 through vias penetrating through the sacrificial layers between the absorption plates 10 and the beam structures 11, and the lower sides of the second columnar structures 62 need to be electrically connected to the first electrode layers 14 in the beam structures 11 through vias penetrating through the dielectric layers covering the first electrode layers 14 in the beam structures 11. As shown in fig. 3, the upper side of the second pillar structures 62 needs to be electrically connected to the first electrode layer 14 in the beam structure 11 through via holes penetrating through the sacrificial layer between the absorber plate 10 and the beam structure 11, and the lower side of the second pillar structures 62 needs to be electrically connected to the second electrode layer 140 in the absorber plate 10 through via holes penetrating through the dielectric layer covering the second electrode layer 140 in the absorber plate 10. The reflecting plate 41 is used for reflecting infrared signals and forms a resonant cavity with the heat-sensitive medium layer, that is, the reflecting plate 41 is used for reflecting infrared signals and forms a resonant cavity with the heat-sensitive medium layer, and the reflecting layer 4 comprises at least one metal interconnection layer which is used for forming a supporting base 42 and is also used for forming the reflecting plate 41.

Optionally, the infrared microbridge detector may further include a metamaterial structure and/or a polarization structure, and the metamaterial structure or the polarization structure is at least one metal interconnection layer. Fig. 12 is a schematic perspective view of another infrared microbridge detector provided in the embodiment of the present disclosure, and as shown in fig. 12, a metal interconnection layer forming a metamaterial structure may include a plurality of metal repeating units 20 arranged in an array, each metal repeating unit includes two L-shaped patterned structures 21 arranged diagonally, and an infrared absorption spectrum band of the infrared microbridge detector is a 3-30 μm band. As shown in fig. 13, a plurality of patterned hollow structures 22 arranged in an array are disposed on the metal interconnection layer forming the metamaterial structure, the patterned hollow structures 22 are in an open ring shape, and at this time, the infrared absorption spectrum band of the infrared microbridge detector is a 3-30 μm waveband. As shown in fig. 14, a plurality of linear stripe structures 23 and a plurality of folded stripe structures 24 are disposed on the metal interconnection layer forming the metamaterial structure, and the linear stripe structures 23 and the folded stripe structures 24 are alternately arranged along a direction perpendicular to the linear stripe structures 23, where an infrared absorption spectrum band of the infrared microbridge detector is a band of 8 micrometers to 24 micrometers. Or as shown in fig. 15, a plurality of patterned hollow structures 25 arranged in an array are disposed on the metal interconnection layer forming the metamaterial structure, the patterned hollow structures 25 are regular hexagons, and the infrared absorption spectrum band of the infrared microbridge detector is a 3-30 μm band at this time. It should be noted that, in the embodiments of the present disclosure, specific patterns on the metal interconnection layer constituting the metamaterial structure are not limited, and it is sufficient to ensure that the repeated patterns can realize the functions of the metamaterial structure or the polarization structure.

Specifically, the metamaterial is a material which is based on the generalized snell's law and performs electromagnetic or optical beam regulation and control by controlling wave front phase, amplitude and polarization, and can be also called as a super surface or a super structure, wherein the super surface or the super structure is an ultrathin two-dimensional array plane, and the characteristics of electromagnetic waves such as phase, polarization mode, propagation mode and the like can be flexibly and effectively manipulated. The present disclosure forms an electromagnetic metamaterial structure using the patterned structures as shown in fig. 12 to 15, that is, an artificial composite structure or a composite material having extraordinary electromagnetic properties is formed, so as to implement clipping of electromagnetic waves and light waves, thereby obtaining an electromagnetic wave absorption special device.

Fig. 16 is a schematic top view of a polarization structure according to an embodiment of the present disclosure. As shown in fig. 16, the polarization structure 26 may include a plurality of gratings 27 arranged in sequence, an interval between adjacent gratings 27 is 10nm to 500nm, the gratings 27 may be linear as shown in fig. 16, or may be curved as shown in fig. 17 and 18, the gratings 27 in the polarization structure 26 may be rotated or combined at any angle, and the polarization structure 26 may be disposed such that the CMOS sensing structure absorbs polarized light in a specific direction. Illustratively, the grating 27 may be a structure formed by etching a metal thin film, i.e., a metal interconnection layer. Specifically, polarization is an important information of light, and polarization detection can expand the information quantity from three dimensions, such as light intensity, light spectrum and space, to seven dimensions, such as light intensity, light spectrum, space, polarization degree, polarization azimuth angle, polarization ellipse ratio and rotation direction, and since the polarization degree of the ground object background is far less than that of the artificial target, the infrared polarization detection technology has very important application in the field of space remote sensing. In the existing polarization detection system, a polarization element is independent from a detector, and a polarizing film needs to be added on a lens of the whole machine or a polarization lens needs to be designed. The existing polarization detection system, which acquires polarization information by rotating a polarization element, has disadvantages of complicated optical elements and complicated optical path system. In addition, the polarization image acquired by combining the polarizer and the detector needs to be processed by an image fusion algorithm, which is not only complex but also relatively inaccurate.

The polarization structure 26 is monolithically integrated with the uncooled infrared microbridge detector, so that monolithic integration of the polarization-sensitive infrared microbridge detector can be realized, difficulty of optical design is greatly reduced, an optical system is simplified, optical elements are reduced, and cost of the optical system is reduced. In addition, the images acquired by the single-chip integrated polarized uncooled infrared micro-bridge detector are original infrared image information, the CMOS measuring circuit system 1 can obtain accurate image information only by processing signals detected by the infrared micro-bridge detector, image fusion of the existing detector is not needed, and authenticity and effectiveness of the images are greatly improved. In addition, the polarization structure 26 can also be located above the absorption plate 10 and is not in contact with the absorption plate 10, that is, the polarization structure 26 can be a suspended structure located above the suspended microbridge structure 40, the polarization structure 26 and the suspended microbridge structure 40 can adopt a column connection supporting mode or a bonding supporting mode, and the polarization structure 26 and the infrared microbridge detector pixel can be bonded in a one-to-one correspondence manner or can also adopt a whole chip bonding manner. Therefore, the independently suspended metal grating structure cannot cause deformation of the infrared sensitive micro-bridge structure, and the heat-sensitive characteristic of the sensitive film cannot be influenced.

Illustratively, in conjunction with fig. 1 to 18, the metamaterial structure is at least one metal interconnection layer, the polarization structure is at least one metal interconnection layer, and the metamaterial structure or the polarization structure may be at least one metal interconnection layer on a side of the third dielectric layer 130 adjacent to the CMOS measurement circuitry 1, for example, the metal interconnection layer constituting the metamaterial structure or the polarization structure may be disposed on a side of the third dielectric layer 130 adjacent to the CMOS measurement circuitry 1 and in contact with the third dielectric layer 130. For example, the metamaterial structure or the polarization structure may be at least one metal interconnection layer on the side of the fourth dielectric layer 150 away from the CMOS measurement circuitry 1, and for example, the metal interconnection layer constituting the metamaterial structure or the polarization structure may be disposed on the side of the fourth dielectric layer 150 away from the CMOS measurement circuitry 1 and in contact with the fourth dielectric layer 150. For example, the metamaterial structure or the polarization structure may be at least one metal interconnection layer located between the third dielectric layer 130 and the fourth dielectric layer 150 and electrically insulated from the second electrode layer 140, for example, the metal interconnection layer constituting the metamaterial structure or the polarization structure may be located between the third dielectric layer 130 and the second electrode layer 140 and electrically insulated from the second electrode layer 140 or located between the fourth dielectric layer 150 and the second electrode layer 140 and electrically insulated from the second electrode layer 140. For example, the second electrode layer 140 may also be disposed as a metamaterial structure layer or a polarization structure layer, that is, the patterned structure described in the above embodiments may be formed on the second electrode layer 140.

Fig. 19 is a schematic cross-sectional structure diagram of another infrared microbridge detector pixel provided in the embodiment of the present disclosure. Fig. 19 shows only the first columnar structure 61 and a part of the beam structure 11 by way of example, the structure above the beam structure 11 is not shown, and on the basis of the above embodiment, as shown in fig. 19, the infrared micro-bridge detector may further include a first reinforcing structure 162, where the first reinforcing structure 162 is disposed corresponding to the position of the first columnar structure 61, and the first reinforcing structure 162 is used for enhancing the connection stability between the first columnar structure 61 and the beam structure 11 and between the first columnar structure 61 and the reflective layer 4, that is, between the first columnar structure 61 and the support base 42. Illustratively, the first reinforcing structure 162 may be located on a side of the first electrode layer 14 adjacent to or away from the CMOS measurement circuit system 1, and fig. 19 exemplarily sets the first reinforcing structure 162 to be located above the second dielectric layer 15 and to be in contact with the second dielectric layer 15, where the first reinforcing structure 162 may form a hollow structure in the hollow columnar structure as shown in fig. 19, and the first reinforcing structure 162 may also form a solid structure in the hollow columnar structure, that is, the first reinforcing structure 162 may also fill an inner space surrounded by the second dielectric layer 15. Alternatively, as shown in fig. 20, the first reinforcing structure 162 may be disposed above the first electrode layer 14, and the first reinforcing structure 162 is disposed in contact with the first electrode layer 14, that is, the first reinforcing structure 162 is located between the first electrode layer 14 and the second dielectric layer 15, where the first reinforcing structure 162 forms a hollow structure in the hollow columnar structure. As shown in fig. 21, the first reinforcing structure 162 may be disposed on a side of the first electrode layer 14 adjacent to the CMOS measurement circuit system 1, that is, the first reinforcing structure 162 may be disposed between the first electrode layer 14 and the first dielectric layer 13, and the first reinforcing structure 162 is disposed in contact with the first electrode layer 14.

With reference to fig. 19 to fig. 21, whether the first reinforcing structure 162 is located on the side of the first electrode layer 14 away from the CMOS measurement circuit system 1 or the first reinforcing structure 162 is located on the side of the first electrode layer 14 close to the CMOS measurement circuit system 1, the first reinforcing structure 162 covers the connection position of the first pillar structure 61 and the beam structure 11, which is equivalent to adding a negative weight at the connection position of the first pillar structure 61 and the beam structure 11, so that the connection stability between the first pillar structure 61 and the beam structure 11 is enhanced by the first reinforcing structure 162. In addition, the first reinforcing structure 162 also covers at least part of the connection position of the first columnar structure 61 and the supporting base 42, which is equivalent to that a negative weight is added at the connection position of the first columnar structure 61 and the supporting base 42, so that the connection stability between the first columnar structure 6 and the supporting base 42 is enhanced by using the first reinforcing structure 162, the electrical connection characteristic of the whole infrared microbridge detector is further optimized, and the infrared detection performance of the infrared microbridge detector is optimized. Illustratively, the material forming the first reinforcing structure 162 may include at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride, silicon carbonitride, silicon oxide, silicon, germanium, silicon germanium, aluminum, copper, tungsten, gold, platinum, nickel, chromium, titanium tungsten alloy, nickel-chromium alloy, nickel-platinum alloy or nickel-silicon alloy, the first reinforcing structure 162 may be a single-layer structure deposited by a medium or a metal, or a multi-layer structure formed by stacking two, three or more single-layer structures, and the amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride, silicon carbonitride, silicon, germanium, silicon germanium, aluminum, copper, tungsten, gold, platinum, nickel, chromium, titanium tungsten alloy, nickel-chromium alloy, nickel-platinum alloy and nickel-silicon alloy are not corroded by the gas-phase hydrogen fluoride, carbon tetrafluoride or trifluoromethane, so that the first reinforcing structure 162 and the first pillar-shaped beam base 61 are connected to the first reinforcing structure 61, and the first pillar-shaped beam 61. In addition, when the material constituting the first reinforcement structure 162 includes silicon oxide, since silicon oxide may be corroded by gas-phase hydrogen fluoride, carbon tetrafluoride, or trifluoromethane, it is preferable that the first reinforcement structure 162 is disposed in the enclosed space surrounded by the first dielectric layer 13 and the second dielectric layer 15. It should be noted that, the first reinforcing structure 162 described in the foregoing embodiment may be a metal structure or a non-metal structure, which is not specifically limited in this disclosure, and it is sufficient to ensure that the arrangement of the first reinforcing structure 162 does not affect the electrical connection relationship in the infrared microbridge detector.

Alternatively, the infrared microbridge detector may be arranged in analogy with the arrangement of the first reinforcing structure 162 in the structure shown in fig. 19 to 21, and further include a second reinforcing structure (not shown in fig. 1 to 21) arranged corresponding to the position of the second columnar structure 62, and the second reinforcing structure is used for enhancing the connection stability between the second columnar structure 62 and the absorbing plate 10 and between the second columnar structure 62 and the beam structure 11. For example, the second reinforcing structure may be located on a side of the second electrode layer 140 adjacent to or remote from the CMOS measurement circuitry 1, that is, the second reinforcing structure may be located on a side of the second electrode layer 140 remote from the CMOS measurement circuitry 1, or the second reinforcing structure may be located on a side of the second electrode layer 140 adjacent to the CMOS measurement circuitry 1. Compared with the arrangement of the first reinforcing structure 161 in the structure shown in fig. 19, when the beam structure 11 is located on the side of the absorber plate 10 close to the CMOS measurement circuit system 1, the second reinforcing structure may be located above the fourth dielectric layer 150 and in contact with the fourth dielectric layer 150, at this time, the second reinforcing structure may form a hollow structure in the hollow columnar structure, and the second reinforcing structure may also form a solid structure in the hollow columnar structure, that is, the second reinforcing structure may also fill the inner space formed by the fourth dielectric layer 150 in a surrounding manner. When the beam structure 11 is located on the side of the absorption plate 10 away from the CMOS measurement circuit system 1, the second reinforcing structure may be located corresponding to the location of the second cylindrical structure 62, and located above the second dielectric layer 15 and in contact with the second dielectric layer 15, at this time, the second reinforcing structure may form a hollow structure in the hollow cylindrical structure, and the second reinforcing structure may also form a solid structure in the hollow cylindrical structure, that is, the second reinforcing structure may also fill an inner space surrounded by the second dielectric layer 15

Alternatively, the second reinforcing structure may be disposed above the second electrode layer 140 and in contact with the second electrode layer 140, that is, the second reinforcing structure is located between the second electrode layer 140 and the fourth dielectric layer 150, in a manner similar to the manner of disposing the first reinforcing structure 161 in the structure shown in fig. 20, and then the second reinforcing structure forms a hollow structure in the hollow columnar structure. Alternatively, the second reinforcing structure may be disposed on a side of the second electrode layer 140 adjacent to the CMOS measurement circuit system 1, similar to the configuration of the first reinforcing structure 161 in the structure shown in fig. 21, that is, the second reinforcing structure may be disposed between the second electrode layer 140 and the third dielectric layer 130 and in contact with the second electrode layer 140. In addition, when the beam structure 11 like that shown in fig. 3 is located on the side of the absorption plate 10 away from the CMOS measurement circuitry 1, a reinforcing structure like that shown in fig. 19 to 21 may also be provided for the first columnar structure 61 and the second columnar structure 62.

In analogy to fig. 19 to fig. 21, whether the second reinforcing structure is located on the side of the second electrode layer 140 away from the CMOS measurement circuit system 1 or the second reinforcing structure is located on the side of the second electrode layer 140 close to the CMOS measurement circuit system 1, the second reinforcing structure covers the connection position of the second columnar structure 62 and the absorbing plate 10 and the connection position of the second columnar structure 62 and the beam structure 11, which corresponds to the addition of the negative weight at the connection position of the second columnar structure 62 and the absorbing plate 10 and the connection position of the second columnar structure 62 and the beam structure 11, and further, the connection stability between the second columnar structure 62 and the absorbing plate 10 is enhanced by the second reinforcing structure corresponding to the hollow second columnar structure 62.

Illustratively, the material forming the second reinforcing structure may include at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride, silicon carbonitride, silicon oxide, silicon, germanium, silicon germanium, aluminum, copper, tungsten, gold, platinum, nickel, chromium, titanium tungsten alloy, nickel-chromium alloy, nickel-platinum alloy, or nickel-silicon alloy, the second reinforcing structure may be a single layer structure deposited by a medium or a metal, or a multi-layer structure formed by stacking two, three, or more single layers, and the amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride, silicon carbonitride, silicon, germanium, silicon germanium, aluminum, copper, tungsten, gold, platinum, nickel, chromium, titanium-tungsten alloy, nickel-chromium alloy, nickel-platinum alloy, and nickel-silicon alloy are not corroded by the gas phase hydrogen fluoride, carbon tetrafluoride, or trifluoromethane, so that the subsequent corrosion of the sacrificial layer by the gas phase hydrogen fluoride, carbon tetrafluoride, or trifluoromethane to release the sacrificial layer may not affect the connecting position of the second reinforcing structure and the infrared detector, thereby enhancing the stability of the second reinforcing structure and the infrared detector 10. In addition, when the material constituting the second reinforcement structure includes silicon oxide, since silicon oxide may be corroded by gas-phase hydrogen fluoride, carbon tetrafluoride, or trifluoromethane, the second reinforcement structure may be preferably disposed in the enclosed space surrounded by the third dielectric layer 130 and the fourth dielectric layer 150. It should be noted that, the second reinforcing structure described in the foregoing embodiment may be a metal structure or a non-metal structure, which is not specifically limited in this disclosure, and it is only required to ensure that the arrangement of the second reinforcing structure does not affect the electrical connection relationship in the infrared microbridge detector.

Optionally, with reference to fig. 1 to 21, at least one patterned metal interconnection layer may be disposed between the reflective layer 4 and the suspended microbridge structure 40, the patterned metal interconnection layer is located above or below the hermetic release barrier layer 3 and is electrically insulated from the reflective layer 4, and the patterned metal interconnection layer is used for adjusting a resonance mode of the infrared microbridge detector. Specifically, a Bragg reflector (Bragg reflector) is an optical device for enhancing reflection of light with different wavelengths by utilizing constructive interference of reflected light with different interfaces, and is composed of a plurality of 1/4 wavelength reflectors to achieve efficient reflection of incident light with a plurality of wavelengths.

Illustratively, at least one patterned metal interconnect layer may be disposed on a side of the hermetic release barrier 3 away from the CMOS measurement circuitry 1 and/or at least one patterned metal interconnect layer may be disposed on a side of the hermetic release barrier 3 adjacent to the CMOS measurement circuitry 1. Illustratively, the patterned metal interconnection layer may include a plurality of metal repeating units arranged in an array, each metal repeating unit may include at least one of an L-shaped patterned structure, a circular structure, a sector-shaped structure, an elliptical structure, a circular ring structure, an open ring structure, or a polygonal structure arranged at two opposite corners, or the patterned metal interconnection layer may include a plurality of patterned hollow structures arranged in an array, and the patterned hollow structures may include at least one of a circular hollow structure, an open ring-shaped hollow structure, or a polygonal hollow structure.

Fig. 22 is a schematic cross-sectional structure view of another infrared microbridge detector provided in the embodiment of the present disclosure. On the basis of the above embodiment, as shown in fig. 22, the first dielectric layer 13 and/or the second dielectric layer 15 between the oppositely disposed beam structures 11 may be disposed to form a patterned film structure, where the oppositely disposed beam structures 11 are the beam structures 11 located at the left and right sides in fig. 1 or the beam structures 11 located at the upper and lower sides in fig. 1, and the patterned film structure includes a plurality of stripe patterns, and the stripe patterns in the patterned film structure are symmetrically disposed with respect to the beam structures 11. Taking the first dielectric layer 13 as an example, fig. 23 is a schematic top view structure diagram of the first dielectric layer according to an embodiment of the disclosure. With reference to fig. 22 and 23, the first dielectric layer 13 between the oppositely disposed beam structures 11 may be disposed to form a patterned film structure 90 as shown in fig. 23, where the patterned film structure 90 is located in the region A1 in fig. 22, the patterned film structure 90 includes a plurality of stripe patterns 91, and the stripe patterns 91 in the patterned film structure 90 are symmetrically disposed with respect to the beam structures 11, that is, the stripe patterns 91 in the patterned film structure 90 are symmetrically disposed with respect to the beam structures 11 on the left and right sides in fig. 23. Therefore, the patterned film structure 90 is formed by arranging the first dielectric layer 13 and/or the second dielectric layer 15 between the beam structures 11 which are arranged oppositely, the patterned film structure 90 comprises a plurality of strip-shaped patterns 91, and the strip-shaped patterns 91 in the patterned film structure 90 are symmetrically arranged relative to the beam structures 11, so that the mechanical stability of the patterned film structure 90 is effectively improved, and the mechanical stability of the whole infrared microbridge detector is improved. It should be noted that the pattern in the patterned film structure 90 according to the embodiment of the disclosure is not limited to the pattern shown in fig. 23, for example, the patterned film structure 90 may further include more stripe patterns to form a grid structure, and the like, and the embodiment of the disclosure does not limit the specific pattern in the patterned film structure 90, so as to ensure that the stripe patterns in the patterned film structure 90 are symmetrical with respect to the beam structure 11, and the patterns in the patterned film structure 90 formed by the first dielectric layer 13 and the second dielectric layer 15 may be the same or different.

Alternatively, the infrared microbridge detector may be configured based on a 3nm, 7nm, 10nm, 14nm, 22nm, 28nm, 32nm, 45nm, 65nm, 90nm, 130nm, 150nm, 180nm, 250nm, or 350nm CMOS process, which characterizes process nodes of the integrated circuit, i.e., features during the processing of the integrated circuit. Alternatively, the metal wiring material constituting the metal interconnection layer in the infrared micro-bridge detector may be configured to include at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium, or cobalt, and for example, the material constituting the reflective layer 4 may be configured to include at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium, or cobalt. In addition, the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are both prepared by using a CMOS process, and the CMOS infrared sensing structure 2 is directly prepared on the CMOS measurement circuit system 1, so that the radial side lengths of the first columnar structure 61 and the second columnar structure 62 can be greater than or equal to 0.5um and less than or equal to 3um, the width of the beam structure 11, that is, the width of a single line in the beam structure 11 is less than or equal to 0.3um, and the height of the resonant cavity is less than or equal to 2.5um.

It should be noted that, in the embodiments of the present disclosure, a schematic diagram of an infrared micro-bridge detector with all structures that belong to the scope of the embodiments of the present disclosure is not given, and the scope of the embodiments of the present disclosure is not limited, and different features disclosed in the embodiments of the present disclosure may be combined at will, for example, whether there is a first reinforcing structure and/or a second reinforcing structure in an infrared micro-bridge detector, all of which belong to the scope of the embodiments of the present disclosure, and any combination of first columnar structures and second columnar structures with different structures also belongs to the scope of the embodiments of the present disclosure.

It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.

The foregoing are merely exemplary embodiments of the present disclosure, which enable those skilled in the art to understand or practice the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A CMOS infrared microbridge detector, comprising:

the CMOS manufacturing process of the CMOS infrared sensing structure comprises a metal interconnection process, a through hole process, an IMD (in-mold decoration) process and an RDL (remote description language) process, wherein the CMOS infrared sensing structure comprises at least three metal interconnection layers, at least three dielectric layers and a plurality of interconnection through holes, the three metal interconnection layers comprise a reflecting layer and two electrode layers, and the three dielectric layers comprise two sacrificial layers and one heat-sensitive dielectric layer; the thermal sensitive medium layer is used for converting temperature change corresponding to infrared radiation absorbed by the thermal sensitive medium layer into resistance change, and further converting an infrared target signal into a signal capable of realizing electric reading through the CMOS measuring circuit system;

along the direction far away from the CMOS measuring circuit system, the beam structure sequentially comprises a first dielectric layer, a first electrode layer and a second dielectric layer, the first dielectric layer and/or the second dielectric layer between the oppositely arranged beam structures form a patterned film layer structure, the patterned film layer structure comprises a plurality of strip-shaped patterns, and the patterns in the patterned film layer structure are symmetrically arranged relative to the beam structure;

2. The CMOS infrared microbridge detector of claim 1, wherein the CMOS infrared sensing structure is fabricated on top of or at the same level as a metal interconnect layer of the CMOS measurement circuitry.

3. The CMOS infrared microbridge detector as claimed in claim 1, wherein the sacrificial layer is used to make the CMOS infrared sensing structure form a hollow structure, the material constituting the sacrificial layer is silicon oxide, and the sacrificial layer is etched by a post-CMOS process.

4. The CMOS infrared microbridge detector of claim 1, wherein the reflective layer is configured to reflect infrared signals and form the resonant cavity with the layer of thermally sensitive dielectric, the reflective layer comprising at least one metal interconnect layer, the first pillar structure connecting the beam structure and the CMOS measurement circuitry using the metal interconnect process and the via process, the second pillar structure connecting the absorber plate and the beam structure using the metal interconnect process and the via process;

along the direction far away from the CMOS measuring circuit system, the first columnar structure at least comprises the first electrode layer, the absorption plate sequentially comprises a third dielectric layer, a second electrode layer and a fourth dielectric layer, and the second columnar structure at least comprises the second electrode layer; the material for forming the first dielectric layer comprises at least one of amorphous silicon, amorphous germanium-silicon, amorphous carbon or aluminum oxide, the material for forming the second dielectric layer comprises at least one of amorphous silicon, amorphous germanium-silicon, amorphous carbon or aluminum oxide, the material for forming the third dielectric layer comprises at least one of materials with the resistance temperature coefficient larger than a set value and prepared from amorphous silicon, amorphous germanium-silicon or amorphous carbon, and the material for forming the fourth dielectric layer comprises at least one of materials with the resistance temperature coefficient larger than the set value and prepared from amorphous silicon, amorphous germanium-silicon or amorphous carbon; alternatively, the first and second electrodes may be,

along the direction far away from the CMOS measuring circuit system, the first columnar structure at least comprises the first electrode layer, the absorption plate sequentially comprises a third dielectric layer, a second electrode layer, a heat-sensitive dielectric layer and a fourth dielectric layer or the absorption plate sequentially comprises a third dielectric layer, a heat-sensitive dielectric layer, a second electrode layer and a fourth dielectric layer, and the second columnar structure at least comprises the second electrode layer; the material forming the first dielectric layer comprises at least one of amorphous silicon, amorphous germanium-silicon, amorphous carbon or aluminum oxide, the material forming the second dielectric layer comprises at least one of amorphous silicon, amorphous germanium-silicon, amorphous carbon or aluminum oxide, the material forming the third dielectric layer comprises at least one of amorphous silicon, amorphous germanium-silicon, amorphous carbon or aluminum oxide, the material forming the fourth dielectric layer comprises at least one of amorphous silicon, amorphous germanium-silicon, amorphous carbon or aluminum oxide, and the material forming the heat-sensitive dielectric layer comprises at least one of materials prepared from titanium oxide, vanadium oxide, silicon, germanium-silicon, germanium-oxygen-silicon, graphene, strontium barium titanate thin film, copper or platinum, wherein the resistance temperature coefficient of the material forming the heat-sensitive dielectric layer is larger than a set value;

5. The CMOS infrared microbridge detector as claimed in claim 4, further comprising a first reinforcing structure disposed corresponding to the first pillar structure, wherein the first reinforcing structure is configured to enhance connection stability between the first pillar structure and the beam structure and between the first pillar structure and the reflective layer;

6. The CMOS infrared microbridge detector as claimed in claim 4, further comprising a second reinforcing structure, wherein the second reinforcing structure is disposed corresponding to the second columnar structure, and the second reinforcing structure is used for enhancing the connection stability between the second columnar structure and the absorption plate and between the second columnar structure and the beam structure;

7. The CMOS infrared microbridge detector according to claim 1, wherein the absorber plate has at least one hole formed thereon, the hole penetrating at least a dielectric layer in the absorber plate; and/or at least one hole-shaped structure is formed on the beam structure, and the hole-shaped structure at least penetrates through the medium layer in the beam structure.

8. The CMOS infrared microbridge detector of claim 1, wherein the hermetic release barrier is located at an interface between the CMOS measurement circuitry and the CMOS infrared sensing structure and/or in the CMOS infrared sensing structure;

the closed release isolation layer is positioned on the reflection layer and is in contact with the reflection layer, the closed release isolation layer comprises at least one dielectric layer, and the material forming the closed release isolation layer comprises at least one of silicon carbide, silicon carbonitride, silicon nitride, silicon, germanium, silicon germanium, amorphous carbon or aluminum oxide.

9. The CMOS infrared microbridge detector of claim 1, in which the infrared detector is based on a 3nm, 7nm, 10nm, 14nm, 22nm, 28nm, 32nm, 45nm, 65nm, 90nm, 130nm, 150nm, 180nm, 250nm, or 350nm CMOS process;