CN113720473B

CN113720473B - Infrared detector based on CMOS (complementary Metal oxide semiconductor) process

Info

Publication number: CN113720473B
Application number: CN202110324024.2A
Authority: CN
Inventors: 翟光杰; 武佩; 潘辉; 翟光强
Original assignee: Beijing North Gaoye Technology Co ltd
Current assignee: Beijing North Gaoye Technology Co ltd
Priority date: 2021-03-26
Filing date: 2021-03-26
Publication date: 2022-10-11
Anticipated expiration: 2041-03-26
Also published as: CN113720473A

Abstract

The utility model relates to an infrared detector based on CMOS technology, in which, both the CMOS measuring circuit system and the CMOS infrared sensing structure are prepared by CMOS technology, and the CMOS infrared sensing structure is directly prepared on the CMOS measuring circuit system; the CMOS manufacturing process of the CMOS infrared sensing structure comprises a metal interconnection process, a through hole process and an RDL process, wherein the CMOS infrared sensing structure comprises at least two metal interconnection layers, at least two dielectric layers and a plurality of interconnection through holes, the dielectric layers at least comprise a sacrificial layer and a heat-sensitive dielectric layer, and the heat-sensitive dielectric layer comprises a thermosensitive material of which the resistance temperature coefficient is greater than a set value; the CMOS infrared sensing structure comprises a resonant cavity formed by a reflecting layer and a heat sensitive medium layer, a suspended microbridge structure for controlling heat transfer and a columnar structure with electric connection and support functions. Through the technical scheme, the problems of low performance, low pixel scale, low yield and the like of the traditional MEMS process infrared detector are solved, and the performance of the infrared detector is optimized.

Description

Infrared detector based on CMOS (complementary Metal oxide semiconductor) process

Technical Field

The present disclosure relates to the field of infrared detection technologies, and in particular, to an infrared detector based on a CMOS process.

Background

The fields of monitoring markets, vehicle and auxiliary markets, home markets, intelligent manufacturing markets, mobile phone applications and the like have strong demands on uncooled high-performance chips, certain requirements are provided for the performance of the chips, the performance consistency and the product price, the potential demands of more than one hundred million chips are predicted every year, and the current process scheme and architecture cannot meet the market demands.

At present, an infrared detector adopts a mode of combining a measuring circuit and an infrared sensing structure, the measuring circuit is prepared by adopting a Complementary Metal-Oxide-Semiconductor (CMOS) process, and the infrared sensing structure is prepared by adopting a Micro-Electro-Mechanical System (MEMS) process, so that the following problems are caused:

(1) The infrared sensing structure is prepared by adopting an MEMS (micro-electromechanical systems) process, polyimide is used as a sacrificial layer, and the infrared sensing structure is incompatible with a CMOS (complementary metal oxide semiconductor) process.

(2) Polyimide is used as a sacrificial layer, so that the problem that the vacuum degree of a detector chip is influenced due to incomplete release exists, the growth temperature of a subsequent film is limited, and the selection of materials is not facilitated.

(3) Polyimide can cause the height of the resonant cavity to be inconsistent, and the working dominant wavelength is difficult to ensure.

(4) The control of the MEMS process is far worse than that of the CMOS process, and the performance consistency and the detection performance of the chip are restricted.

(5) MEMS has low productivity, low yield and high cost, and can not realize large-scale batch production.

(6) The existing process capability of the MEMS is not enough to support the preparation of a detector with higher performance, and the MEMS has smaller line width and thinner film thickness, thereby being not beneficial to realizing the miniaturization of a chip.

Disclosure of Invention

In order to solve the technical problems or at least partially solve the technical problems, the present disclosure provides an infrared detector based on a CMOS process, which solves the problems of low performance, low pixel scale, low yield, and the like of the conventional MEMS process infrared detector, and optimizes the performance of the infrared detector.

The present disclosure provides an infrared detector based on CMOS process, including:

the CMOS infrared sensing structure comprises a CMOS measuring circuit system and a CMOS infrared sensing structure, wherein the CMOS measuring circuit system and the CMOS infrared sensing structure are both prepared by using a CMOS process, and the CMOS infrared sensing structure is directly prepared on the CMOS measuring circuit system;

the infrared detector comprises an effective pixel array and a mirror image pixel array, wherein the mirror image pixel is used for eliminating thermal signals generated by the effective pixel except for radiation absorption, and the thermal signals comprise an environment background thermal signal, a resistance thermal signal and a substrate thermal signal;

aiming at the effective pixel:

the CMOS measurement circuit system comprises at least one layer of closed release isolation layer above the CMOS measurement circuit system, wherein the closed release isolation layer is used for protecting the CMOS measurement circuit system from being influenced by a process in the etching process of manufacturing the CMOS infrared sensing structure;

the CMOS manufacturing process of the CMOS infrared sensing structure comprises a metal interconnection process, a through hole process and an RDL (remote data link) process, wherein the CMOS infrared sensing structure comprises at least two metal interconnection layers, at least two dielectric layers and a plurality of interconnection through holes, the two dielectric layers at least comprise a sacrificial layer and a heat-sensitive dielectric layer, and the two metal interconnection layers at least comprise an electrode layer and a supporting base in a reflecting layer; the thermal sensitive medium layer is used for converting temperature change corresponding to infrared radiation absorbed by the thermal sensitive medium layer into resistance change, and further converting an infrared target signal into a signal capable of realizing electric reading through the CMOS measuring circuit system;

the CMOS infrared sensing structure comprises a resonant cavity formed by the reflecting layer and the heat sensitive medium layer, a suspended microbridge structure for controlling heat transfer and a columnar structure with electric connection and support functions, and the CMOS measuring circuit system is used for measuring and processing array resistance values formed by one or more CMOS infrared sensing structures and converting infrared signals into image electric signals;

the CMOS measuring circuit system comprises a bias voltage generating circuit, a column-level analog front-end circuit and a row-level circuit, wherein the input end of the bias voltage generating circuit is connected with the output end of the row-level circuit, the input end of the column-level analog front-end circuit is connected with the output end of the bias voltage generating circuit, the row-level circuit comprises row-level mirror image pixels and row selection switches, and the column-level analog front-end circuit comprises blind pixels; the row-level circuit is distributed in each pixel, selects a signal to be processed according to a row strobe signal of the time sequence generating circuit, and outputs a current signal to the column-level analog front-end circuit under the action of the bias voltage generating circuit so as to perform current-voltage conversion and output;

the column-level analog front-end circuit obtains two paths of currents according to the first bias voltage and the second bias voltage, performs transimpedance amplification on the difference between the two paths of generated currents and outputs the amplified current as an output voltage.

Optionally, the mirror image pixel is prepared by a CMOS process having the same process as the active pixel, and includes at least two metal interconnection layers and two dielectric layers.

Optionally, the mirror image element realizes the mirror image effect by at least one of a mode of destroying the resonant cavity, a mode of changing the height of the resonant cavity or a mode of directly reflecting the target infrared radiation.

Optionally, for the effective pixel, the CMOS infrared sensing structure is prepared on an upper layer or a same layer of a metal interconnection layer of the CMOS measurement circuitry.

Optionally, for the effective pixel, the sacrificial layer is used to enable the CMOS infrared sensing structure to form a hollow structure, the material forming the sacrificial layer is silicon oxide, and the sacrificial layer is etched by using a post-CMOS process.

Optionally, for the effective pixel, the post-CMOS process etches the sacrificial layer with at least one of gas-phase hydrogen fluoride, carbon tetrafluoride, and trifluoromethane.

Optionally, for the effective pixel, the close release isolation layer is located at an interface between the CMOS measurement circuitry and the CMOS infrared sensing structure and/or in the CMOS infrared sensing structure, and the close release isolation layer is used for protecting the CMOS measurement circuitry from erosion when a sacrificial layer is released by a corrosion process;

the CMOS technology corrosion-resistant material adopted by the closed release isolation layer comprises at least one of silicon, germanium, silicon-germanium alloy, amorphous silicon, amorphous germanium, amorphous silicon-germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride or silicon carbonitride.

Optionally, for the active pixel, the CMOS infrared sensing structure includes an absorption plate, a beam structure, the reflection layer, and the columnar structure;

the absorption plate is used for absorbing the infrared target signal and converting the infrared target signal into an electric signal, the absorption plate comprises a metal interconnection layer and at least one layer of the heat sensitive dielectric layer, and the material forming the heat sensitive dielectric layer comprises at least one of amorphous silicon, amorphous germanium-silicon, titanium oxide, vanadium oxide or titanium vanadium oxide;

the beam structure and the columnar structure are used for transmitting the electric signals and supporting and connecting the absorption plate, the beam structure comprises a metal interconnection layer and at least one dielectric layer, and the columnar structure is connected with the beam structure and the CMOS measurement circuit system by adopting the metal interconnection process and the through hole process;

the reflecting layer further comprises a reflecting plate, the reflecting plate is used for reflecting infrared signals and forms the resonant cavity with the heat-sensitive medium layer, and the reflecting layer comprises at least one metal layer.

Optionally, for the active pixel, at least two ends of the beam structure and the absorption plate are electrically connected, the CMOS infrared sensing structure includes at least two of the pillar structures and at least two supporting bases, and the electrode layer includes at least two electrode terminals.

Optionally, the infrared detector is based on 3nm, 7nm, 10nm, 14nm, 22nm, 28nm, 32nm, 45nm, 65nm, 90nm, 130nm, 150nm, 180nm, 250nm, or 350nm CMOS process.

Optionally, the metal line material constituting the metal interconnection layer includes at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium, or cobalt.

Compared with the prior art, the technical scheme provided by the embodiment of the disclosure has the following advantages:

the CMOS measurement circuit system and the CMOS infrared sensing structure are integrally prepared on the CMOS production line by utilizing the CMOS process, compared with the MEMS process, the CMOS does not have the process compatibility problem, the technical difficulty of the MEMS process is solved, the transportation cost can be reduced by adopting the CMOS production line process to prepare the infrared detector, and the risk caused by the problems of transportation and the like is reduced; the infrared detector takes silicon oxide as a sacrificial layer, the silicon oxide is completely compatible with a CMOS (complementary metal oxide semiconductor) process, the preparation process is simple and easy to control, the CMOS process does not have the problem that the vacuum degree of a detector chip is influenced due to incomplete release of polyimide of the sacrificial layer, the subsequent film growth temperature is not limited by a sacrificial layer material, the multilayer process design of the sacrificial layer can be realized, the process is not limited by the process, the planarization can be easily realized by using the sacrificial layer, and the process difficulty and possible risks are reduced; the infrared detector prepared by the integrated CMOS process can realize the aims of high yield, low cost, high yield and large-scale integrated production of chips, and provides a wider application market for the infrared detector; the infrared detector based on the CMOS process can realize smaller size and thinner film thickness of a characteristic structure, so that the infrared detector has larger duty ratio, lower thermal conductivity and smaller thermal capacity, and the infrared detector has higher detection sensitivity, longer detection distance and better detection performance; the infrared detector based on the CMOS process can make the pixel size of the detector smaller, realize smaller chip area under the same array pixel, and is more beneficial to realizing the miniaturization of a chip; the infrared detector based on the CMOS process has the advantages of mature process production line, higher process control precision, better meeting design requirements, better product consistency, more contribution to circuit chip adjustment performance and more contribution to industrialized mass production.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.

In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present disclosure, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.

Fig. 1 is a schematic perspective structure diagram of an effective pixel in an infrared detector provided in an embodiment of the present disclosure;

fig. 2 is a schematic cross-sectional structure diagram of an effective pixel in an infrared detector provided in an embodiment of the present disclosure;

fig. 3 is a schematic cross-sectional structure diagram of an effective pixel in another infrared detector provided in the embodiment of the present disclosure;

fig. 4 is a schematic cross-sectional structure diagram of an effective pixel in another infrared detector provided in the embodiment of the present disclosure;

fig. 5 is a schematic structural diagram of a CMOS measurement circuitry according to an embodiment of the present disclosure;

FIG. 6 is a schematic diagram of a three-dimensional exploded structure of a mirror image pixel of an infrared detector according to an embodiment of the present invention;

FIG. 7 is a schematic perspective exploded view of another infrared detector mirror image element provided in an embodiment of the present invention;

FIG. 8 is a schematic perspective exploded view of a mirror image pixel of another infrared detector according to an embodiment of the present invention;

FIG. 9 is a schematic perspective exploded view of a mirror image pixel of another infrared detector according to an embodiment of the present invention;

FIG. 10 is a schematic perspective view of a mirror image element of another infrared detector provided in an embodiment of the present invention;

FIG. 11 is a schematic perspective exploded view of a mirror image pixel of another infrared detector according to an embodiment of the present invention;

fig. 12 is a schematic perspective exploded view of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

fig. 13 is a schematic perspective view of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

FIG. 14 is a schematic perspective view of a mirror image element of another infrared detector provided in an embodiment of the present invention;

FIG. 15 is a schematic diagram of a film structure of a mirror image pixel of an infrared detector according to an embodiment of the present invention;

fig. 16 is a schematic diagram of a film structure of another infrared detector mirror image pixel provided in an embodiment of the present invention;

FIG. 17 is a schematic diagram of a film structure of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

fig. 18 is a schematic perspective exploded view of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

fig. 19 is a schematic diagram of a film structure of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

FIG. 20 is a schematic diagram of a film structure of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

fig. 21 is a schematic diagram of a film structure of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

fig. 22 is a schematic diagram of a film structure of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

fig. 23 is a schematic perspective exploded view of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

fig. 24 is a schematic perspective exploded view of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

FIG. 25 is a schematic diagram of a film structure of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

fig. 26 is a schematic diagram of a film structure of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

fig. 27 is a schematic diagram of a film structure of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

FIG. 28 is a schematic diagram of a film structure of a mirror image element of another infrared detector provided in an embodiment of the present invention;

FIG. 29 is a schematic perspective exploded view of a mirror image pixel of another infrared detector according to an embodiment of the present invention;

fig. 30 is a schematic perspective exploded view of a mirror image pixel of another infrared detector provided in an embodiment of the present invention;

fig. 31 is a schematic diagram of a film structure of an infrared detector according to an embodiment of the present invention;

FIG. 32 is a schematic cross-sectional view of another infrared detector provided in accordance with an embodiment of the present disclosure;

fig. 33 is a schematic perspective view of another infrared detector provided in the embodiment of the present disclosure.

Detailed Description

In order that the above objects, features and advantages of the present disclosure may be more clearly understood, aspects of the present disclosure will be further described below. It should be noted that the embodiments and features of the embodiments of the present disclosure may be combined with each other without conflict.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure, but the present disclosure may be practiced in other ways than those described herein; it is to be understood that the embodiments disclosed in the specification are only a few embodiments of the present disclosure, and not all embodiments.

Fig. 1 is a schematic perspective structure diagram of an effective pixel in an infrared detector provided by an embodiment of the present disclosure, and fig. 2 is a schematic cross-sectional structure diagram of an effective pixel in an infrared detector provided by an embodiment of the present disclosure. With reference to fig. 1 and 2, the CMOS process-based infrared detector includes a CMOS measurement circuit system 1 and a CMOS infrared sensing structure 2, both the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are fabricated using a CMOS process, and the CMOS infrared sensing structure 2 is directly fabricated on the CMOS measurement circuit system 1.

Specifically, the CMOS infrared sensing structure 2 is used for converting an external infrared signal into an electric signal and transmitting the electric signal to the CMOS measuring circuit system 1, and the CMOS measuring circuit system 1 reflects temperature information of a corresponding infrared signal according to the received electric signal, so that the temperature detection function of the infrared detector is realized. The CMOS measuring circuit system 1 and the CMOS infrared sensing structure 2 are both prepared by using a CMOS process, and the CMOS infrared sensing structure 2 is directly prepared on the CMOS measuring circuit system 1, namely, the CMOS measuring circuit system 1 is prepared by adopting the CMOS process, and then the CMOS infrared sensing structure 2 is continuously prepared by utilizing the CMOS process by utilizing parameters of various processes compatible with a CMOS production line and the production line.

Therefore, the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are integrally prepared on the CMOS production line by utilizing the CMOS process, compared with the MEMS process, the CMOS process does not have the process compatibility problem, the technical difficulty of the MEMS process is solved, the transportation cost can be reduced by adopting the CMOS production line process to prepare the infrared detector, and the risk caused by the transportation problem and the like is reduced; the infrared detector takes silicon oxide as a sacrificial layer, the silicon oxide is completely compatible with a CMOS (complementary metal oxide semiconductor) process, the preparation process is simple and easy to control, the CMOS process does not have the problem that the polyimide of the sacrificial layer is not released cleanly to influence the vacuum degree of a detector chip, the subsequent film growth temperature is not limited by the material of the sacrificial layer, the multilayer process design of the sacrificial layer can be realized, the process is not limited, the planarization can be easily realized by using the sacrificial layer, and the process difficulty and the possible risks are reduced; the infrared detector prepared by the integrated CMOS process can realize the aims of high yield, low cost, high yield and large-scale integrated production of chips, and provides a wider application market for the infrared detector; the infrared detector based on the CMOS process can realize smaller size and thinner film thickness of a characteristic structure, so that the infrared detector has larger duty ratio, lower thermal conductivity and smaller thermal capacity, and the infrared detector has higher detection sensitivity, longer detection distance and better detection performance; the infrared detector based on the CMOS process can make the pixel size of the detector smaller, realize smaller chip area under the same array pixel, and is more beneficial to realizing the miniaturization of a chip; the infrared detector based on the CMOS process has the advantages of mature process production line, higher process control precision, better meeting design requirements, better product consistency, more contribution to circuit chip adjustment performance and more contribution to industrialized mass production.

The infrared detector comprises an effective pixel array and a mirror image pixel array, wherein the effective pixel array comprises a plurality of effective pixels arranged in an array, the mirror image pixel array comprises a plurality of mirror image pixels arranged in an array, the mirror image pixels are used for eliminating heat signals generated by the effective pixels except radiation absorption, and the heat signals comprise an environment background heat signal, a resistance heat signal and a substrate heat signal. Specifically, the effective pixel and the mirror image pixel both have resistance value changes due to heat radiation, when the mirror image pixel and the effective pixel are subjected to the same fixed radiation, the resistance values of the mirror image pixel and the effective pixel are the same, the temperature coefficients of the mirror image pixel and the effective pixel are also the same, the temperature drift amounts of the mirror image pixel and the effective pixel at the same ambient temperature are the same, and the changes of the mirror image pixel and the effective pixel are synchronous. Therefore, the difference between the image element and the effective element is that the image element does not respond to the infrared radiation signal, and the effective element responds to the infrared radiation signal, that is, the signal generated by the effective element is the superposition of the infrared radiation signal and the noise signal, and after the noise of the signal generated by the effective element is reduced, the infrared radiation signal of the target object can be obtained, so that the accuracy of the detection result is improved.

With reference to fig. 1 and fig. 2, for an effective pixel, the CMOS infrared sensing structure 2 includes a reflection layer 4, an infrared conversion structure 40, and a plurality of columnar structures 6 on the CMOS measurement circuitry 1, where the columnar structures 6 are located between the reflection layer 4 and the infrared conversion structure 40, the reflection layer 4 includes a reflection plate 41 and a support base 42, and the infrared conversion structure 40 is electrically connected to the CMOS measurement circuitry 1 through the columnar structures 6 and the support base 42.

Specifically, the columnar structure 6 is located between the reflective layer 4 and the infrared conversion structure 40 and used for supporting the infrared conversion structure 40 after a sacrificial layer on the CMOS measurement circuit system 1 is released, the sacrificial layer is located between the reflective layer and the infrared conversion structure 40, the columnar structure 6 is a metal structure, an electrical signal converted by the infrared conversion structure 40 through an infrared signal is transmitted to the CMOS measurement circuit system 1 through the corresponding columnar structure 6 and the corresponding supporting base 42, the CMOS measurement circuit system 1 processes the electrical signal to reflect temperature information, and non-contact infrared temperature detection of the infrared detector is achieved. The CMOS infrared sensing structure 2 outputs positive electrical signals and ground electrical signals through different electrode structures, and the positive electrical signals and the ground electrical signals are transmitted to the supporting base 42 electrically connected with the columnar structures 6 through different columnar structures 6, and fig. 1 and 2 schematically show that the direction is parallel to the CMOS measuring circuit system 1, and the CMOS infrared sensing structure 2 includes two columnar structures 6, one of the columnar structures 6 may be configured to transmit positive electrical signals, and the other columnar structure 6 may be configured to transmit ground electrical signals, and the CMOS infrared sensing structure 2 may also include four columnar structures 6, and two of the columnar structures 6 are configured to transmit positive electrical signals and ground electrical signals, respectively. In addition, the reflective layer 4 includes a reflective plate 41 and a supporting base 42, a portion of the reflective layer 4 is used as a dielectric for electrically connecting the columnar structure 6 with the CMOS measurement circuit system 1, that is, the supporting base 42, the reflective plate 41 is used for reflecting the infrared rays to the infrared conversion structure 40, and the secondary absorption of the infrared rays is realized by matching with a resonant cavity formed between the reflective layer 4 and the infrared conversion structure 40, so as to improve the infrared absorption rate of the infrared detector and optimize the infrared detection performance of the infrared detector.

Referring to fig. 1 and 2, the infrared conversion structure includes an absorption plate 10 and a plurality of beam structures 11, the absorption plate 10 is used for converting an infrared signal into an electrical signal and is electrically connected to the corresponding pillar structures 6 through the corresponding beam structures 11, and illustratively, the absorption plate 10 and the beam structures 11 may each include a thermosensitive layer 12, and a material constituting the thermosensitive layer 12 includes at least one of amorphous silicon, amorphous carbon, amorphous germanium, amorphous silicon germanium, titanium oxide, vanadium oxide, or titanium vanadium oxide. Specifically, the absorption plate 10 is used for converting an infrared signal into an electrical signal and electrically connecting the electrical signal with the corresponding columnar structure 6 through the corresponding beam structure 11, the absorption plate 10 includes a support layer 13, an electrode layer 14, a thermal sensitive layer 12 and a passivation layer 15, the beam structure 11 may also include the support layer 13, the electrode layer 14 and the passivation layer 15, the beam structure 11 may further include the thermal sensitive layer 12, the support layer 13 is located on one side of the passivation layer 15 close to the CMOS measurement circuit system 1, the electrode layer 14 and the thermal sensitive layer 12 are located between the support layer 13 and the passivation layer 15, the passivation layer 15 covers the electrode layer 14, the thermal sensitive layer 12 covers the beam structure 11, the thermal conductivity of the beam structure 11 is reduced by using the characteristic of small thermal conductivity of a thermal sensitive material such as amorphous silicon, amorphous germanium or amorphous silicon germanium, and the thermal sensitive layer 12 may replace the support layer 13 as a support material of the beam structure 11 and may also replace the passivation layer 15 as an electrode protection material of the beam structure 11.

Specifically, the supporting layer 13 is configured to support an upper film layer in the infrared conversion structure 40 after the sacrificial layer is released, the thermosensitive layer 12 is configured to convert an infrared temperature detection signal into an infrared detection electrical signal, the electrode layer 14 is configured to transmit the infrared detection electrical signal converted by the thermosensitive layer 12 to the CMOS measurement circuit system 1 through the beam structures 11 on the left and right sides, the two beam structures 11 transmit positive and negative signals of the infrared detection electrical signal respectively, a readout circuit in the CMOS measurement circuit system 1 implements non-contact infrared temperature detection through analysis of the acquired infrared detection electrical signal, and the passivation layer 15 is configured to protect the electrode layer 14 from oxidation or corrosion. The thermosensitive layer 12 may be located above the electrode layer 14, or may be located below the electrode layer 14. The absorption plate 10 can be arranged correspondingly, the thermosensitive layer 12 and the electrode layer 14 are located in a closed space formed by the supporting layer 13 and the passivation layer 15, so that the thermosensitive layer 12 and the electrode layer 14 in the absorption plate 10 can be protected, and the electrode layer 14 is located in a closed space formed by the supporting layer 13 and the passivation layer 15 correspondingly to the beam structure 11, so that the electrode layer 14 in the beam structure 11 can be protected.

Illustratively, the material constituting the heat sensitive layer 12 may include at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, titanium oxide, vanadium oxide, or titanium vanadium oxide, the material constituting the support layer 13 may include one or more of amorphous carbon, aluminum oxide, amorphous silicon, amorphous germanium, or amorphous silicon germanium, the material constituting the electrode layer 14 may include one or more of titanium, titanium nitride, tantalum nitride, titanium tungsten alloy, nickel chromium alloy, nickel silicon alloy, nickel, or chromium, and the material constituting the passivation layer 15 may include one or more of amorphous carbon, aluminum oxide, amorphous silicon, amorphous germanium, or amorphous silicon germanium. In addition, when the absorber plate 10 is disposed to include the thermal sensitive layer 12, and the thermal sensitive layer 12 is made of amorphous silicon, amorphous carbon, amorphous germanium or amorphous silicon germanium, the supporting layer 13 and/or the passivation layer 15 on the beam structure 11 may be replaced by the thermal sensitive layer 12, because the thermal conductivity of the amorphous silicon, amorphous germanium or amorphous silicon germanium is relatively small, which is beneficial to reducing the thermal conductivity of the beam structure 11, and further improves the infrared responsivity of the infrared detector.

With reference to fig. 1 and fig. 2, at least one layer of hermetic release isolation layer 3 may be included above the CMOS measurement circuitry 1, and the hermetic release isolation layer 3 is used to protect the CMOS measurement circuitry 1 from process influence during an etching process for manufacturing the CMOS infrared sensing structure 2. Optionally, a hermetic release barrier 3 is located at an interface between the CMOS measurement circuitry 1 and the CMOS infrared sensing structure 2 and/or in the CMOS infrared sensing structure 2, the hermetic release barrier 3 is used to protect the CMOS measurement circuitry 1 from erosion when performing a corrosion process to release the sacrificial layer, and the hermetic release barrier 3 is made of a CMOS process corrosion resistant material including at least one of silicon, germanium, silicon germanium alloy, amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride, or silicon carbonitride.

Fig. 2 exemplarily sets the hermetic release isolation layer 3 in the CMOS infrared sensing structure 2, the hermetic release isolation layer 3 may be, for example, located above the metal interconnection layer of the reflection layer 4, the hermetic release isolation layer 3 covers the columnar structure 6, and by setting the hermetic release isolation layer 3 to cover the columnar structure 6, on one hand, the hermetic release isolation layer 3 may be utilized as a support for the columnar structure 6, so as to improve the stability of the columnar structure 6, and ensure the electrical connection between the columnar structure 6 and the infrared conversion structure 40 as well as the support base 42. On the other hand, the airtight release insulating layer 3 coating the columnar structure 6 can reduce the contact between the columnar structure 6 and the external environment, reduce the contact resistance between the columnar structure 6 and the external environment, further reduce the noise of the pixel of the infrared detector and improve the detection sensitivity of the infrared detection sensor. In addition, the resonant cavity of the infrared detector is realized by releasing the vacuum cavity after the silicon oxide sacrificial layer is released, the reflecting layer 4 is used as the reflecting layer of the resonant cavity, the sacrificial layer is positioned between the reflecting layer 4 and the infrared conversion structure 40, and when at least one layer of closed release isolation layer 3 positioned on the reflecting layer 4 selects silicon, germanium, silicon-germanium alloy, amorphous silicon, amorphous germanium or amorphous silicon-germanium as one part of the resonant cavity, the reflecting effect of the reflecting layer is not influenced, the height of the resonant cavity can be reduced, the thickness of the sacrificial layer is further reduced, and the release difficulty of the sacrificial layer formed by silicon oxide is reduced. In addition, a closed release isolation layer 3 and the columnar structure 6 are arranged to form a closed structure, so that the CMOS measurement circuit system 1 is completely separated from the sacrificial layer, and the CMOS measurement circuit system 1 is protected.

Fig. 3 is a schematic cross-sectional structure diagram of an effective pixel in another infrared detector provided in the embodiment of the present disclosure. Unlike the infrared detector having the structure shown in fig. 2, in the infrared detector having the structure shown in fig. 3, the close release isolation layer 3 is located at the interface between the CMOS measurement circuitry 1 and the CMOS infrared sensing structure 2, for example, the close release isolation layer 3 is located between the reflective layer 4 and the CMOS measurement circuitry 1, that is, the close release isolation layer 3 is located below the metal interconnection layer of the reflective layer 4, and the support base 42 is electrically connected to the CMOS measurement circuitry 1 through a through hole penetrating through the close release isolation layer 3. Specifically, since the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are both formed by using a CMOS process, after the CMOS measurement circuit system 1 is formed, a wafer including the CMOS measurement circuit system 1 is formed by being manufactured and transferred to a next process for manufacturing the CMOS infrared sensing structure 2, since silicon oxide is a most commonly used dielectric material in the CMOS process, and silicon oxide is used as an insulating layer between metal layers on the CMOS circuit, if silicon oxide with a thickness of about 2um is corroded, the circuit will be seriously affected if no insulating layer is used as a barrier, so in order to release the silicon oxide of the sacrificial layer, the silicon oxide medium on the CMOS measurement circuit system will not be corroded, after the CMOS measurement circuit system 1 is formed, the closed release insulating layer 3 is formed on the CMOS measurement circuit system 1, the CMOS measurement circuit system 1 is protected by using the closed release insulating layer 3, and in order to ensure the electrical connection between the support base 42 and the CMOS measurement circuit system 1, after the closed release insulating layer 3 is formed, a through hole is formed in an etching process in a region corresponding to the closed release insulating layer 3, and the electrical connection between the support base 42 and the CMOS measurement circuit system 1 is realized. In addition, the closed release isolation layer 3 and the support base 42 are arranged to form a closed structure, so that the CMOS measurement circuit system 1 is completely separated from the sacrificial layer, and the CMOS measurement circuit system 1 is protected.

Fig. 4 is a schematic cross-sectional structure diagram of an effective pixel in another infrared detector provided in an embodiment of the present disclosure. Different from the infrared detector with the structure shown in fig. 2 and 3, in the infrared detector with the structure shown in fig. 4, the interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 is provided with at least one layer of closed release insulating layer 3, that is, at least one layer of closed release insulating layer 3 is provided between the reflection layer 4 and the CMOS measurement circuit system 1, and at least one layer of closed release insulating layer 3 is provided on the reflection layer 4, the effect is the same as above, and the description is omitted here.

Illustratively, the material constituting the hermetic release barrier layer 3 may include at least one of silicon, germanium, a silicon-germanium alloy, amorphous silicon, amorphous germanium, amorphous silicon-germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride, or silicon carbonitride, and the thickness of the hermetic release barrier layer 3 is equal to or greater than 100A and equal to or less than 2000A. Specifically, silicon, germanium, a silicon-germanium alloy, amorphous silicon, amorphous germanium, amorphous silicon-germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride, and silicon carbonitride are all CMOS process corrosion resistant materials, i.e., these materials are not corroded by the sacrificial layer release agent, so the hermetic release barrier layer 3 can be used to protect the CMOS measurement circuitry 1 from corrosion when the corrosion process is performed to release the sacrificial layer. In addition, the closed release isolation layer 3 covers the CMOS measurement circuit system 1, and the closed release isolation layer 3 can also be used to protect the CMOS measurement circuit system 1 from process influence during the etching process for manufacturing the CMOS infrared sensing structure 2. In addition, when at least one layer of airtight release isolation layer 3 is arranged on the reflection layer 4, the material for forming the airtight release isolation layer 3 is arranged to include at least one of silicon, germanium, silicon-germanium alloy, amorphous silicon, amorphous germanium, amorphous silicon-germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride or silicon carbonitride, the thickness of the first dielectric layer is greater than 100A and less than or equal to 2000A, when the airtight release isolation layer 3 is arranged to improve the stability of the columnar structure 6, the airtight release isolation layer 3 hardly influences the reflection process in the resonant cavity, the influence of the airtight release isolation layer 3 on the reflection process of the resonant cavity can be avoided, and further the influence of the airtight release isolation layer 3 on the detection sensitivity of the infrared detector is avoided.

With reference to fig. 1 to 4, a CMOS fabrication process of the CMOS infrared sensing structure 2 includes a metal interconnection process, a via process and an RDL process, the CMOS infrared sensing structure 2 includes at least two metal interconnection layers, at least two dielectric layers and a plurality of interconnection vias, the dielectric layers include at least one sacrificial layer and one heat sensitive dielectric layer, the heat sensitive dielectric layer includes at least a heat sensitive layer 12, and may further include a supporting layer 13 and/or a passivation layer 15, and the metal interconnection layers include at least a reflective layer 4 and an electrode layer 14; the thermal sensitive medium layer comprises a thermal sensitive material with a resistance temperature coefficient larger than a set value, the resistance temperature coefficient can be larger than or equal to 0.015/K, for example, the thermal sensitive material with the resistance temperature coefficient larger than the set value forms a thermal sensitive layer 12 in the thermal sensitive medium layer, the thermal sensitive medium layer is used for converting temperature change corresponding to infrared radiation absorbed by the thermal sensitive medium layer into resistance change, and further converting an infrared target signal into a signal capable of realizing electric reading through the CMOS measuring circuit system 1.

Specifically, the metal interconnection process is used for realizing the electrical connection of an upper metal interconnection layer and a lower metal interconnection layer, the through hole process is used for forming an interconnection through hole for connecting the upper metal interconnection layer and the lower metal interconnection layer, the RDL process is a rewiring layer process, specifically, a layer of metal is newly distributed above the top metal of the circuit and is electrically connected with the top metal of the circuit through a tungsten column, the reflection layer 4 in the infrared detector can be prepared on the top metal of the CMOS measurement circuit system 1 by adopting the RDL process, and the support base 42 on the reflection layer 4 is electrically connected with the top metal of the CMOS measurement circuit system 1. In addition, the heat-sensitive dielectric layer comprises a heat-sensitive material with a resistance temperature coefficient larger than a set value, and the resistance temperature coefficient can be larger than or equal to 0.015/K, so that the detection sensitivity of the infrared detector can be improved. In addition, as shown in fig. 2, the CMOS manufacturing process of the CMOS measurement circuit system 1 may also include a metal interconnection process and a via process, the CMOS measurement circuit system 1 includes metal interconnection layers 101, dielectric layers 102 and a silicon substrate 103 at the bottom, which are arranged at intervals, and the upper and lower metal interconnection layers 101 are electrically connected through vias 104.

Referring to fig. 1 to 4, the CMOS infrared sensing structure 2 includes a resonant cavity formed by a reflective layer 4 and a heat sensitive dielectric layer, a suspended microbridge structure for controlling heat transfer, and a pillar structure 6 having electrical connection and support functions, and the CMOS measurement circuitry 1 is used for measuring and processing an array resistance value formed by one or more CMOS infrared sensing structures 2 and converting an infrared signal into an image electrical signal.

Specifically, the resonant cavity may be formed by a cavity between the reflective layer 4 and the absorbing plate 10, for example, infrared light is reflected back and forth in the resonant cavity through the absorbing plate 10 to improve the detection sensitivity of the infrared detector, and due to the arrangement of the columnar structure 6, the beam structure 11 and the absorbing plate 10 form a suspended micro-bridge structure for controlling heat transfer, and the columnar structure 6 is electrically connected to the supporting base 42 and the corresponding beam structure 11 and is used for supporting the infrared conversion structure 40 on the columnar structure 6.

Fig. 5 is a schematic structural diagram of a CMOS measurement circuit system according to an embodiment of the present disclosure. With reference to fig. 1 to 5, the cmos measurement circuit system 1 includes a bias generation circuit 7, a column-level analog front-end circuit 8 and a row-level circuit 9, an input end of the bias generation circuit 7 is connected to an output end of the row-level circuit 9, an input end of the column-level analog front-end circuit 8 is connected to an output end of the bias generation circuit 7, the row-level circuit 9 includes row-level mirror image elements Rsm and row selection switches K1, and the column-level analog front-end circuit 8 includes blind image elements RD; the row-level circuit 9 is distributed in each pixel, selects a signal to be processed according to a row strobe signal of the timing sequence generating circuit, and outputs a current signal to the column-level analog front-end circuit 8 under the action of the bias generating circuit 7 to perform current-voltage conversion output; the row stage circuit 9 outputs a third bias voltage VRsm to the bias generation circuit 7 when being controlled by the row selection switch K1 to be gated, the bias generation circuit 7 outputs a first bias voltage V1 and a second bias voltage V2 according to an input constant voltage and the third bias voltage VRsm, and the column stage analog front-end circuit 8 obtains two currents according to the first bias voltage V1 and the second bias voltage V2, performs transimpedance amplification on a difference between the two generated currents, and outputs the amplified current as an output voltage.

Specifically, the row-level circuit 9 includes a row-level mirror image element Rsm and a row selection switch K1, and the row-level circuit 9 is configured to generate a third bias voltage VRsm according to a gating state of the row selection switch K1. Illustratively, the row-level image elements Rsm may be subjected to a shading process, so that the row-level image elements Rsm are subjected to a fixed radiation of a shading sheet having a temperature constantly equal to the substrate temperature, the row selection switch K1 may be implemented by a transistor, the row selection switch K1 is closed, and the row-level image elements Rsm are connected to the bias generation circuit 7, that is, the row-level circuit 9 outputs the third bias voltage VRsm to the bias generation circuit 7 when being controlled by the row selection switch K1 to be turned on. The bias generating circuit 7 may include a first bias generating circuit 71 and a second bias generating circuit 72, the first bias generating circuit 71 being configured to generate a first bias voltage V1 according to an input constant voltage, which may be, for example, a positive power supply signal with a constant voltage. The second bias generating circuit 72 may include a bias control sub-circuit 721 and a plurality of gate-driving sub-circuits 722, the bias control sub-circuit 721 controlling the gate-driving sub-circuits 722 to generate the corresponding second bias voltages V, respectively, according to the third bias voltage VRsm.

The column-level analog front-end circuit 8 includes a plurality of column control sub-circuits 81, the column control sub-circuits 81 are disposed in correspondence with the gate driving sub-circuits 722, and exemplarily, the column control sub-circuits 81 may be disposed in one-to-one correspondence with the gate driving sub-circuits 722, and the gate driving sub-circuits 722 are configured to provide the second bias voltage V2 to the corresponding column control sub-circuits 81 according to their own gate states. For example, it may be set that when the gate driving sub-circuit 722 is gated, the gate driving sub-circuit 722 supplies the second bias voltage V2 to the corresponding column control sub-circuit 81; when the gate driving sub-circuit 722 is not gated, the gate driving sub-circuit 722 stops supplying the second bias voltage V2 to the corresponding column control sub-circuit 81.

The column-level analog front-end circuit 8 comprises an effective pixel RS and a blind pixel RD, the column control sub-circuit is used for generating a first current I1 according to a first bias voltage V1 and the blind pixel RD, generating a second current I2 according to a second bias voltage V2 and the effective pixel RS, performing transimpedance amplification on a difference value of the first current I1 and the second current I2 and outputting the difference value, and the row-level image pixel Rsm and the effective pixel RS have the same temperature drift amount under the same environment temperature.

Illustratively, the row-level image elements Rsm are thermally insulated from the CMOS measurement circuit system 1 and are shielded from light, and the row-level image elements Rsm are subjected to fixed radiation from a shield whose temperature is constantly equal to the substrate temperature. The absorption plate 10 of the active pixel RS is thermally insulated from the CMOS measurement circuitry 1 and the active pixel RS receives external radiation. The absorbing plates 10 of the row-level mirror image elements Rsm and the effective elements RS are thermally insulated from the CMOS measuring circuit system 1, so that the row-level mirror image elements Rsm and the effective elements RS have a self-heating effect.

When the row selection switch K1 is used for gating the corresponding row-level mirror image element Rsm, the resistance value of the row-level mirror image element Rsm and the resistance value of the effective pixel RS are changed due to joule heat, but when the row-level mirror image element Rsm and the effective pixel RS are subjected to the same fixed radiation, the resistance value of the row-level mirror image element Rsm and the resistance value of the effective pixel RS are the same, the temperature coefficients of the row-level mirror image element Rsm and the temperature coefficient of the effective pixel RS are the same, the temperature drift amounts of the row-level mirror image element Rsm and the effective pixel RS are the same under the same environmental temperature, the change of the row-level mirror image element Rsm and the effective pixel RS are synchronous, the resistance value change of the row-level mirror image element Rsm and the effective pixel RS under the same environmental temperature is favorably compensated, and the stable output of the reading circuit is realized.

In addition, by arranging the second bias generating circuit 7 to include a bias control sub-circuit 721 and a plurality of gate driving sub-circuits 722, the bias control sub-circuit 721 is configured to control the gate driving sub-circuits 722 to generate corresponding second bias voltages V2 respectively according to the row control signal, so that each row of pixels has one path to drive the entire columns of pixels in the row separately, the requirement for the second bias voltages V2 is reduced, that is, the driving capability of the bias generating circuit 7 is improved, and the readout circuit is advantageously used to drive a larger-scale infrared detector pixel array. In addition, the specific detailed operation principle of the CMOS measurement circuit system 1 is well known to those skilled in the art and will not be described herein.

Optionally, the mirror image element may be set to implement a mirror image effect by at least one of a mode of destroying the resonant cavity, a mode of changing the height of the resonant cavity, or a mode of directly reflecting target infrared radiation, and the following description is made with respect to a specific structure and a working principle of the mirror image element:

fig. 6 is a schematic perspective exploded view of an infrared detector mirror image element 100 according to an embodiment of the present disclosure, fig. 7 is a schematic perspective exploded view of another infrared detector mirror image element according to an embodiment of the present disclosure, and fig. 8 is a schematic perspective exploded view of another infrared detector mirror image element according to an embodiment of the present disclosure, in combination with fig. 6 to 8, the infrared detector mirror image element 100 includes a CMOS measurement circuit system 101 and a CMOS infrared sensing structure located on the CMOS measurement circuit system 101, and the CMOS measurement circuit system 101 and the CMOS infrared sensing structure are both prepared by using a CMOS process. The CMOS infrared sensing structure comprises a reflecting layer 110 and an infrared conversion structure 120 which are positioned on a CMOS measuring circuit system 101, wherein the reflecting layer 110 at least comprises a supporting base 111, the infrared conversion structure 120 is electrically connected with the CMOS measuring circuit system 101 through the supporting base 111, the infrared conversion structure 120 comprises a thermosensitive layer, and a material forming the thermosensitive layer comprises at least one of amorphous silicon, titanium oxide, vanadium oxide or titanium vanadium oxide.

A resonant cavity is not formed between the CMOS measurement circuit system 101 and the infrared conversion structure 120, that is, the mirror image element 100 implements a mirror image effect by destroying the resonant cavity, or the resonant cavity between the CMOS measurement circuit system 101 and the infrared conversion structure 120 cannot reflect infrared light to the infrared conversion structure 120, that is, the mirror image element 100 implements a mirror image effect by changing the height of the resonant cavity, or the infrared conversion structure 120 reflects infrared light, that is, the mirror image element 100 implements a mirror image effect by directly reflecting target infrared radiation.

Specifically, the CMOS measurement circuitry 101 includes a readout circuit for reading and processing an electrical signal, and a reflective layer 110 is disposed on one side of the CMOS measurement circuitry 101, and the reflective layer 110 includes a supporting base 111. The CMOS measurement circuitry 101 and the infrared conversion structure 120 may not form a resonant cavity therebetween as shown in fig. 6, or the CMOS measurement circuitry 101 and the infrared conversion structure 120 may not reflect infrared light to the infrared conversion structure 120 as shown in fig. 7, or the infrared conversion structure 120 reflects infrared light as shown in fig. 8, and in summary, the infrared conversion structure 120 may not receive resonant light.

The infrared conversion structure 120 includes a thermosensitive layer capable of absorbing infrared radiation energy of a target object and converting a temperature signal into an electrical signal. Since the infrared conversion structure 120 fails to receive the resonance light, the infrared conversion structure 120 can absorb little infrared radiation energy, and the infrared conversion structure 120 may be considered to be unresponsive to an infrared radiation signal. At this time, the electrical signal generated by the infrared conversion structure 120 is originated from temperature noise such as thermal radiation of the CMOS measurement circuit system 101 and thermal radiation of the external environment, that is, the signal generated by the infrared conversion structure 120 is a noise signal, and the electrical signal generated by the image pixel 100 is a noise signal, so that the noise signal of the infrared detector can be acquired by the image pixel 100.

According to the CMOS infrared sensing structure, the reflecting layer and the infrared conversion structure are located on the CMOS measuring circuit system, the reflecting layer at least comprises the supporting base, the infrared conversion structure is electrically connected with the CMOS measuring circuit system through the supporting base, no resonant cavity is formed between the CMOS measuring circuit system and the infrared conversion structure, or the resonant cavity between the CMOS measuring circuit system and the infrared conversion structure cannot reflect infrared light to the infrared conversion structure, or the infrared conversion structure reflects infrared light, the infrared conversion structure cannot receive resonant light, so that the infrared conversion structure does not respond to infrared radiation signals, at the moment, electric signals generated by the infrared conversion structure are derived from temperature noise, therefore, noise signals of the infrared detector can be acquired through the mirror image element 100, more accurate detection signals can be acquired accordingly, and accuracy of detection results is improved.

The CMOS measurement circuit system 101 and the CMOS infrared sensing structure can be both prepared by adopting a CMOS process, namely the mirror image pixel 100 can be prepared by adopting the CMOS process, meanwhile, the effective pixel in the infrared detector is prepared by adopting the CMOS, the infrared detector can realize full CMOS process flow, namely the integrated manufacture of the infrared detector can be realized by utilizing the CMOS process, the manufacture yield and the productivity of the infrared detector can be improved, and the manufacture cost of the infrared detector is reduced.

The thermosensitive layer is prepared from at least one of amorphous silicon, titanium oxide, vanadium oxide or titanium vanadium oxide, and the amorphous silicon, the titanium oxide, the vanadium oxide or the titanium vanadium oxide are common materials for CMOS (complementary metal oxide semiconductor) process, namely the amorphous silicon, the titanium oxide, the vanadium oxide or the titanium vanadium oxide are compatible with the CMOS process, so that the thermosensitive layer can be prepared by utilizing the CMOS process, and the full CMOS process of the infrared detector can be ensured.

Alternatively, as shown in fig. 6, no resonant cavity is formed between the CMOS measurement circuitry 101 and the infrared conversion structure 120, the reflective layer 110 further includes a reflective plate 112, the CMOS infrared sensing structure further includes a first dielectric layer 131 located between the reflective layer 110 and the infrared conversion structure 120, and the first dielectric layer 131 is disposed in contact with the reflective layer 110 and the infrared conversion structure 120, respectively.

Specifically, a reflection layer 110 is formed on the CMOS measurement circuitry 101, the reflection layer 110 is etched to form a support base 111 and a reflection plate 112, a first dielectric layer 131 is formed on the reflection layer 110, and an infrared conversion structure 120 is formed on the first dielectric layer 131. The reflection plate 112 is used for reflecting infrared light for the second time, the infrared conversion structure 120 is electrically connected to the CMOS measurement circuit system 101 through the supporting base 111, so that a distance between the infrared conversion structure 120 and the reflection plate 112 is reduced, the reflection plate 112 cannot reflect infrared light to the infrared conversion structure 120, and the infrared conversion structure 120 cannot receive a light beam reflected by the reflection plate 112, so that a resonant cavity is not formed between the infrared conversion structure 120 and the CMOS measurement circuit system 101. Reduce the distance between infrared conversion structure 120 and reflecting plate 112, reduced infrared detector mirror image pixel 100's thickness promptly, can reserve great space in infrared detector mirror image pixel 100's top, utilize this space can prepare the getter to effectively utilize infrared detector mirror image pixel 100's space, avoid occupying extra space, be favorable to infrared detector to the miniaturization development.

The first dielectric layer 131 is located between the reflection layer 110 and the infrared conversion structure 120, the first dielectric layer 131 is respectively arranged in contact with the reflection layer 110 and the infrared conversion structure 120, and as for the mirror image pixel 100, no sacrificial layer needs to be formed between the reflection layer 110 and the infrared conversion structure 131, so that the influence of the residual sacrificial layer on the mirror image pixel 100 of the infrared detector can be avoided; for the effective pixel, the first dielectric layer 131 is located in the resonant cavity, and the refractive index of the first dielectric layer 131 is greater than that of vacuum, so that the optical path of the resonant cavity can be increased through the first dielectric layer 131, the actual height of the resonant cavity can be reduced, the thickness of the sacrificial layer is reduced, and the release difficulty of the sacrificial layer is reduced. In addition, the supporting base 111 is used as a structure for electrically connecting the readout circuit and the CMOS infrared sensing structure, and the first dielectric layer 131 covers the dielectric layer located below the first dielectric layer 131 and the supporting base 111, so as to protect the lower dielectric layer and the CMOS measurement circuit system 101.

Alternatively, as shown in fig. 6, the infrared conversion structure 120 includes an absorption plate 121 and a plurality of beam structures 122, the absorption plate 121 is used to convert an infrared signal into an electrical signal and is electrically connected to the corresponding support base 111 through the corresponding beam structure 122, and the absorption plate 121 and the beam structure 122 are located at the same layer.

Illustratively, as shown in fig. 6, the infrared conversion structure 120 includes a plurality of beam structures 122, each beam structure 122 being electrically connected to a corresponding support base 111. The absorption plate 121 serves to absorb infrared radiation energy of a target object and convert the infrared radiation energy into an effective electrical signal, and the beam structure 122 transfers the effective electrical signal generated by the absorption plate 121 to a readout circuit through the support base 111, while the beam structure 122 is also a thermally conductive member for heat dissipation. In addition, the absorption plate 121 is also used to absorb energy of the temperature noise radiation and convert the energy of the temperature noise radiation into a noise signal, and the beam structure 122 transfers a noise electrical signal generated by the absorption plate 121 to a readout circuit through the support base 111 to enable detection of the noise signal of the infrared detector. According to the embodiment of the disclosure, the absorption plate 121 and the beam structure 122 are arranged on the same layer, and no mask plate needs to be respectively manufactured on the absorption plate 121 and the beam structure 122, so that the number of manufacturing processes is reduced, the process flow of the infrared detector can be simplified, the production cost of the infrared detector is saved, and the production efficiency is improved.

Fig. 9 is a schematic perspective exploded view of a mirror image pixel of another infrared detector provided in the embodiment of the present disclosure. As shown in fig. 9, the infrared conversion structure 120 includes an absorption plate 121 and a plurality of beam structures 122, the absorption plate 121 is used for converting an infrared signal into an electrical signal and is electrically connected to the corresponding support base 111 through the corresponding beam structure 122, and the absorption plate 121 is located on a side of the beam structure 122 adjacent to the CMOS measurement circuitry 101.

Illustratively, as shown in fig. 9, a method for manufacturing an infrared detector mirror image cell 100 may include forming a reflective layer 110 on a CMOS measurement circuitry 101, etching the reflective layer 110 to form a reflective plate 112 and a supporting base 111, and sequentially forming a first dielectric layer 131, an absorption plate 121, and a beam structure 122 on the reflective layer 110, such that the absorption plate 121 and the beam structure 122 are located at different layers and at a side of the beam structure 122 adjacent to the CMOS measurement circuitry 101.

This disclosed embodiment sets up in different layers through absorbing board 121 and beam structure 122, and the area of beam structure 122 can not lead to the fact the influence to absorbing board 121's area, is favorable to realizing absorbing board 121 of bigger area to can improve the radiant quantity of the absorbed temperature noise of absorbing board 121, can improve infrared detector's radiant absorptance promptly, thereby can acquire more accurate noise signal, do benefit to improving infrared detector's detection performance. In addition, the size of the infrared detector mirror image pixel 100 structure 100 is no longer limited by the sum of the area of the absorption plate 121 and the area of the beam structure 122, so that the size of the infrared detector mirror image pixel 100 can be reduced, and the development of miniaturization of the infrared detector is facilitated.

Fig. 10 is a schematic perspective view of a mirror image element of an infrared detector provided in an embodiment of the disclosure, and as shown in fig. 10, a resonant cavity is not formed between the CMOS measurement circuitry 101 and the infrared conversion structure 120. The CMOS infrared sensing structure further includes a plurality of pillar structures 140 located between the reflective layer 110 and the infrared conversion structure 120, and the infrared conversion structure 120 is electrically connected to the CMOS measurement circuitry 101 through the pillar structures 140 and the support base 111. The reflective plates disposed on the same layer as the support base 111 are etched away, wherein the reflective plates are used for reflecting the infrared light to the infrared conversion structure 120.

Specifically, a reflective layer 110 is disposed on one side of the CMOS measurement circuitry 101, and the reflective layer 110 includes a supporting base 111 and a reflective plate for reflecting infrared light twice and reflecting the infrared light to the infrared conversion structure 120, and the reflective plate is etched away by an etching process, so that the reflective layer 110 without the reflective plate is formed, as shown in fig. 10. I.e., the reflective layer 110 is not capable of reflecting infrared light, no resonant cavity is formed between the CMOS measurement circuitry 101 and the infrared converting structure 120.

It should be noted that the infrared conversion structure 120 may be a single-layer structure, that is, the beam structure 122 and the absorption plate 121 are located on the same layer, and the infrared conversion structure 120 is electrically connected to the CMOS measurement circuitry 101 through the pillar structure 140 and the supporting base 111 in sequence, as shown in fig. 10. In other embodiments, the infrared conversion structure 120 may also be a double-layer structure, i.e. the beam structure 122 and the absorbing plate 121 are located at different layers, the absorbing plate 121 is located at the side of the beam structure 122 away from the CMOS measurement circuitry 101, and the pillar structure 140 is located between the beam structure 122 and the reflective layer 110, as shown in fig. 10.

Alternatively, as shown in fig. 7, the resonant cavity between the CMOS measurement circuitry 101 and the infrared conversion structure 120 cannot reflect infrared light to the infrared conversion structure 120. The CMOS infrared sensing structure further includes a plurality of pillar structures 140 located between the reflection layer 110 and the infrared conversion structure 120, the infrared conversion structure 120 is electrically connected to the CMOS measurement circuitry 101 through the pillar structures 140 and the supporting base 111, and the reflection layer 110 further includes a reflection plate 112. The CMOS infrared sensing structure further includes at least one second dielectric layer 132 located on the reflection layer 110, the second dielectric layer 132 covers the columnar structure 140, the material forming the second dielectric layer 132 includes at least one of amorphous carbon, silicon carbide, aluminum oxide or silicon nitride, and the thickness of the second dielectric layer 132 is greater than or equal to 1 micrometer and less than or equal to 2 micrometers.

Specifically, a reflective layer 110 is provided on one side of the CMOS measurement circuitry 101, and the reflective layer 110 includes a supporting base 111 and a reflective plate 112, as shown in fig. 7. The reflection plate 112 is used for reflecting the infrared light twice and reflecting the infrared light to the infrared conversion structure 120, and a resonant cavity is formed between the reflection plate 112 and the infrared conversion structure 120. The second dielectric layer 132, which may be made of at least one material of amorphous carbon, silicon carbide, aluminum oxide, silicon carbonitride or silicon nitride, is located on a side of the reflective layer 110 away from the CMOS measurement circuitry 101, and covers the reflective layer 110. The refractive index of the amorphous carbon, silicon carbide, aluminum oxide, silicon carbonitride or silicon nitride material is greater than the refractive index of vacuum, the second dielectric layer 132 changes the optical path in the resonant cavity, and meanwhile, the thickness of the second dielectric layer 132 is set to be greater than or equal to 1 micrometer and less than or equal to 2 micrometers, so that the condition that the resonant cavity generates resonance is destroyed, and infrared light cannot generate resonance in the resonant cavity, that is, the resonant cavity between the CMOS measurement circuit system 101 and the infrared conversion structure 120 cannot reflect the infrared light to the infrared conversion structure 120.

The amorphous carbon, silicon carbide, aluminum oxide, silicon carbonitride and silicon nitride are all materials commonly used in CMOS processes, i.e., the amorphous carbon, silicon carbide, aluminum oxide, silicon carbonitride and silicon nitride are compatible with CMOS processes, so that the second dielectric layer 132 can be formed using CMOS processes. For example: an amorphous carbon layer is deposited on one side of the reflective layer 110, and then etched to form an amorphous carbon layer with a specific pattern, i.e., a second dielectric layer 132 is formed.

The second dielectric layer 132 covers the reflecting layer 110, the reflecting layer 110 comprises a supporting base 111 and a reflecting plate 112, the supporting base 111 is used as a structure for electrically connecting the reading circuit with the CMOS infrared sensing structure, and the second dielectric layer 132 covers the reflecting plate 112 and the dielectric layer which are positioned below the second dielectric layer 132, so that the reflecting plate 112, the lower dielectric layer and the CMOS measuring circuit system 101 are protected; meanwhile, the second dielectric layer 132 covers the columnar structure 140, and can serve as a supporting structure of the columnar structure 140, so that the mechanical strength of the columnar structure 140 is enhanced, the structural stability of the mirror image pixel 100 is improved, and the structural stability and the impact resistance of the infrared detector can be improved.

For a detector full CMOS process, the second dielectric layer 132 can be formed in both the active and mirror image pixels 100 using the same process. For the effective pixel, the second dielectric layer 132 is located in the resonant cavity, and the refractive index of the second dielectric layer 132 is greater than the refractive index of vacuum, so that the optical path of the resonant cavity can be increased through the second dielectric layer 132, the actual height of the resonant cavity can be reduced, the thickness of the sacrificial layer is reduced, and the release difficulty of the sacrificial layer is reduced.

It should be noted that the infrared conversion structure 120 may be a single-layer structure, that is, the beam structure 122 and the absorption plate 121 are located on the same layer, and the infrared conversion structure 120 is electrically connected to the CMOS measurement circuitry 101 through the pillar structure 140 and the supporting base 111 in sequence, as shown in fig. 7. In other embodiments, the infrared conversion structure 120 may also be a double-layer structure, i.e., the beam structure 122 and the absorbing plate 121 are located on different layers, the absorbing plate 121 is located on the side of the beam structure 122 away from the CMOS measurement circuitry 101, and the pillar structure 140 is located between the beam structure 122 and the reflective layer 110, as shown in fig. 12.

Fig. 13 is a schematic perspective view of a mirror image element of another infrared detector provided in an embodiment of the disclosure, and as shown in fig. 13, a resonant cavity between the CMOS measurement circuitry 101 and the infrared conversion structure 120 cannot reflect infrared light to the infrared conversion structure 120. The CMOS infrared sensing structure further includes a plurality of pillar structures 140 located between the reflection layer 110 and the infrared conversion structure 120, the infrared conversion structure 120 is electrically connected to the CMOS measurement circuitry 101 through the pillar structures 140 and the supporting base 111, and the reflection layer 110 further includes a reflection plate 112. The CMOS infrared sensing structure 102 further includes a metal structure 150, the metal structure 150 is located between the infrared conversion structure 120 and the reflective layer 110, and at least a portion of the reflective plate 112 is located within an orthographic projection area of the metal structure 150.

Specifically, a reflective layer 110 is provided on one side of the CMOS measurement circuitry 101, and the reflective layer 110 includes a supporting base 111 and a reflective plate 112, as shown in fig. 13. The reflection plate 112 is used for reflecting the infrared light twice and reflecting the infrared light to the infrared conversion structure 120, and a resonant cavity is formed between the reflection plate 112 and the infrared conversion structure 120. The metal structure 150 is located between the infrared conversion structure 120 and the reflection layer 110, the metal structure 150 covers at least a part of the reflection plate 112, and infrared light passing through the infrared conversion structure 120 enters the metal structure 150 and is reflected by the metal structure 150 to the infrared conversion structure 120, and at this time, the reflection plate 112 cannot receive the infrared light, so that the height of the resonant cavity is changed, the condition that the resonant cavity generates resonance is damaged, and the infrared light cannot generate resonance in the resonant cavity, that is, the resonant cavity between the CMOS measurement circuit system 101 and the infrared conversion structure 120 cannot reflect the infrared light to the infrared conversion structure 120. The metal structure 150 is located on one side of the infrared conversion structure 120 close to the CMOS measurement circuit system 101, and in the process of simultaneously preparing the effective pixel and the mirror image pixel 100, by adding a process preparation process and matching with a corresponding mask, the metal structure 150 is added inside the mirror image pixel 100, and the effective pixel has no added metal structure 150, so that the two pixel structures are synchronously realized, and the process flow can be simplified.

It should be noted that the infrared conversion structure 120 may be a single-layer structure, that is, the beam structure 122 and the absorption plate 121 are located on the same layer, and the infrared conversion structure 120 is electrically connected to the CMOS measurement circuitry 101 through the pillar structure 140 and the supporting base 111 in sequence, as shown in fig. 13. In other embodiments, the infrared conversion structure 120 may also be a double-layer structure, i.e. the beam structure 122 and the absorbing plate 121 are located at different layers, the absorbing plate 121 is located at the side of the beam structure 122 away from the CMOS measurement circuitry 101, and the pillar structure 140 is located between the beam structure 122 and the reflective layer 110, as shown in fig. 14.

Fig. 15 is a schematic view of a film structure of an infrared detector mirror image pixel provided in an embodiment of the present disclosure, and fig. 16 is a schematic view of a film structure of another infrared detector mirror image pixel provided in an embodiment of the present disclosure, and in combination with fig. 15 and fig. 16, a metal structure 150 is disposed in contact with a reflective plate 112, or at least one dielectric layer is disposed between the metal structure 150 and the reflective plate 112.

For example, taking the infrared detector mirror image pixel 100 shown in fig. 15 as an example, the method for manufacturing the infrared detector mirror image pixel 100 may include forming a reflective layer 110 on a CMOS measurement circuitry 101 by using a CMOS process, and etching the reflective layer 110 to form a supporting base 111 and a reflective plate 112. Depositing a dielectric layer on the reflective layer 110, etching the dielectric layer to form a through hole exposing the reflective layer 110, filling a metal material in the through hole to form a metal structure 150 as shown in fig. 15, wherein the metal structure 150 is in direct contact with the reflective layer 110. The metal structure 150 and the dielectric layer are arranged on the same layer, a sacrificial layer and a columnar structure 140 are sequentially formed on the dielectric layer and the metal structure 150, the columnar structure 140 faces the supporting base 111 and is electrically connected with the supporting base 111, and the infrared detector mirror image pixel 100 shown in fig. 15 is formed after the sacrificial layer is released.

The metal structures 150 can be distributed in the area opposite to the reflective plate 112 and the area opposite to the supporting base 111 as shown in fig. 15, wherein the metal structure 150 corresponding to the reflective plate 112 is used for reflecting infrared light, and the metal structure 150 corresponding to the supporting base 111 is used for electrically connecting the pillar structure 140 and the supporting base 111. The metal structure 150 corresponding to the supporting base 111 can electrically connect the columnar structure 140 and the supporting base 111, and can reduce the height of the columnar structure 140, so that the thickness of a film layer for forming the columnar structure 140 is smaller, the thickness of the film layer is easier to control in the process of preparation, the process difficulty is reduced, and the consistency of products is improved. In addition, the metal structure 150 is in contact with the reflection plate 112, so that the number of film layers in the image element 100 of the infrared detector can be reduced, the number of process preparation processes is reduced, the process time of the infrared detector is saved, and the production efficiency of the infrared detector is improved.

In other embodiments, the metal structures 150 can also be distributed in the area directly opposite to the reflective plate 112 as shown in fig. 17, and the metal structures 150 are formed to reflect infrared light. A dielectric layer is sequentially arranged on the supporting base 111, the surface of one side of the dielectric layer, which is far away from the CMOS measurement circuit system 101, is flush with the surface of one side of the metal structure 150, which is far away from the CMOS measurement circuit system 101, a sacrificial layer (not shown in the figure) and a columnar structure 140 are sequentially formed on the dielectric layer and the metal structure 150, the columnar structure 140 is over against the supporting base 111 and is electrically connected with the supporting base 111, and the infrared detector mirror image pixel 100 shown in fig. 17 is formed after the sacrificial layer is released.

Illustratively, taking the infrared detector mirror image pixel 100 shown in fig. 16 as an example, the method for manufacturing the infrared detector mirror image pixel 100 may include forming a reflective layer 110 on a CMOS measurement circuit system 101 by using a CMOS process, etching the reflective layer 110 to form a supporting base 111 and a reflective plate 112, sequentially depositing a lower dielectric layer and an upper dielectric layer on the reflective layer 110, etching the upper dielectric layer to expose the lower dielectric layer, and filling a metal material in the etched through hole to form a metal structure 150 shown in fig. 16. The surface of the upper dielectric layer away from the CMOS measurement circuit system 101 is flush with the surface of the metal structure 150 away from the CMOS measurement circuit system 101, a sacrificial layer and a columnar structure 140 are sequentially formed on the upper dielectric layer and the metal structure 150, the columnar structure 140 faces the supporting base 111 and is electrically connected with the supporting base 111, and the infrared detector mirror image pixel 100 shown in fig. 11 is formed after the sacrificial layer is released. For the full CMOS process of the detector, the dielectric layer is positioned in the mirror image pixel 100 and the effective pixel of the infrared detector, and for the effective pixel, the dielectric layer is positioned in the resonant cavity of the effective pixel, and the refractive index of the dielectric layer is larger than that of vacuum, so that the optical path of the resonant cavity can be increased through the dielectric layer, the actual height of the resonant cavity can be reduced, the thickness of the sacrificial layer is reduced, and the release difficulty of the sacrificial layer is reduced. Fig. 16 only shows an exemplary dielectric layer disposed between the metal structure 150 and the reflective plate 112, and in practical applications, more dielectric layers may be disposed between the metal structure 150 and the reflective plate 112, which is not limited in this disclosure.

Alternatively, the infrared conversion structure 120 includes an absorption plate 121 and a plurality of beam structures 122, the absorption plate 121 is used to convert an infrared signal into an electrical signal and is electrically connected to the corresponding pillar structures 140 through the corresponding beam structures 122, and the absorption plate 121 and the plurality of beam structures 122 may be located at the same layer as shown in fig. 6, 7, 8, 10, and 13, or at different layers as shown in fig. 9, 11, 12, and 14. Exemplarily, as shown in fig. 6, 7, 8, 10, and 13, the absorption plate 121 and the plurality of beam structures 122 are located in the same layer, and it is not necessary to separately fabricate a mask plate for the absorption plate 121 and the beam structures 122, which reduces the number of processes, simplifies the process flow of the infrared detector, saves the production cost of the infrared detector, and improves the production efficiency.

Exemplarily, as shown in fig. 9, 11, 12 and 14, the absorption plate 121 and the plurality of beam structures 122 are located at different layers, and the area of the beam structure 122 does not affect the area of the absorption plate 121, which is beneficial to realizing the absorption plate 121 with a larger area, so that the radiation amount of the temperature noise absorbed by the absorption plate 121, that is, the radiation absorption amount of the infrared detector can be increased, thereby acquiring a more accurate noise signal and improving the detection performance of the infrared detector. In addition, the size of the infrared detector mirror image element 100 is no longer limited by the sum of the area of the absorption plate 121 and the area of the beam structure 122, so that the size of the infrared detector mirror image element 100 can be reduced, which is beneficial to the development of miniaturization of the infrared detector.

Fig. 18 is a schematic perspective exploded view of a mirror image element of another infrared detector provided in an embodiment of the disclosure, and in combination with fig. 8 and 18, the infrared conversion structure 120 reflects infrared light. The CMOS infrared sensing structure further includes a plurality of pillar structures 140 located between the reflective layer 110 and the infrared conversion structure 120, the infrared conversion structure 120 is electrically connected to the CMOS measurement circuitry 101 through the pillar structures 140 and the supporting base 111, and the reflective layer 110 further includes a reflective plate 112. The infrared conversion structure 120 includes an absorption plate 121 and a plurality of beam structures 122 on the same layer, the absorption plate 121 is used for converting an infrared signal into an electrical signal and is electrically connected to the corresponding pillar structures 140 through the corresponding beam structures 122, the absorption plate 121 includes a metal structure 150 on a side close to or far away from the CMOS measurement circuitry 101, and at least a part of the reflection plate 112 is located in an orthographic projection area of the metal structure 150.

Specifically, a reflective layer 110 is provided on one side of the CMOS measurement circuitry 101, and the reflective layer 110 includes a supporting base 111 and a reflective plate 112, as shown in fig. 8 and 18. The reflection plate 112 is used for reflecting the infrared light twice and reflecting the infrared light to the infrared conversion structure 120, and a resonant cavity is formed between the reflection plate 112 and the infrared conversion structure 120. The absorption plate 121 includes a metal structure 150, and the metal structure 150 may be located on a side of the absorption plate 121 close to the CMOS measurement circuitry 101 as shown in fig. 8, or may be located on a side of the absorption plate 121 away from the CMOS measurement circuitry 101 as shown in fig. 18, at least a portion of the reflection plate 112 is located in an orthographic projection region of the metal structure 150, and after the infrared light is irradiated to the absorption plate 121, the infrared light is reflected by the metal structure 150, that is, the infrared conversion structure 120 reflects the infrared light. Through setting up absorption plate 121 and beam structure 122 in the same layer, need not to make the mask plate respectively to absorption plate 121 and beam structure 122, reduced the processing procedure quantity, can save infrared detector's manufacturing cost, improve production efficiency. In addition, the metal structure 150 is not disposed in the region directly opposite to the beam structure 122, so that the influence of the metal structure 150 on the thermal conductivity of the beam structure 122 can be avoided.

Fig. 19 is a schematic diagram of a film structure of an infrared detector mirror image cell provided by an embodiment of the disclosure, and as shown in fig. 19, the absorption plate 121 includes a support layer 210, and a thermosensitive layer 220 and an electrode layer 230 on the support layer 210, and the metal structure 150 is located on a side of the support layer 210 adjacent to the CMOS measurement circuitry 101. Illustratively, as shown in fig. 19, the absorption plate 121 includes a metal structure 150, a support layer 210, a heat-sensitive layer 220, and an electrode layer 230, wherein the support layer 210 is positioned on the metal structure 150, the electrode layer 230 is positioned on the support layer 210, and the heat-sensitive layer 220 is positioned on the electrode layer 230.

In particular, the support layer 210 acts as a structural support. The heat sensitive layer 220 is positioned on the absorption plate 121 to convert a temperature signal into an electric signal, and the electrode layer 230 is used to adjust the resistance of the heat sensitive layer 220. The electrode layer 230 includes a first electrode structure and a second electrode structure, the first electrode structure is insulated from the second electrode structure, and the first electrode structure and the second electrode structure are electrically connected to the corresponding pillar structures 140, respectively. The first and second electrode structures transfer the positive and negative thermosensitive signals of the thermosensitive layer 220 to the corresponding beam structures 122, respectively. The beam structure 122 is a component for electrical and thermal conduction, and is capable of transmitting a corresponding positive or negative thermosensitive signal to a readout circuit through the corresponding columnar structure 140 to realize a noise signal detection function. In the scheme provided by the embodiment of the present disclosure, the metal structure 150 is located on one side of the supporting layer 210 close to the CMOS measurement circuit system 101, that is, the metal structure 150 is formed before the preparation of the effective pixel is completed, so that the metal structure 150 can be added inside the mirror image pixel 100 by adding a process preparation process and preparing the effective pixel and the mirror image pixel 100 simultaneously in cooperation with a corresponding mask, and the structure of the effective pixel is not changed, thereby realizing the synchronous preparation of the two pixel structures, and simplifying the process flow of the infrared detector.

It should be noted that fig. 19 is only an example in which the electrode layer 230 may be disposed on the side of the thermosensitive layer 220 adjacent to the CMOS measurement circuitry 101. In other embodiments, the electrode layer 230 may be disposed on a side of the thermosensitive layer 220 away from the CMOS measurement circuitry 101, and a dielectric layer is disposed between the electrode layer 230 and the thermosensitive layer 220, as shown in fig. 20.

Fig. 21 is a schematic diagram of a film layer structure of still another infrared detector mirror image pixel provided by an embodiment of the disclosure, where the absorber plate 121 includes a support layer 210, a passivation layer 240, and a heat sensitive layer 220 and an electrode layer 230 located between the support layer 210 and the passivation layer 240, and the metal structure 150 is located on a side of the passivation layer 240 away from the CMOS measurement circuitry 101. Illustratively, the absorption plate 121 includes a metal structure 150, a support layer 210, a heat-sensitive layer 220, an electrode layer 230, and a passivation layer 240, wherein the heat-sensitive layer 220 and the electrode layer 230 are on the support layer 210, the heat-sensitive layer 220 is on the electrode layer 230, the passivation layer 240 is on the heat-sensitive layer 220, and the metal structure 150 is on the passivation layer 240.

In the embodiment of the present disclosure, the metal structure 150 is located on a side of the passivation layer 240 away from the CMOS measurement circuit system 101, that is, the metal structure 150 is formed after the preparation of the effective pixel is completed, and at this time, the metal structure 150 is separately formed for the mirror image pixel 100, so that processes of the effective pixel and the mirror image pixel 100 are different, and an influence on a performance of the effective pixel caused by the process of the mirror image pixel 100 can be avoided. It should be noted that fig. 21 is only an example in which the electrode layer 230 may be disposed on the side of the thermosensitive layer 220 adjacent to the CMOS measurement circuitry 101. In other embodiments, the electrode layer 230 may be disposed on a side of the thermosensitive layer 220 away from the CMOS measurement circuitry 101, and a dielectric layer is disposed between the electrode layer 230 and the thermosensitive layer 220, as shown in fig. 22.

Fig. 23 is a schematic perspective exploded view of a mirror image pixel of another infrared detector provided in an embodiment of the disclosure, and fig. 24 is a schematic perspective exploded view of a mirror image pixel of another infrared detector provided in an embodiment of the disclosure, and in combination with fig. 23 and fig. 24, the infrared conversion structure 120 reflects infrared light. The CMOS infrared sensing structure further includes a plurality of first pillar structures 141 located between the reflective layer 110 and the infrared conversion structure 120, the infrared conversion structure being electrically connected to the CMOS measurement circuitry 101 through the first pillar structures 141 and the supporting base 111, and the reflective layer 110 further includes a reflective plate 112. The infrared conversion structure includes an absorption plate 121 and a plurality of beam structures 122, the beam structure 122 is located on a side of the absorption plate 121 adjacent to the CMOS measurement circuitry 101, a second columnar structure 142 is disposed between the absorption plate 121 and the beam structure 122, and the absorption plate 121 is configured to convert an infrared signal into an electrical signal and is electrically connected to a corresponding first columnar structure 141 through the second columnar structure 142 and a corresponding beam structure 122. The absorber plate 121 includes a metal structure 150 on a side adjacent to or remote from the CMOS measurement circuitry 101, and at least a portion of the reflector plate 112 is located within an orthographic projection area of the metal structure 150.

Specifically, a reflective layer 110 is provided on one side of the CMOS measurement circuitry 101, and the reflective layer 110 includes a supporting base 111 and a reflective plate 112. The reflection plate 112 is used for reflecting the infrared light twice and reflecting the infrared light to the infrared conversion structure 120, the infrared conversion structure 120 includes an absorption plate 121 and a plurality of beam structures 122, the beam structures 122 are located on one side of the absorption plate 121 close to the CMOS measurement circuit system 101, and a resonant cavity is formed between the absorption plate 121 and the reflection plate 112. The absorbing plate 121 includes a metal structure 150, the metal structure 150 may be located on a side of the absorbing plate 121 close to the CMOS measurement circuitry 101 as shown in fig. 23, or may be located on a side of the absorbing plate 121 far from the CMOS measurement circuitry 101 as shown in fig. 24, the metal structure 150 covers at least a part of the reflecting plate 112, and after the infrared light is irradiated to the absorbing plate 121, the infrared light is reflected by the metal structure 150, that is, the infrared conversion structure 120 reflects the infrared light. The absorber plates 121 are electrically connected to the corresponding beam structures 122 through the second pillar structures 142, the beam structures 122 are electrically connected to the support base 111 through the corresponding first pillar structures 141, and the support base 111 is electrically connected to the CMOS measurement circuitry 101. The signal generated by the absorber plate 121 is transmitted to the CMOS measurement circuitry 101 through the second columnar structure 142, the beam structure 122, the first columnar structure 141, and the support pedestal 111 in that order.

The beam structure 122 is located on one side of the absorption plate 121 close to the CMOS measurement circuit system 101, that is, the absorption plate 121 and the beam structures 122 are located on different layers, the area of the beam structure 122 does not affect the area of the absorption plate 121, and the absorption plate 121 with a larger area is favorably realized, so that the radiation absorption capacity of the infrared detector mirror image pixel 100 can be improved, more accurate noise signals can be acquired, and the detection performance of the infrared detector can be favorably improved. In addition, the size of the infrared detector mirror image pixel 100 structure is no longer limited by the sum of the area of the absorption plate 121 and the area of the beam structure 122, so that the size of the infrared detector mirror image pixel 100 can be reduced, and the development of miniaturization of the infrared detector is facilitated.

Alternatively, as shown in fig. 23, the absorption plate 121 comprises a support layer 210 and a thermosensitive layer 220 and an electrode layer 230 on the support layer 210, the metal structure 150 is positioned on a side of the support layer 210 adjacent to the CMOS measurement circuitry 101 and in contact with the support layer 210, and the metal structure 150 is electrically insulated from the second pillar structure 142.

Fig. 25 is a schematic diagram of a film layer structure of a mirror image pixel of an infrared detector provided in an embodiment of the present disclosure, and as shown in fig. 23 and fig. 25, the absorption plate 121 includes a metal structure 150, a support layer 210, a heat-sensitive layer 220, and an electrode layer 230, where the support layer 210 is located on the metal structure 150, the electrode layer 230 is located on the support layer 210, and the heat-sensitive layer 220 is located on the electrode layer 230. The second pillar structure 142 is electrically connected to the beam structure 122 through the metal structure 150, the metal structure 150 is electrically insulated from the second pillar structure 142, and the electrode layer 230 is electrically connected to the beam structure 122 through the second pillar structure 142.

Specifically, as shown in fig. 23 and 25, the electrode layer 230 includes a first electrode structure 230a and a second electrode structure 230b, the first electrode structure 230a is insulated from the second electrode structure 230b, the first electrode structure 230a and the second electrode structure 230b are electrically connected to the corresponding second pillar structure 142, the second pillar structure 142 is electrically connected to the corresponding beam structure 122, and the beam structure 122 is electrically connected to the corresponding first pillar structure 141. The first and

second electrode structures

230a and 230b transfer the positive and negative thermosensitive signals of the thermosensitive layer 220 to the corresponding beam structures 122 through the second pillar structures 141, respectively. The beam structure 122 is a member for performing electrical and thermal conduction, and is capable of transmitting a corresponding positive or negative thermosensitive signal to a readout circuit through the corresponding first columnar structure 141 to realize a detection function of a noise signal. The electrode layer 230 is electrically insulated from the second columnar structure 142, the resistance of the metal structure 150 is not introduced into the second columnar structure 142 in the process of transmitting an electrical signal, the electrical performance of the absorption plate 121 is not affected by the metal structure 150, and the electrical performance of the mirror image pixel 100 of the infrared sensor is not affected.

In the scheme provided by the embodiment of the present disclosure, the metal structure 150 is located on one side of the supporting layer 210 close to the CMOS measurement circuit system 101, that is, the metal structure 150 is formed before the preparation of the effective pixel is completed, so that the metal structure 150 can be added inside the mirror image pixel 100 by adding a process preparation process and preparing the effective pixel and the mirror image pixel 100 simultaneously in cooperation with a corresponding mask, and the structure of the effective pixel is not changed, thereby realizing the synchronous preparation of the two pixel structures, and simplifying the process flow of the infrared detector.

It should be noted that fig. 23 and fig. 25 are only exemplary to dispose the electrode layer 230 on the side of the thermosensitive layer 220 adjacent to the CMOS measurement circuitry 101. In other embodiments, the electrode layer 230 may also be disposed on a side of the thermal sensitive layer 220 away from the CMOS measurement circuit system 101, a dielectric layer is further disposed between the electrode layer 230 and the thermal sensitive layer 220, the dielectric layer, the supporting layer 210 and the thermal sensitive layer 220 are hollowed out to form a through hole penetrating through the dielectric layer, the supporting layer 210 and the thermal sensitive layer 220, and the second pillar structure 142 passes through the through hole to be electrically connected to the electrode layer 230, as shown in fig. 26.

Alternatively, as shown in fig. 24, the absorber plate 121 comprises a support layer 210, a passivation layer 240, and a thermally sensitive layer 220 and an electrode layer 230 between the support layer 210 and the passivation layer 240, the metal structure 150 being located on a side of the passivation layer 240 remote from the CMOS measurement circuitry 101.

Fig. 27 is a schematic view showing a film layer structure of still another infrared detector mirror image cell provided by an embodiment of the present disclosure, and as shown in fig. 24 and 27, an absorption plate 121 includes a metal structure 150, a support layer 210, a heat-sensitive layer 220, an electrode layer 230, and a passivation layer 240, wherein the heat-sensitive layer 220 and the electrode layer 230 are located on the support layer 210, the heat-sensitive layer 220 is located on the electrode layer 230, the passivation layer 240 is located on the heat-sensitive layer 220, and the metal structure 150 is located on the passivation layer 240. In the solution provided in the embodiment of the present disclosure, the metal structure 150 is located on one side of the passivation layer 240 away from the CMOS measurement circuit system 101, that is, the metal structure 150 is formed after the preparation of the effective pixel is completed, and at this time, the metal structure 150 is separately formed for the mirror image pixel 100, so that the processes of the effective pixel and the mirror image pixel 100 are different, and the process of the mirror image pixel 100 can be prevented from affecting the performance of the effective pixel.

It should be noted that fig. 24 and fig. 27 are only exemplary to dispose the electrode layer 230 on the side of the thermosensitive layer 220 adjacent to the CMOS measurement circuitry 101. In other embodiments, the electrode layer 230 may also be disposed on a side of the thermal sensitive layer 220 away from the CMOS measurement circuit system 101, a dielectric layer is further disposed between the electrode layer 230 and the thermal sensitive layer 220, the dielectric layer, the support layer 210 and the thermal sensitive layer 220 are hollowed out to form a through hole penetrating through the dielectric layer, the support layer 210 and the thermal sensitive layer 220, and the second pillar structure 142 is electrically connected to the electrode layer 230 through the through hole, as shown in fig. 23.

Fig. 29 is a schematic view of a three-dimensional decomposition structure of an image element of an infrared detector provided in an embodiment of the present disclosure, and as shown in fig. 29, a resonant cavity between the CMOS measurement circuit system 101 and the infrared conversion structure cannot reflect infrared light to the infrared conversion structure. The CMOS infrared sensing structure further includes a plurality of first pillar structures 141 between the reflective layer 110 and the infrared conversion structure, the infrared conversion structure being electrically connected to the CMOS measurement circuitry 101 through the first pillar structures 141 and the supporting base 111, and the reflective layer 110 further includes a reflective plate 112. The infrared conversion structure includes an absorption plate 121 and a plurality of beam structures 122, the beam structure 122 is located on a side of the absorption plate 121 adjacent to the CMOS measurement circuitry 101, a second columnar structure 142 is disposed between the absorption plate 121 and the beam structure 122, and the absorption plate 121 is configured to convert an infrared signal into an electrical signal and is electrically connected to a corresponding first columnar structure 141 through the second columnar structure 142 and a corresponding beam structure 122. The CMOS infrared sensing structure further includes a patterned metal structure 160 located between the absorption plate 121 and the beam structure 122, the patterned metal structure 160 is insulated from the second pillar structure 142, and at least a portion of the reflection plate 112 is located in an orthographic projection area of the patterned metal structure 160, and the patterned metal structure 160 is spaced apart from both the beam structure 122 and the absorption plate 121 in a direction perpendicular to the CMOS measurement circuitry 101.

Specifically, one side of the CMOS measurement circuitry 101 is provided with a reflective layer 110, the reflective layer 110 includes a supporting base 111 and a reflective plate 112, and the reflective plate 112 is configured to reflect infrared light twice and reflect the infrared light to the infrared conversion structure 120. The infrared conversion structure 120 includes an absorption plate 121 and a plurality of beam structures 122, the beam structures 122 being located on a side of the absorption plate 121 adjacent to the CMOS measurement circuitry 101, the absorption plate 121 and the reflection plate 112 forming a resonant cavity therebetween. A patterned metal structure 160 is disposed between the absorption plate 121 and the beam structure 122, as shown in fig. 29, the patterned metal structure 160 covers at least a portion of the reflection plate 112, and infrared light transmitted through the absorption plate 121 is incident on the patterned metal structure 160 and then reflected to the absorption plate 121 by the patterned metal structure 160, at this time, the reflection plate 112 cannot receive the infrared light, so that the height of the resonant cavity is changed, a condition that the resonant cavity generates resonance is destroyed, and the resonant cavity between the CMOS measurement circuit system 101 and the infrared conversion structure 120 cannot reflect the infrared light to the infrared conversion structure.

Embodiments of the present disclosure provide that patterned metal structure 160 is located on a side of absorber plate 121 adjacent to CMOS measurement circuitry 101, as shown in fig. 29. The patterned metal structure 160 is formed before the preparation of the effective pixel is completed, so that the effective pixel and the mirror image pixel 100 can be simultaneously prepared by adding a process preparation process and matching with a corresponding mask, the patterned metal structure 160 is added in the mirror image pixel 100, the structure of the effective pixel is not changed, the synchronous preparation of the two pixel structures is realized, and the process flow of the infrared detector is simplified. The second pillar structures 142 pass through the patterned metal structures 160 to contact the corresponding beam structures 122, and are insulated from the patterned metal structures 160, and the patterned metal structures 160 are spaced apart from the absorbing plate 121 and the beam structures 122 in a direction perpendicular to the CMOS measurement circuitry 101, as shown in fig. 24. I.e., the patterned metal structure 160 is insulated from the detection circuitry to avoid affecting the electrical performance of the infrared detector. Meanwhile, patterned metal structure 160 is spaced apart from beam structure 122, leaving enough space around beam structure 122 to allow beam structure 122 to exchange heat with the surrounding environment, thereby avoiding affecting the thermal conductivity of beam structure 122.

Beam structure 122 is located one side that absorption plate 121 closes on CMOS measurement circuitry 101, and beam structure 122 is located the different layers of absorption plate 121 promptly, and the area of beam structure 122 can not cause the influence to the area of absorption plate 121, is favorable to realizing absorption plate 121 of bigger area to can improve infrared detector image pixel 100's radiation absorption volume, thereby can acquire more accurate noise signal, do benefit to improving infrared detector's detection performance. In addition, the size of the infrared detector mirror image pixel 100 structure is no longer limited by the sum of the area of the absorption plate 121 and the area of the beam structure 122, so that the size of the infrared detector mirror image pixel 100 can be reduced, and the development of miniaturization of the infrared detector is facilitated.

Fig. 30 is a schematic view of a three-dimensional exploded structure of an image element of an infrared detector provided in an embodiment of the present disclosure, and as shown in fig. 30, a resonant cavity between the CMOS measurement circuitry 101 and the infrared conversion structure 120 cannot reflect infrared light to the infrared conversion structure 120. The CMOS infrared sensing structure further includes a plurality of first pillar structures 141 between the reflective layer 110 and the infrared conversion structure 120, the infrared conversion structure 120 is electrically connected to the CMOS measurement circuitry 101 through the first pillar structures 141 and the supporting base 111, and the reflective layer 110 further includes a reflective plate 112. The infrared conversion structure 120 includes an absorption plate 121 and a plurality of beam structures 122, the beam structures 122 are located on a side of the absorption plate 121 adjacent to the CMOS measurement circuitry 101, a second columnar structure 142 is disposed between the absorption plate 121 and the beam structures 122, and the absorption plate 121 is configured to convert an infrared signal into an electrical signal and is electrically connected to a corresponding first columnar structure 141 through the second columnar structure 142 and a corresponding beam structure 122. The CMOS infrared sensing structure further includes a patterned metal structure 160 disposed corresponding to the beam structure 122, and at least a portion of the reflective plate 112 is located in an orthographic projection area of the patterned metal structure 160.

Specifically, as shown in fig. 30, a reflective layer 110 is provided on one side of the CMOS measurement circuitry 101, and the reflective layer 110 includes a supporting base 111 and a reflective plate 112. The reflection plate 112 is used for reflecting the infrared light twice and reflecting the infrared light to the infrared conversion structure 120, and the infrared conversion structure 120 includes an absorption plate 121 and a plurality of beam structures 122, the beam structures 122 are located on a side of the absorption plate 121 close to the CMOS measurement circuit system 101, and a resonant cavity is formed between the absorption plate 121 and the reflection plate 112. Patterned metal structure 160 is fixedly connected to beam structure 122 and is insulated from beam structure 122. The patterned metal structure 160 covers at least a portion of the reflective plate 112, and the infrared light transmitted through the absorption plate 121 is incident on the patterned metal structure 160 and then reflected to the absorption plate 121 by the patterned metal structure 160, and at this time, the reflective plate 112 cannot receive the infrared light, so that the height of the resonant cavity is changed, that is, the resonant cavity between the CMOS measurement circuit system 101 and the infrared conversion structure 120 cannot reflect the infrared light to the infrared conversion structure 120. The absorber plates 121 are electrically connected to the corresponding beam structures 122 through the second pillar structures 142, the beam structures 122 are electrically connected to the support base 111 through the corresponding first pillar structures 141, and the support base 111 is electrically connected to the CMOS measurement circuitry 101.

Embodiments of the present disclosure provide that patterned metal structure 160 is located on a side of absorber plate 121 adjacent to CMOS measurement circuitry 101, as shown in fig. 30. The patterned metal structure 160 is formed before the preparation of the effective pixel is completed, so that the effective pixel and the mirror image pixel 100 can be simultaneously prepared by adding a process preparation process and matching with a corresponding mask, the patterned metal structure 160 is added in the mirror image pixel 100, the structure of the effective pixel is not changed, the synchronous preparation of the two pixel structures is realized, and the process flow of the infrared detector is simplified.

Beam structure 122 is located one side that absorption plate 121 closes on CMOS measurement circuitry 101, and beam structure 122 is located the different layers of absorption plate 121 promptly, and the area of beam structure 122 can not cause the influence to the area of absorption plate 121, is favorable to realizing absorption plate 121 of bigger area to can improve infrared detector image pixel 100's radiation absorption volume, thereby can acquire more accurate noise signal, do benefit to improving infrared detector's detection performance. In addition, the size of the infrared detector mirror image pixel 100 structure is no longer limited by the sum of the area of the absorption plate 121 and the area of the beam structure 122, so that the size of the infrared detector mirror image pixel 100 can be reduced, and the development of miniaturization of the infrared detector is facilitated. It should be noted that the patterned metal structure 160 may be located in the hollow area between the beam structures 122 as shown in fig. 25, or the patterned metal structure 160 may be located opposite to the beam structures 122 and in contact with the beam structures 122.

Fig. 31 is a schematic diagram of a film structure of an infrared detector provided in an embodiment of the present disclosure, and as shown in fig. 31, the infrared detector 200 further includes an infrared detector effective pixel 210. In the infrared detector mirror image pixel 100, a resonant cavity is not formed between the CMOS measurement circuit system 101 and the infrared conversion structure 120, the reflective layer 110 further includes a reflective plate 112, the CMOS infrared sensing structure further includes a first dielectric layer 131 located between the reflective layer 110 and the infrared conversion structure 120, and the first dielectric layer 131 is in contact with the reflective layer 110 and the infrared conversion structure 120, respectively. The CMOS measurement circuit system 101, the reflective layer 110, the first dielectric layer 131, and the infrared conversion structure 120 of the infrared detector effective pixel 210 are simultaneously manufactured with the circuit substrate 101, the reflective layer 110, the first dielectric layer 131, and the infrared conversion structure 120 of the infrared detector mirror image pixel 100, respectively, by the same process. In the infrared detector active pixel 210, the sacrificial layer between the first dielectric layer 131 and the infrared conversion structure 120 is released. Specifically, the CMOS measuring circuit system 101 of the infrared detector effective pixel 210 and the CMOS measuring circuit system 101 of the infrared detector mirror image pixel 100, the reflective layer 110 of the infrared detector effective pixel 210 and the reflective layer 110 of the infrared detector mirror image pixel 100, the first dielectric layer 131 of the infrared detector effective pixel 210 and the first dielectric layer 131 of the infrared detector mirror image pixel 100, the infrared conversion structure 120 of the infrared detector effective pixel 210 and the infrared conversion structure 120 of the infrared detector mirror image pixel 100 are simultaneously prepared by the same process. A sacrificial layer is arranged between the first dielectric layer 131 and the infrared conversion structure 120 in the infrared detector effective pixel 210, and a resonant cavity is formed between the CMOS measurement circuit system 101 and the infrared conversion structure 120; the first dielectric layer 131 in the infrared detector mirror image element 100 is in direct contact with the infrared conversion structure 120, and a resonant cavity is not formed between the CMOS measurement circuit system 101 and the infrared conversion structure 120. The thickness of the infrared detector effective pixel 210 is greater than that of the infrared detector mirror image pixel 100, and the getter is prepared in the area above the infrared detector mirror image pixel 100 and corresponding to the infrared detector effective pixel 210, so that the effective space in the infrared detector can be fully utilized, the occupation of extra space is not needed, and the miniaturization development of the infrared detector is facilitated. According to the embodiment of the disclosure, the image pixel 100 of the infrared detector and the effective pixel of the infrared detector are simultaneously prepared by adopting the same process, so that the synchronous preparation of two pixel structures is realized, and the process flow of the infrared detector is simplified. In the infrared detector effective pixel 210, the first dielectric layer 131 is located in the resonant cavity, and the refractive index of the first dielectric layer 131 is greater than the refractive index of vacuum, so that the optical path of the resonant cavity can be increased through the first dielectric layer 131, the actual height of the resonant cavity can be reduced, the thickness of the sacrificial layer is reduced, and the release difficulty of the sacrificial layer is reduced.

Alternatively, the mirror image element may be formed by a CMOS process that is the same as the active pixel, for example, the mirror image element may be formed by a CMOS process that is the same as the active pixel and has approximately the same height as the active pixel, as shown in fig. 6 to 30, or the mirror image element may be formed by a CMOS process that is the same as the active pixel and has a different height from the active pixel, as shown in fig. 31, the mirror image element includes at least two metal interconnection layers and two dielectric layers, the metal interconnection layer in the mirror image element includes at least an electrode layer, and may further include a reflective layer, and at least includes a heat-sensitive dielectric layer, that is, may include a heat-sensitive layer, a support layer, and a passivation layer.

Alternatively, the CMOS infrared sensing structure 2 may be provided on an upper layer or a same layer of a metal interconnection layer of the CMOS measurement circuitry 1 for the effective pixel. Specifically, the metal interconnection layer of the CMOS measurement circuitry 1 may be a top metal layer in the CMOS measurement circuitry 1, and in conjunction with fig. 1 to 4, the CMOS infrared sensing structure 2 may be fabricated on the top metal interconnection layer of the CMOS measurement circuitry 1, and the CMOS infrared sensing structure 2 is electrically connected to the CMOS measurement circuitry 1 through a supporting base 42 on the top metal interconnection layer of the CMOS measurement circuitry 1, so as to transmit the electrical signal converted by the infrared signal to the CMOS measurement circuitry 1.

Fig. 32 is a schematic cross-sectional structure diagram of an effective pixel in another infrared detector provided in an embodiment of the present disclosure, and as shown in fig. 32, for the effective pixel, a CMOS infrared sensing structure 2 is prepared on the same layer as a metal interconnection layer of a CMOS measurement circuit system 1, that is, the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are arranged on the same layer, as shown in fig. 6, the CMOS infrared sensing structure 2 is arranged on one side of the CMOS measurement circuit system 1, and a closed release isolation layer 3 may also be arranged on the top of the CMOS measurement circuit system 1 to protect the CMOS measurement circuit system 1.

Alternatively, in conjunction with fig. 1 to 5 and fig. 32, for the effective pixel, the sacrificial layer is used to form the CMOS infrared sensing structure 2 into a hollow structure, the material constituting the sacrificial layer is silicon oxide, and the sacrificial layer is etched by using a post-CMOS process, which may, for example, etch the sacrificial layer by using at least one of gas-phase hydrogen fluoride, carbon tetrafluoride, and trifluoromethane. Specifically, a sacrificial layer (not shown in fig. 1 to 4) is provided between the reflective layer 4 and the beam structure 11, and when the close-release isolation layer 3 is disposed on the reflective layer 4, the sacrificial layer is provided between the close-release isolation layer 3 and the beam structure 11, and the material constituting the sacrificial layer is silicon oxide, so as to be compatible with a CMOS process, and a post-CMOS process may be adopted, in which the post-CMOS process corrodes the sacrificial layer to release the sacrificial layer in the final infrared detection chip product.

Optionally, with reference to fig. 1 to 4, for an active pixel, the CMOS infrared sensing structure 2 includes an absorption plate 10, a beam structure 11, a reflection layer 4, and a pillar structure 6, where the absorption plate 10 includes a metal interconnection layer and at least one thermal sensitive medium layer, the material constituting the thermal sensitive medium layer includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, titanium oxide, vanadium oxide, or vanadium titanium oxide, the metal interconnection layer in the absorption plate 10 is an electrode layer 14 in the absorption plate 10 for transmitting an electrical signal obtained by converting an infrared signal, the thermal sensitive medium layer includes at least a thermal sensitive layer 12, and may further include a supporting layer 13 and a passivation layer 15, the material constituting the thermal sensitive medium layer includes at least one of amorphous silicon, amorphous germanium, amorphous silicon, titanium oxide, vanadium oxide, or vanadium titanium oxide, that is, the material constituting the thermal sensitive layer 12 includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, titanium oxide, vanadium oxide, or titanium oxide.

The beam structure 11 and the columnar structure 6 are used for transmitting electrical signals and for supporting and connecting the absorption plate 10, the electrode layer 14 in the absorption plate 10 includes two patterned electrode structures, the two patterned electrode structures output positive electrical signals and ground electrical signals respectively, the positive electrical signals and the ground electrical signals are transmitted to the supporting base electrically connected with the columnar structure 6 through different beam structures 11 and different columnar structures 6 and then transmitted to the CMOS measurement circuit system 1, the beam structure 11 includes a metal interconnection layer and at least one dielectric layer, the metal interconnection layer in the beam structure 11 is the electrode layer 14 in the beam structure 11, the electrode layer 14 in the beam structure 11 is electrically connected with the electrode layer 14 in the absorption plate 10, and the dielectric layer in the beam structure 11 may include a supporting layer 13 and a passivation layer 15.

The columnar structure 6 is connected with the beam structure 11 and the CMOS measuring circuit system 1 by adopting a metal interconnection process and a through hole process, the upper part of the columnar structure 6 needs to be electrically connected with an electrode layer 14 in the beam structure 11 through a through hole penetrating through a supporting layer 13 in the beam structure 11, and the lower part of the columnar structure 6 needs to be electrically connected with a corresponding supporting base 42 through a through hole penetrating through a dielectric layer on the supporting base 42. The reflecting plate 41 is used for reflecting infrared signals and forms a resonant cavity with the heat-sensitive medium layer, that is, the reflecting plate 41 is used for reflecting infrared signals and forms a resonant cavity with the heat-sensitive medium layer, and the reflecting layer 4 comprises at least one metal interconnection layer which is used for forming the supporting base 42 and also used for forming the reflecting plate 41. In addition, the pillar structure 6 may include one layer of independent pillar structures as shown in fig. 1, or may include multiple layers of independent pillar structures as shown in fig. 2, which is beneficial to optimizing the steepness of the pillar structure 6.

Alternatively, for the active pixel, it may be provided that at least two ends of the beam structure 11 and the absorber plate 10 are electrically connected, the CMOS infrared sensing structure 2 includes at least two pillar structures 6 and at least two support bases 42, and the electrode layer 14 includes at least two electrode terminals. Specifically, as shown in fig. 1, the beam structures 11 are electrically connected to two ends of the absorption plate 10, each beam structure 11 is electrically connected to one end of the absorption plate 10, the CMOS infrared sensing structure 2 includes two pillar structures 6, the electrode layer 14 includes at least two electrode terminals, at least a portion of the electrode terminals transmit positive electrical signals, at least a portion of the electrode terminals transmit negative electrical signals, and the signals are transmitted to the supporting base 42 through the corresponding beam structures 11 and pillar structures 6.

Fig. 33 is a schematic perspective view of an effective pixel in another infrared detector provided in an embodiment of the present disclosure. As shown in fig. 33, it is also possible to provide that the beam structures 11 are electrically connected to four ends of the absorption plate 10, each beam structure 11 is electrically connected to two ends of the absorption plate 10, and the CMOS infrared sensing structure 2 includes four columnar structures 6, and one beam structure 11 connects two columnar structures 6. It should be noted that, in the embodiment of the present disclosure, the number of the connection ends between the beam structure 11 and the absorption plate 10 is not specifically limited, and it is sufficient to ensure that the beam structure 11 and the electrode end correspond to each other, and the beam structure 11 is used for transmitting the electrical signal output by the corresponding electrode end.

Alternatively, the infrared detector may be configured based on a 3nm, 7nm, 10nm, 14nm, 22nm, 28nm, 32nm, 45nm, 65nm, 90nm, 130nm, 150nm, 180nm, 250nm or 350nm CMOS process that characterizes a process node of the integrated circuit, i.e., a feature size during processing of the integrated circuit.

Alternatively, the metal wiring material constituting the metal interconnection layer in the infrared detector may be configured to include at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium, or cobalt, and for example, the material constituting the reflective layer may be configured to include at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium, or cobalt. In addition, the CMOS measuring circuit system 1 and the CMOS infrared sensing structure 2 are both prepared by using a CMOS process, the CMOS infrared sensing structure 2 is directly prepared above the CMOS measuring circuit system 1, the radial side length of the columnar structure 6 is more than or equal to 0.5um and less than or equal to 3um, the width of the beam structure 11, namely the width of a single line in the beam structure 11 is less than or equal to 0.3um, the height of a resonant cavity is more than or equal to 1.5um and less than or equal to 2.5um, and the side length of a single pixel of the CMOS infrared sensing structure 2 is more than or equal to 6um and less than or equal to 17um.

It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising one of 8230; \8230;" 8230; "does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.

The foregoing are merely exemplary embodiments of the present disclosure, which enable those skilled in the art to understand or practice the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An infrared detector based on a CMOS process, comprising:

aiming at the mirror image element:

the CMOS infrared sensing structure comprises a reflecting layer and an infrared conversion structure which are positioned on the CMOS measuring circuit system, and a resonant cavity between the CMOS measuring circuit system and the infrared conversion structure cannot reflect infrared light to the infrared conversion structure; the CMOS infrared sensing structure further comprises a plurality of columnar structures located between the reflecting layer and the infrared conversion structure, the CMOS infrared sensing structure further comprises a metal structure, the metal structure is located between the infrared conversion structure and the reflecting layer, at least part of reflecting plates in the reflecting layer are located in an orthographic projection area of the metal structure, and the metal structure is used for reflecting infrared light;

aiming at the effective pixels:

the CMOS manufacturing process of the CMOS infrared sensing structure comprises a metal interconnection process, a through hole process and an RDL process, wherein the CMOS infrared sensing structure comprises at least two metal interconnection layers, at least two dielectric layers and a plurality of interconnection through holes, the two dielectric layers at least comprise a sacrificial layer and a heat sensitive dielectric layer, and the two metal interconnection layers at least comprise an electrode layer and a supporting base in a reflecting layer; the thermal sensitive medium layer is used for converting temperature change corresponding to infrared radiation absorbed by the thermal sensitive medium layer into resistance change, and further converting an infrared target signal into a signal capable of realizing electric reading through the CMOS measuring circuit system;

aiming at the effective pixel, the closed release isolation layer is positioned above the metal interconnection layer of the reflection layer, the closed release isolation layer coats the columnar structure, and is used for protecting the CMOS measurement circuit system from being corroded when a sacrificial layer is released by a corrosion process, supporting the columnar structure, reducing the contact resistance of the columnar structure and the external environment, and reducing the thickness of the sacrificial layer; the CMOS technology corrosion-resistant material adopted by the closed release isolation layer comprises at least one of silicon, germanium, silicon-germanium alloy, amorphous silicon, amorphous germanium, amorphous silicon-germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride or silicon carbonitride;

2. The CMOS process based infrared detector of claim 1, wherein said mirror image element is fabricated using a CMOS process that is the same process as said active image element, said mirror image element comprising at least two metal interconnect layers and two dielectric layers.

3. The CMOS process based infrared detector of claim 1, wherein said CMOS infrared sensing structure is fabricated on a metal interconnect layer or a same layer of said CMOS measurement circuitry for said active pixels.

4. The CMOS process-based infrared detector as claimed in claim 1, wherein for said effective pixel, said sacrificial layer is used to make said CMOS infrared sensing structure form a hollowed-out structure, the material constituting said sacrificial layer is silicon oxide, and said sacrificial layer is etched by post-CMOS process.

5. The CMOS process-based infrared detector of claim 4, wherein for said active pixel, said post-CMOS process etches said sacrificial layer with at least one of gas phase hydrogen fluoride, carbon tetrafluoride, and trifluoromethane.

6. The CMOS process-based infrared detector according to claim 1, wherein the CMOS infrared sensing structure includes, for the effective pixel, an absorption plate, a beam structure, the reflection layer, and the columnar structure;

the beam structure and the columnar structure are used for transmitting the electric signals and supporting and connecting the absorption plates, the beam structure comprises a metal interconnection layer and at least one dielectric layer, and the columnar structure is connected with the beam structure and the CMOS measuring circuit system by adopting the metal interconnection process and the through hole process;

7. The CMOS process-based infrared detector according to claim 6, wherein at least two ends of the beam structure and the absorption plate are electrically connected for the active pixel, the CMOS infrared sensing structure comprises at least two pillar structures and at least two supporting bases, and the electrode layer comprises at least two electrode terminals.

8. The CMOS process based infrared detector according to claim 1, wherein the infrared detector is based on a 3nm, 7nm, 10nm, 14nm, 22nm, 28nm, 32nm, 45nm, 65nm, 90nm, 130nm, 150nm, 180nm, 250nm or 350nm CMOS process.

9. The CMOS process-based infrared detector of claim 1, wherein a metal wiring material constituting the metal interconnection layer comprises at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium, or cobalt.