CN113447146B

CN113447146B - Step type infrared detector

Info

Publication number: CN113447146B
Application number: CN202110713214.3A
Authority: CN
Inventors: 翟光杰; 潘辉; 武佩; 翟光强
Original assignee: Beijing North Gaoye Technology Co ltd
Current assignee: Beijing North Gaoye Technology Co ltd
Priority date: 2021-06-25
Filing date: 2021-06-25
Publication date: 2022-12-02
Anticipated expiration: 2041-06-25
Also published as: CN113447146A

Abstract

The utility model relates to a step type infrared detector, CMOS measurement circuitry and CMOS infrared sensing structure all use CMOS technology preparation among the infrared detector, the surface that unsettled microbridge structure closes on CMOS measurement circuitry corresponds the column structure position and is the echelonment, unsettled microbridge structure is higher than unsettled microbridge structure and the surface of column structure contact with column structure on the surface that unsettled microbridge structure does not contact, column structure is solid column structure, reinforced structure corresponds the column structure setting and is located one side that CMOS measurement circuitry was kept away from to column structure. Through the technical scheme, the problems of low performance, low pixel scale, low yield, poor consistency and the like of the traditional MEMS process infrared detector are solved, the sinking degree of the middle area of the sacrificial layer is effectively reduced, the planarization degree of the whole infrared detector is optimized, and the structural stability of the infrared detector is improved.

Description

Step type infrared detector

Technical Field

The present disclosure relates to the field of infrared detection technology, and more particularly, to a stepped infrared detector.

Background

The fields of monitoring markets, vehicle and auxiliary markets, home markets, intelligent manufacturing markets, mobile phone applications and the like have strong demands on uncooled high-performance chips, certain requirements are provided for the performance of the chips, the performance consistency and the product price, the potential demands of more than one hundred million chips are expected every year, and the current process scheme and architecture cannot meet the market demands.

At present, an infrared detector adopts a mode of combining a measuring circuit and an infrared sensing structure, the measuring circuit is prepared by adopting a Complementary Metal-Oxide-Semiconductor (CMOS) process, and the infrared sensing structure is prepared by adopting a Micro-Electro-Mechanical System (MEMS) process, so that the following problems are caused:

(1) The infrared sensing structure is prepared by adopting an MEMS (micro-electromechanical systems) process, polyimide is used as a sacrificial layer, and the infrared sensing structure is incompatible with a CMOS (complementary metal oxide semiconductor) process.

(2) Polyimide is used as a sacrificial layer, so that the problem that the vacuum degree of a detector chip is influenced due to incomplete release exists, the growth temperature of a subsequent film is limited, and the selection of materials is not facilitated.

(3) Polyimide can cause the height of the resonant cavity to be inconsistent, and the working dominant wavelength is difficult to guarantee.

(4) The control of the MEMS process is far worse than that of the CMOS process, and the performance consistency and the detection performance of the chip are restricted.

(5) MEMS has low productivity, low yield and high cost, and can not realize large-scale batch production.

(6) The existing process capability of the MEMS is not enough to support the preparation of a detector with higher performance, and the MEMS has smaller line width and thinner film thickness, thereby being not beneficial to realizing the miniaturization of a chip.

Disclosure of Invention

In order to solve the technical problem or at least partially solve the technical problem, the disclosure provides a step-type infrared detector, which solves the problems of low performance, low pixel scale, low yield, poor consistency and the like of the traditional MEMS (micro-electromechanical systems) process infrared detector, effectively reduces the sunken degree of the middle area of a sacrificial layer, optimizes the planarization degree of the whole infrared detector, and improves the structural stability of the infrared detector.

The present disclosure provides a step-type infrared detector, including:

the CMOS infrared sensing structure comprises a CMOS measuring circuit system and a CMOS infrared sensing structure, wherein the CMOS measuring circuit system and the CMOS infrared sensing structure are both prepared by using a CMOS process, and the CMOS infrared sensing structure is directly prepared on the CMOS measuring circuit system;

the CMOS measurement circuit system comprises at least one layer of closed release isolation layer above the CMOS measurement circuit system, wherein the closed release isolation layer is used for protecting the CMOS measurement circuit system from being influenced by a process in the release etching process of manufacturing the CMOS infrared sensing structure;

the CMOS manufacturing process of the CMOS infrared sensing structure comprises a metal interconnection process, a through hole process, an IMD (in-mold decoration) process and an RDL (remote description language) process, wherein the CMOS infrared sensing structure comprises at least two metal interconnection layers, at least two dielectric layers and a plurality of interconnection through holes, the metal interconnection layers at least comprise a reflecting layer and an electrode layer, and the dielectric layers at least comprise a sacrificial layer and a heat-sensitive dielectric layer; the thermal sensitive medium layer is used for converting temperature change corresponding to infrared radiation absorbed by the thermal sensitive medium layer into resistance change, and further converting an infrared target signal into a signal capable of realizing electric reading through the CMOS measuring circuit system;

the CMOS infrared sensing structure comprises a resonant cavity formed by the reflecting layer and the heat sensitive medium layer, a suspended micro-bridge structure for controlling heat transfer and a columnar structure with electric connection and support functions, wherein the suspended micro-bridge structure comprises an absorption plate and a plurality of beam structures, the position of the surface, close to the CMOS measuring circuit system, of the suspended micro-bridge structure, corresponding to the columnar structure, is in a step shape, the surface, not in contact with the columnar structure, of the suspended micro-bridge structure is higher than the surface, in contact with the columnar structure, of the suspended micro-bridge structure, and the columnar structure is a solid columnar structure;

the infrared detector further comprises a reinforced structure, the reinforced structure is arranged corresponding to the position of the columnar structure and is positioned on one side, away from the CMOS measuring circuit system, of the columnar structure, and the reinforced structure is used for enhancing the connection stability between the columnar structure and the beam structure;

the CMOS measuring circuit system is used for measuring and processing an array resistance value formed by one or more CMOS infrared sensing structures and converting an infrared signal into an image electric signal; the CMOS measuring circuit system comprises a bias voltage generating circuit, a column-level analog front-end circuit and a row-level circuit, wherein the input end of the bias voltage generating circuit is connected with the output end of the row-level circuit, the input end of the column-level analog front-end circuit is connected with the output end of the bias voltage generating circuit, the row-level circuit comprises row-level mirror image pixels and row selection switches, and the column-level analog front-end circuit comprises blind pixels; the row-level circuit is distributed in each pixel, selects a signal to be processed according to a row strobe signal of the time sequence generating circuit, and outputs a current signal to the column-level analog front-end circuit under the action of the bias voltage generating circuit so as to perform current-voltage conversion and output;

the column-level analog front-end circuit obtains two paths of currents according to the first bias voltage and the second bias voltage, performs transimpedance amplification on the difference of the two paths of generated currents, and outputs the amplified currents as output voltage.

Optionally, the CMOS infrared sensing structure is prepared on an upper layer or a same layer of a metal interconnection layer of the CMOS measurement circuitry.

Optionally, the sacrificial layer is used for enabling the CMOS infrared sensing structure to form a hollow structure, the material forming the sacrificial layer is silicon oxide, and the sacrificial layer is etched by a post-CMOS process.

Optionally, the absorption plate is configured to absorb the infrared target signal and convert the infrared target signal into an electrical signal, the beam structure and the pillar structure are configured to transmit the electrical signal and to support and connect the absorption plate, the reflection layer is configured to reflect the infrared signal and form the resonant cavity with the thermal sensitive dielectric layer, the reflection layer includes at least one metal interconnection layer, and the pillar structure connects the beam structure and the CMOS measurement circuitry by using the metal interconnection process and the via process;

the absorption plate and the film layer of the beam structure are the same in composition, the absorption plate and the corresponding film layer of the beam structure are manufactured at the same time, the absorption plate sequentially comprises a first dielectric layer, an electrode layer and a second dielectric layer along the direction far away from the CMOS measuring circuit system, the material for forming the first dielectric layer comprises at least one of materials with the resistance temperature coefficient larger than a set value and prepared by amorphous silicon, amorphous germanium silicon or amorphous carbon, and the material for forming the second dielectric layer comprises at least one of materials with the resistance temperature coefficient larger than the set value and prepared by amorphous silicon, amorphous germanium silicon or amorphous carbon; alternatively, the first and second electrodes may be,

along the direction far away from the CMOS measuring circuit system, the beam structure sequentially comprises a first dielectric layer, the electrode layer and a second dielectric layer, the absorption plate sequentially comprises the first dielectric layer, the electrode layer, the heat sensitive dielectric layer and the second dielectric layer or the absorption plate sequentially comprises the first dielectric layer, the heat sensitive dielectric layer, the electrode layer and the second dielectric layer, the material forming the first dielectric layer comprises at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, aluminum oxide or amorphous carbon, the material for forming the second dielectric layer comprises at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, aluminum oxide or amorphous carbon, and the material for forming the heat sensitive dielectric layer comprises at least one of materials with the resistance temperature coefficient larger than a set value, which are prepared from titanium oxide, vanadium oxide, amorphous silicon, amorphous germanium, amorphous silicon germanium oxygen, silicon, germanium, silicon germanium, germanium silicon germanium oxygen, graphene, barium strontium titanate film, copper or platinum;

the electrode layer is made of at least one of titanium, titanium nitride, tantalum nitride, titanium-tungsten alloy, nickel-chromium alloy, nickel-platinum alloy, nickel-silicon alloy, nickel, chromium, platinum, tungsten, aluminum and copper.

Optionally, at least one hole-shaped structure is formed on the absorption plate, and the hole-shaped structure at least penetrates through the medium layer in the absorption plate; and/or at least one hole-shaped structure is formed on the beam structure, and the hole-shaped structure at least penetrates through the dielectric layer in the beam structure.

Optionally, the columnar structure comprises a solid structure, and a material constituting the solid structure comprises at least one of tungsten, copper or aluminum;

the side wall of the solid structure is in contact with the sacrificial layer; alternatively, the first and second electrodes may be,

the side wall of the solid structure is coated with at least one dielectric layer, the solid structure is arranged in contact with the dielectric layer, and the material for forming the dielectric layer comprises at least one of silicon oxide, silicon nitride, silicon carbide, amorphous carbon, aluminum oxide, titanium oxide, vanadium oxide, amorphous silicon, amorphous germanium-silicon, amorphous germanium-oxygen-silicon, germanium-silicon, germanium-oxygen-silicon, graphene, copper or platinum; alternatively, the first and second electrodes may be,

solid construction's lateral wall and solid construction closes on CMOS measures circuit system's surface cladding has at least one deck adhesion layer, in the columnar structure outermost periphery the adhesion layer is kept away from solid construction's lateral wall cladding has the dielectric layer, constitutes the material of adhesion layer includes at least one of titanium, titanium nitride, tantalum or tantalum nitride, constitutes the material of dielectric layer includes at least one in silicon oxide, silicon nitride, carborundum, amorphous carbon, aluminium oxide, titanium oxide, vanadium oxide, amorphous silicon, amorphous germanium silicon, amorphous germanium oxygen silicon, germanium silicon, germanium oxygen silicon, graphite alkene, copper or platinum.

Optionally, the reinforcing structure comprises a weighted block structure;

the weighting block structure is positioned on one side of the beam structure far away from the CMOS measuring circuit system and is in contact with the beam structure; alternatively, the first and second electrodes may be,

the beam structure is provided with a through hole corresponding to the position of the columnar structure, at least part of the columnar structure is exposed out of the through hole, the weighting block structure comprises a first part and a second part, the first part is filled in the through hole, the second part is located outside the through hole, and the orthographic projection of the second part covers the orthographic projection of the first part.

Optionally, the hermetic release barrier is located at an interface between the CMOS measurement circuitry and the CMOS infrared sensing structure and/or in the CMOS infrared sensing structure.

Optionally, the closed release isolation layer is located on the reflective layer and is arranged in contact with the reflective layer;

the closed release insulating layer comprises at least one dielectric layer, and the material for forming the closed release insulating layer comprises at least one of silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, silicon germanium alloy, amorphous carbon or aluminum oxide.

Optionally, the infrared detector is based on a 3nm, 7nm, 10nm, 14nm, 22nm, 28nm, 32nm, 45nm, 65nm, 90nm, 130nm, 150nm, 180nm, 250nm or 350nm CMOS process;

the metal connecting wire material forming the metal interconnection layer comprises at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium or cobalt.

Compared with the prior art, the technical scheme provided by the embodiment of the disclosure has the following advantages:

the CMOS measurement circuit system and the CMOS infrared sensing structure are integrally prepared on the CMOS production line by utilizing the CMOS process, compared with the MEMS process, the CMOS does not have the process compatibility problem, the technical difficulty of the MEMS process is solved, the transportation cost can be reduced by adopting the CMOS process production line process to prepare the infrared detector, and the risk caused by the transportation problem and the like is reduced; the infrared detector takes silicon oxide as a sacrificial layer, the silicon oxide is completely compatible with a CMOS (complementary metal oxide semiconductor) process, the preparation process is simple and easy to control, the CMOS process does not have the problem that the polyimide of the sacrificial layer is not released cleanly to influence the vacuum degree of a detector chip, the subsequent film growth temperature is not limited by the material of the sacrificial layer, the multilayer process design of the sacrificial layer can be realized, the process is not limited, the planarization can be easily realized by using the sacrificial layer, and the process difficulty and the possible risks are reduced; the infrared detector prepared by the integrated CMOS process can realize the aims of high yield, low cost, high yield and large-scale integrated production of chips, and provides a wider application market for the infrared detector; the infrared detector based on the CMOS process can realize smaller size and thinner film thickness of a characteristic structure, so that the infrared detector has larger duty ratio, lower thermal conductivity and smaller thermal capacity, and the infrared detector has higher detection sensitivity, longer detection distance and better detection performance; the infrared detector based on the CMOS process can make the pixel size of the detector smaller, realize smaller chip area under the same array pixel, and is more beneficial to realizing the miniaturization of a chip; the infrared detector based on the CMOS process has the advantages of mature process production line, higher process control precision, better design requirement achievement, better product consistency, better circuit piece adjustment performance and better industrial batch production. In addition, the position of the surface of the suspended micro-bridge structure close to the CMOS measuring circuit system, corresponding to the position of the columnar structure, is in a step shape, the surface of the suspended micro-bridge structure, which is not in contact with the columnar structure, is higher than the surface of the suspended micro-bridge structure, which is in contact with the columnar structure, so that the sinking degree of the middle area of the sacrificial layer is effectively reduced, and the planarization degree of the whole infrared detector is optimized. In addition, set up infrared detector and still include reinforced structure, reinforced structure corresponds the columnar structure position setting and is located the columnar structure and keeps away from one side of CMOS measurement circuitry, reinforced structure is used for strengthening the connection steadiness between columnar structure and the unsettled microbridge structure, has promoted infrared detector's structural stability.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.

In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present disclosure, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.

Fig. 1 is a schematic perspective structure diagram of an infrared detector pixel provided in an embodiment of the present disclosure;

fig. 2 is a schematic cross-sectional structure diagram of an infrared detector pixel provided in an embodiment of the present disclosure;

FIG. 3 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in the embodiment of the present disclosure;

FIG. 4 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in the embodiment of the present disclosure;

FIG. 5 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in the embodiment of the present disclosure;

FIG. 6 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in the embodiment of the present disclosure;

FIG. 7 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in the embodiment of the present disclosure;

FIG. 8 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in the embodiments of the present disclosure;

fig. 9 is a schematic structural diagram of a CMOS measurement circuitry according to an embodiment of the present disclosure;

fig. 10 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in an embodiment of the present disclosure;

fig. 11 is a schematic top view of a polarization structure provided in an embodiment of the present disclosure;

fig. 12 is a schematic top view of another polarization structure provided in the embodiments of the present disclosure;

FIG. 13 is a schematic diagram illustrating a top view of another polarization structure provided in an embodiment of the present disclosure;

fig. 14 is a schematic perspective structure diagram of another infrared detector pixel provided in the embodiment of the disclosure.

Detailed Description

In order that the above objects, features and advantages of the present disclosure may be more clearly understood, aspects of the present disclosure will be further described below. It should be noted that the embodiments and features of the embodiments of the present disclosure may be combined with each other without conflict.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure, but the present disclosure may be practiced in other ways than those described herein; it is to be understood that the embodiments disclosed in the specification are only a few embodiments of the present disclosure, and not all embodiments.

Fig. 1 is a schematic perspective structure diagram of an infrared detector pixel provided in an embodiment of the present disclosure, and fig. 2 is a schematic cross-sectional structure diagram of an infrared detector pixel provided in an embodiment of the present disclosure. With reference to fig. 1 and 2, the infrared detector includes a plurality of infrared detector pixels arranged in an array, the CMOS process-based infrared detector includes a CMOS measurement circuit system 1 and a CMOS infrared sensing structure 2, both the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are manufactured using a CMOS process, and the CMOS infrared sensing structure 2 is directly manufactured on the CMOS measurement circuit system 1.

Specifically, the CMOS infrared sensing structure 2 is used for converting an external infrared signal into an electric signal and transmitting the electric signal to the CMOS measuring circuit system 1, and the CMOS measuring circuit system 1 reflects temperature information of the corresponding infrared signal according to the received electric signal, so that the temperature detection function of the infrared detector is realized. The CMOS measuring circuit system 1 and the CMOS infrared sensing structure 2 are both prepared by using a CMOS process, and the CMOS infrared sensing structure 2 is directly prepared on the CMOS measuring circuit system 1, namely, the CMOS measuring circuit system 1 is prepared by using the CMOS process, and then the CMOS infrared sensing structure 2 is continuously prepared by using the CMOS process by using the CMOS production line and parameters of various processes compatible with the production line.

Therefore, the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are integrally prepared on the CMOS production line by utilizing the CMOS process, compared with the MEMS process, the CMOS process does not have the process compatibility problem, the technical difficulty of the MEMS process is solved, the transportation cost can be reduced by adopting the CMOS production line process to prepare the infrared detector, and the risk caused by the transportation problem and the like is reduced; the infrared detector takes silicon oxide as a sacrificial layer, the silicon oxide is completely compatible with a CMOS (complementary metal oxide semiconductor) process, the preparation process is simple and easy to control, the CMOS process does not have the problem that the polyimide of the sacrificial layer is not released cleanly to influence the vacuum degree of a detector chip, the subsequent film growth temperature is not limited by the material of the sacrificial layer, the multilayer process design of the sacrificial layer can be realized, the process is not limited, the planarization can be easily realized by using the sacrificial layer, and the process difficulty and the possible risks are reduced; the infrared detector prepared by the integrated CMOS process can realize the aims of high yield, low cost, high yield and large-scale integrated production of chips, and provides a wider application market for the infrared detector; the infrared detector based on the CMOS process can realize smaller size and thinner film thickness of a characteristic structure, so that the infrared detector has larger duty ratio, lower thermal conductivity and smaller thermal capacity, and the infrared detector has higher detection sensitivity, longer detection distance and better detection performance; the infrared detector based on the CMOS process can make the pixel size of the detector smaller, realize smaller chip area under the same array pixel, and is more beneficial to realizing the miniaturization of a chip; the infrared detector based on the CMOS process has the advantages of mature process production line, higher process control precision, better meeting design requirements, better product consistency, more contribution to circuit chip adjustment performance and more contribution to industrialized mass production.

Referring to fig. 1 and 2, the cmos infrared sensing structure 2 includes a resonant cavity formed by a reflective layer 4 and a thermal sensitive medium layer, a suspended micro-bridge structure 40 for controlling heat transfer, and a pillar structure 6 having electrical connection and support functions, wherein the suspended micro-bridge structure 40 includes an absorption plate 10 and a plurality of beam structures 11. Specifically, the CMOS infrared sensing structure 2 includes a reflective layer 4, a suspended micro-bridge structure 40 and a columnar structure 6 which are located on the CMOS measurement circuit system 1, the columnar structure 6 is located between the reflective layer 4 and the suspended micro-bridge structure 40, the reflective layer 4 includes a reflective plate 41 and a supporting base 42, and the suspended micro-bridge structure 40 is electrically connected with the CMOS measurement circuit system 1 through the columnar structure 6 and the supporting base 42.

Specifically, the columnar structure 6 is located between the reflective layer 4 and the suspended microbridge structure 40, and is used for supporting the suspended microbridge structure 40 after a sacrificial layer on the CMOS measurement circuit system 1 is released, the sacrificial layer is located between the reflective layer 4 and the suspended microbridge structure 40, the suspended microbridge structure 40 transmits an electrical signal converted from an infrared signal to the CMOS measurement circuit system 1 through the corresponding columnar structure 6 and the corresponding supporting base 42, the CMOS measurement circuit system 1 processes the electrical signal to reflect temperature information, and non-contact infrared temperature detection of the infrared detector is achieved. The CMOS infrared sensing structure 2 outputs positive electric signals and ground electric signals through different electrode structures, the positive electric signals and the ground electric signals are transmitted to a supporting base 42 electrically connected with the columnar structures 6 through different columnar structures 6, fig. 1 and 2 exemplarily show that the direction is parallel to the CMOS measuring circuit system 1, the CMOS infrared sensing structure 2 includes two columnar structures 6, one of the columnar structures 6 can be set for transmitting positive electric signals, the other columnar structure 6 is set for transmitting ground electric signals, the CMOS infrared sensing structure 2 can also be set to include four columnar structures 6, the four columnar structures 6 can be set as a group by two to respectively transmit positive electric signals and ground electric signals, because the infrared detector includes a plurality of infrared detector pixels arranged in an array, the four columnar structures 6 can also select two of the columnar structures 6 to respectively transmit positive electric signals and ground electric signals, and the other two columnar structures 6 provide the adjacent infrared detector pixels for electric signal transmission. In addition, the reflection layer 4 includes a reflection plate 41 and a supporting base 42, a part of the reflection layer 4 is used as a dielectric medium electrically connected to the column structure 6 and the CMOS measurement circuit system 1, that is, the supporting base 42, the reflection plate 41 is used for reflecting infrared rays to the suspended microbridge structure 40, and the secondary absorption of the infrared rays is realized by matching with a resonant cavity formed between the reflection layer 4 and the suspended microbridge structure 40, so as to improve the infrared absorption rate of the infrared detector and optimize the infrared detection performance of the infrared detector.

Referring to fig. 1 and 2, the surface of the floating micro-bridge structure 40 adjacent to the CMOS measurement circuit system 1 is stepped corresponding to the position of the pillar structure 6, and the surface of the floating micro-bridge structure 40 not in contact with the pillar structure 6 is higher than the surface of the floating micro-bridge structure 40 in contact with the pillar structure 6, i.e., the surface a in fig. 2 is higher than the surface B. Specifically, a sacrificial layer (not shown in fig. 1 and 2) is further disposed between the suspended microbridge structure 40 and the reflective layer 4, the material constituting the sacrificial layer may include, for example, silicon oxide to be compatible with CMOS process, the sacrificial layer provides a preparation substrate for forming the suspended microbridge structure 40, and the sacrificial layer is released in the final infrared detector product. The sacrificial layer needs to be planarized by a CMP (Chemical Mechanical Polishing) process, and if the surface of the suspended microbridge structure 40 in contact with the upper surface of the sacrificial layer is flush with the surface of the suspended microbridge structure 40 in contact with the columnar structure 6, the Polishing termination interface of the CMP process of the sacrificial layer is flush with the upper surface of the columnar structure 6, and since Chemical reagents and grinding process parameters in the CMP process are not easy to adjust and control, the surface of the sacrificial layer in the middle region of fig. 2 is lower than the surfaces of the sacrificial layers in other regions, that is, a recessed region is formed in the middle of the sacrificial layer, which affects the planarization degree of a subsequent film layer of the infrared detector.

The embodiment of the present disclosure can form a stepped structure corresponding to the suspended micro-bridge structure 40 by using the sacrificial layer, that is, the position of the surface of the suspended micro-bridge structure 40 close to the CMOS measurement circuit system 1 corresponding to the position of the columnar structure 6 is stepped, the surface of the suspended micro-bridge structure 40 not in contact with the columnar structure 6 is higher than the surface of the suspended micro-bridge structure 40 in contact with the columnar structure 6, and the polishing termination interface of the CMP process corresponding to the sacrificial layer is higher than the upper surface of the columnar structure 6, so that the recess degree of the middle region of the sacrificial layer can be effectively reduced, and the planarization degree of the entire infrared detector is optimized. From another perspective, a sacrificial layer to be released is arranged between the reflective layer 4 and the suspended micro-bridge structure 40, the suspended micro-bridge structure 40 is electrically connected with the columnar structure 5 through a through hole formed by the sacrificial layer, the surface of the sacrificial layer around the through hole can also be arranged to be higher than the bottom surface of the through hole, so that the surface of the suspended micro-bridge structure 40 close to the CMOS measurement circuit system 1 after the sacrificial layer is released is in a step shape corresponding to the position of the columnar structure 6, the surface of the suspended micro-bridge structure 40 not in contact with the columnar structure 6 is higher than the surface of the suspended micro-bridge structure 40 in contact with the columnar structure 6, the sinking degree of the middle area of the sacrificial layer is effectively reduced, and the planarization degree of the whole infrared detector is optimized.

Specifically, columnar structure 6 is solid columnar structure, solid columnar structure's mechanical stability is better, the support connection stability between columnar structure 6 and unsettled microbridge structure 40 has been improved, and then infrared detector pixel and the infrared detector's including the infrared detector pixel structural stability has been improved, and the resistance of the solid columnar structure of metal is less, be favorable to reducing the signal loss who carries out the signal transmission in-process between unsettled microbridge structure 40 and the CMOS measurement circuitry 1, infrared detector's infrared detection performance has been promoted, and the size of the solid columnar structure of metal changes accurate control, solid columnar structure can realize the columnar structure of smaller size promptly, be favorable to satisfying littleer chip size demand, realize infrared detector's miniaturization.

Referring to fig. 1 and 2, the suspended microbridge structure 40 may include an absorption plate 10 and a plurality of beam structures 11, and fig. 1 and 2 exemplarily set the suspended microbridge structure 40 to include two beam structures 11. Exemplarily, as shown in fig. 2, the film structures of the absorption plate 10 and the beam structure 11 may be set to be the same, and the corresponding films of the absorption plate 10 and the beam structure 11 are simultaneously fabricated, along the direction away from the CMOS measurement circuit system 1, the absorption plate 10 is set to sequentially include a first dielectric layer 13, an electrode layer 14 and a second dielectric layer 15, the beam structure 11 sequentially includes a first dielectric layer 13, an electrode layer 14 and a second dielectric layer 15, the first dielectric layer 13 in the beam structure 11 and the first dielectric layer 13 in the absorption plate 10 are simultaneously fabricated, the second dielectric layer 15 in the beam structure 11 and the second dielectric layer 15 in the absorption plate 10 are simultaneously fabricated, and the electrode layer 14 in the beam structure 11 and the electrode layer 14 in the absorption plate 10 are simultaneously fabricated, so as to simplify the fabrication process of the infrared detector pixel and further simplify the fabrication process of the infrared detector. In addition, the electrode layer 14 in the absorber plate 10 is electrically connected with the electrode layer 14 in the beam structure 11, the pillar structure 6 and the support pedestal 42 to ensure that the electrical signal generated by the suspended micro-bridge structure 40 is transmitted to the CMOS measurement circuitry 1.

The material forming the first dielectric layer 13 includes at least one of materials having a temperature coefficient of resistance greater than a set value, which are made of amorphous silicon, amorphous germanium, amorphous silicon germanium or amorphous carbon, and the material forming the second dielectric layer 15 includes at least one of materials having a temperature coefficient of resistance greater than a set value, which are made of amorphous silicon, amorphous germanium, amorphous silicon germanium or amorphous carbon, and the set value may be, for example, 0.015/K. Therefore, the first dielectric layer 13 serves as a support layer and also serves as a heat sensitive dielectric layer, and the second dielectric layer 15 serves as a passivation layer and also serves as a heat sensitive dielectric layer, so that the thickness of the absorption plate 10 is reduced, the heat conductivity of the beam structure 11 is reduced, and the preparation process of the infrared detector is simplified. Specifically, the supporting layer is used for supporting an upper film layer in the suspended micro-bridge structure 40 after the sacrificial layer is released, the heat sensitive medium layer is used for converting infrared temperature detection signals into infrared detection electric signals, the electrode layer 14 is used for transmitting the infrared detection electric signals converted by the heat sensitive medium layer to the CMOS measurement circuit system 1 through the beam structures 11 on the left side and the right side, the two beam structures 11 respectively transmit positive and negative signals of the infrared detection electric signals, a reading circuit in the CMOS measurement circuit system 1 realizes non-contact infrared temperature detection through analysis of the acquired infrared detection electric signals, and the passivation layer is used for protecting the electrode layer 14 from oxidation or corrosion. In addition, corresponding to the absorption plate 10 and the beam structure 11, the electrode layer 14 is located in a closed space formed by the first dielectric layer 13, namely the support layer, and the second dielectric layer 15, namely the passivation layer, so that the protection of the electrode layer 14 in the absorption plate 10 and the beam structure 11 is realized.

Illustratively, as shown in fig. 2, the thickness of the first medium layer 13 in the beam structure 11 may be set to be not more than the thickness of the first medium layer 13 in the absorber plate 10; and/or the thickness of the second dielectric layer 15 in the beam structure 11 is not greater than the thickness of the second dielectric layer 15 in the absorption plate 10, that is, the thickness of the first dielectric layer 13 in the beam structure 11 is set to be less than or equal to the thickness of the first dielectric layer 13 in the absorption plate 10, or the thickness of the second dielectric layer 15 in the beam structure 11 is set to be less than or equal to the thickness of the second dielectric layer 15 in the absorption plate 10, or the thickness of the first dielectric layer 13 in the beam structure 11 is set to be less than or equal to the thickness of the first dielectric layer 13 in the absorption plate 10 and the thickness of the second dielectric layer 15 in the beam structure 11 is set to be less than or equal to the thickness of the second dielectric layer 15 in the absorption plate 10.

Specifically, the first dielectric layer 13 in the beam structure 11 may be etched more than the first dielectric layer 13 in the absorber plate 10 when etching the first dielectric layer 13 in the beam structure 11, or the first dielectric layer 13 in the beam structure 11 may be made thicker when making the first dielectric layer 13 in the absorber plate 10, so that the thickness of the first dielectric layer 13 in the beam structure 11 is smaller than the thickness of the first dielectric layer 13 in the absorber plate 10. Likewise, the second dielectric layer 15 in the beam structure 11 is etched with respect to the second dielectric layer 15 in the absorber plate 10 when etching the second dielectric layer 15 in the absorber plate 10, or the second dielectric layer 15 in the beam structure 11 is made thicker when making the second dielectric layer 15 in the absorber plate 10, so that the thickness of the second dielectric layer 15 in the beam structure 11 is smaller than the thickness of the second dielectric layer 15 in the absorber plate 10. Thus, by setting the thickness of the first medium layer 13 in the beam structure 11 to be not more than the thickness of the first medium layer 13 in the absorber plate 10; and/or the thickness of the second dielectric layer 15 in the beam structure 11 is not greater than the thickness of the second dielectric layer 15 in the absorption plate 10, so that the total thickness of the beam structure 11 is not greater than the total thickness of the absorption plate 10, which is beneficial to further reducing the thermal conductivity of the beam structure 11, further reducing the influence of the thermal conductivity generated by the beam structure 11 on the electrical signal generated by the suspended microbridge structure 40, and being beneficial to improving the infrared detection performance of the infrared detector pixel and the infrared detector comprising the infrared detector pixel.

Fig. 3 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in the embodiment of the disclosure. Different from the infrared detector pixel with the structure shown in fig. 2, the infrared detector pixel with the structure shown in fig. 3 is arranged along a direction away from the CMOS measurement circuit system 1, the beam structure 11 sequentially includes a first dielectric layer 13, an electrode layer 14 and a second dielectric layer 15, the absorption plate 10 sequentially includes the first dielectric layer 13, the electrode layer 14, the sensitive dielectric layer 12 and the second dielectric layer 15, or the absorption plate 10 sequentially includes the first dielectric layer 13, the heat sensitive dielectric layer 12, the electrode layer 14 and the second dielectric layer 15, that is, the heat sensitive dielectric layer 12 of the absorption plate 10 may be arranged on a side of the electrode layer 14 away from the CMOS measurement circuit system 1, or the heat sensitive dielectric layer 12 of the absorption plate 10 may be arranged on a side of the electrode layer 14 close to the CMOS measurement circuit system 1, fig. 3 is exemplarily arranged along a direction away from the CMOS measurement circuit system 1, and the absorption plate 10 sequentially includes the first dielectric layer 13, the electrode layer 14, the sensitive dielectric layer 12 and the second dielectric layer 15.

Exemplarily, as shown in fig. 3, it may also be configured that the first dielectric layer 13 in the beam structure 11 and the first dielectric layer 13 in the absorption plate 10 are fabricated at the same time, the second dielectric layer 15 in the beam structure 11 and the second dielectric layer 15 in the absorption plate 10 are fabricated at the same time, and the electrode layer 14 in the beam structure 11 and the electrode layer 14 in the absorption plate 10 are fabricated at the same time, so as to simplify a fabrication process of the infrared detector pixel and further simplify a fabrication process of the infrared detector. In addition, the electrode layer 14 in the absorber plate 10 is electrically connected with the electrode layer 14 in the beam structure 11, the pillar structure 6 and the support pedestal 42 to ensure that the electrical signal generated by the suspended micro-bridge structure 40 is transmitted to the CMOS measurement circuitry 1.

As shown in fig. 3, the material forming the first dielectric layer 13 includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, aluminum oxide or amorphous carbon, the material forming the second dielectric layer 15 includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, aluminum oxide or amorphous carbon, the material forming the thermally sensitive dielectric layer 12 includes at least one of materials having a temperature coefficient of resistance greater than a predetermined value, which is prepared from titanium oxide, vanadium oxide, amorphous silicon, amorphous germanium, amorphous silicon germanium oxide, silicon, germanium, silicon germanium oxide, graphene, a barium strontium titanate film, copper or platinum, and the predetermined value may be, for example, 0.015/K. Specifically, the first dielectric layer 13 serves as a supporting layer, the second dielectric layer 15 serves as a passivation layer, the supporting layer is used for supporting an upper film layer in the suspended micro-bridge structure 40 after the sacrificial layer is released, the heat-sensitive dielectric layer 12 is used for converting infrared temperature detection signals into infrared detection electric signals, the electrode layer 14 is used for transmitting the infrared detection electric signals converted from the heat-sensitive dielectric layer 12 to the CMOS measurement circuit system 1 through the beam structures 11 on the left side and the right side, the two beam structures 11 respectively transmit positive and negative signals of the infrared detection electric signals, a reading circuit in the CMOS measurement circuit system 1 realizes non-contact infrared temperature detection through analysis of the acquired infrared detection electric signals, and the passivation layer is used for protecting the electrode layer 14 from oxidation or corrosion. In addition, corresponding to the absorption plate 10 and the beam structure 11, the electrode layer 14 is located in a closed space formed by the first dielectric layer 13, namely the support layer, and the second dielectric layer 15, namely the passivation layer, so that the protection of the electrode layer 14 in the absorption plate 10 and the beam structure 11 is realized.

As shown in fig. 3, since the beam structure 11 includes the first dielectric layer 13, the electrode layer 14 and the second dielectric layer 15, the absorption plate 10 includes the first dielectric layer 13, the electrode layer 14, the heat sensitive dielectric layer 12 and the second dielectric layer 15, and under the condition that the thicknesses of the same films are the same, the total thickness of the beam structure 11 is smaller than the total thickness of the absorption plate 10, which is beneficial to further reducing the thermal conductivity of the beam structure 11, and further reducing the influence of the thermal conductivity generated by the beam structure 11 on the electric signal generated by the suspended microbridge structure 40, and is beneficial to improving the infrared detection performance of the infrared detector pixel and the infrared detector including the infrared detector pixel. Exemplarily, as shown in fig. 3, the thickness of the first medium layer 13 in the beam structure 11 may also be set not greater than the thickness of the first medium layer 13 in the absorber plate 10; and/or the thickness of the second medium layer 15 in the beam structure 11 is not greater than the thickness of the second medium layer 15 in the absorption plate 10, that is, the thickness of the first medium layer 13 in the beam structure 11 is set to be less than or equal to the thickness of the first medium layer 13 in the absorption plate 10, or the thickness of the second medium layer 15 in the beam structure 11 is set to be less than or equal to the thickness of the second medium layer 15 in the absorption plate 10, or the thickness of the first medium layer 13 in the beam structure 11 is set to be less than or equal to the thickness of the first medium layer 13 in the absorption plate 10 and the thickness of the second medium layer 15 in the beam structure 11 is set to be less than or equal to the thickness of the second medium layer 15 in the absorption plate 10. Specifically, the first dielectric layer 13 in the beam structure 11 may be etched more than the first dielectric layer 13 in the absorber plate 10 when etching the first dielectric layer 13 in the beam structure 11, or the first dielectric layer 13 in the beam structure 11 may be made thicker when making the first dielectric layer 13 in the absorber plate 10, so that the thickness of the first dielectric layer 13 in the beam structure 11 is smaller than the thickness of the first dielectric layer 13 in the absorber plate 10. Likewise, the second dielectric layer 15 in the beam structure 11 is etched with respect to the second dielectric layer 15 in the absorber plate 10 when etching the second dielectric layer 15 in the absorber plate 10, or the second dielectric layer 15 in the beam structure 11 is made thicker when making the second dielectric layer 15 in the absorber plate 10, so that the thickness of the second dielectric layer 15 in the beam structure 11 is smaller than the thickness of the second dielectric layer 15 in the absorber plate 10. Thereby, the thickness of the first medium layer 13 in the beam structure 11 is set to be not more than the thickness of the first medium layer 13 in the absorber plate 10; and/or, the thickness of the second dielectric layer 15 in the beam structure 11 is not more than the thickness of the second dielectric layer 15 in the absorption plate 10, so as to further ensure that the total thickness of the beam structure 11 is less than the total thickness of the absorption plate 10, which is beneficial to further reducing the thermal conductance of the beam structure 11, further reducing the influence of the thermal conductance generated by the beam structure 11 on the electric signal generated by the suspended micro-bridge structure 40, and being beneficial to improving the infrared detection performance of the infrared detector pixel and the infrared detector comprising the infrared detector pixel.

Illustratively, the material constituting the electrode layer 14 may be configured to include at least one of titanium, titanium nitride, tantalum nitride, titanium tungsten alloy, nickel chromium alloy, nickel platinum alloy, nickel silicon alloy, nickel, chromium, platinum, tungsten, aluminum, or copper, wherein when the material of the electrode layer 14 is at least one of titanium, titanium nitride, tantalum, or tantalum nitride, the electrode layer 14 is preferably configured to be covered by the first dielectric layer 13 and the second dielectric layer 15, and the electrode layer 14 is prevented from being affected by the etching process.

Fig. 4 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in the embodiment of the present disclosure. Combine fig. 1 to 4, can set up infrared detector and still include reinforced structure 16, reinforced structure 16 corresponds the setting of column structure 6 position and reinforced structure 16 is located one side that CMOS measurement circuit system 1 was kept away from to column structure 6, reinforced structure 16 is including aggravating massive structure, reinforced structure 16 is used for strengthening the connection steadiness between column structure 6 and the beam structure 11, reinforced structure 16 can effectively strengthen the mechanical stability between column structure 6 and the beam structure 11 promptly, thereby promote infrared detector pixel and the infrared detector's that includes the infrared detector pixel structural stability, optimize infrared detector pixel and the infrared detector's that includes the infrared detector pixel electricity connection characteristic.

Exemplarily, as shown in fig. 4, a weighted bulk structure may be provided on a side of the beam structure 11 away from the CMOS measurement circuitry 1 and the weighted bulk structure is provided in contact with the beam structure 11. Specifically, the weighting block structure is arranged on one side of the beam structure 11 far away from the CMOS measurement circuit system 1 and is in contact with the beam structure 11, which is equivalent to adding a cover plate at a position of the beam structure 11 corresponding to the columnar structure 6, and pressing the beam structure by using the self weight of the reinforcing structure 16, so as to enhance the mechanical strength between the beam structure 11 and the columnar structure 6 and improve the structural stability of the infrared detector. Exemplarily, with reference to fig. 2 and 3, the beam structure 11 may also be provided with a through hole formed at a position corresponding to the pillar structure 6, the through hole exposing at least a portion of the pillar structure 6, and the weighted block structure includes a first portion filling the through hole and a second portion located outside the through hole, and an orthographic projection of the second portion covers an orthographic projection of the first portion. Specifically, a hollow-out area is formed at a position of the beam structure 11 corresponding to the columnar structure 6, that is, a through hole is formed, a second part of the weighting block structure outside the through hole and a first part of the weighting block structure inside the through hole are integrally formed, the first part is filled or embedded into the through hole and is in contact with the columnar structure 6, an orthographic projection of the second part covers an orthographic projection of the first part, that is, the area of the second part is larger than that of the first part. In the infrared detector pixel, the reinforcing structure 16 is equivalent to a rivet structure formed by a first part and a second part, the bottom surface of the first part is contacted with the top surface of the columnar structure, the side surface of the first part is also contacted with the side surface of a hollow area formed by the beam structure, and the lower surface of the second part is contacted with the outer surface of the through hole. Therefore, when the self gravity of the reinforcing structure 16 is utilized to press the beam structure 11, the contact area between the reinforcing structure 16 and the columnar structure 6 and the beam structure 11 is increased, the mechanical strength between the beam structure 11 and the columnar structure 6 is further increased, and the structural stability of the infrared detector is improved.

Illustratively, the material that may be provided to form the reinforcing structure 16, i.e., the weighting block structure, includes at least one of amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride, silicon carbonitride, silicon oxide, silicon, germanium, silicon germanium, aluminum, copper, tungsten, gold, platinum, nickel, chromium, titanium tungsten alloy, nickel-chromium alloy, nickel-platinum alloy, or nickel-silicon alloy. Specifically, the reinforcing structure 16 may be a single-layer structure formed by depositing a medium or a metal, or may be a multi-layer structure formed by stacking two, three, or more single-layer structures, where amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon, silicon carbide, aluminum oxide, silicon nitride, silicon carbonitride, silicon, germanium, silicon germanium, aluminum, copper, tungsten, gold, platinum, nickel, chromium, titanium tungsten alloy, nichrome, nickel platinum alloy, and nickel silicon alloy are not corroded by gas-phase hydrogen fluoride, carbon tetrafluoride, or trifluoromethane, so that the reinforcing structure 16 is not affected in a subsequent process of corroding a sacrificial layer by gas-phase hydrogen fluoride, carbon tetrafluoride, or trifluoromethane to release the sacrificial layer, thereby ensuring that the mechanical strength of the joint between the beam structure 11 and the columnar structure 6 can be enhanced by the reinforcing structure 16, and preventing the beam structure 11 and the columnar structure 6 from falling off due to insecure connection, thereby enhancing the structural stability of the infrared detector. In addition, when the material constituting the reinforcing structure 16 includes silicon oxide, since silicon oxide may be corroded by gas-phase hydrogen fluoride, carbon tetrafluoride, or trifluoromethane, it is preferable that the reinforcing structure 16 is disposed in a closed space surrounded by the first dielectric layer 13 and the second dielectric layer 15. It should be noted that whether reinforcing structure 16 is a metallic structure or a non-metallic structure, it is necessary to ensure that the arrangement of reinforcing structure 16 does not affect the electrical connection relationship in the infrared detector.

Alternatively, with reference to fig. 1 to 4, the pillar structures 6 may be provided to include solid pillar structures, the solid pillar structures include solid structures 601, and the material constituting the solid structures 601 includes at least one of tungsten, copper, or aluminum. For example, as shown in fig. 2 to fig. 5, the sidewall of the solid structure 601 may be disposed in contact with a sacrificial layer (not shown in fig. 2 to fig. 5), the material constituting the solid structure 601 includes at least one of tungsten, copper, or aluminum, and the sidewall of the solid structure 601 is disposed in contact with the sacrificial layer, so that the manufacturing process of the columnar structure 6 is simple and easy to implement, which is beneficial to reducing the difficulty in manufacturing the entire infrared detector.

Fig. 5 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in an embodiment of the present disclosure. Different from the infrared detector with the structure shown in fig. 2 to 4, the infrared detector with the structure shown in fig. 5 is provided with the sidewall of the solid structure 601 coated with at least one dielectric layer 602 and the solid structure 601 disposed in contact with one dielectric layer 602, fig. 5 exemplarily provides that the sidewall of the solid structure 601 is coated with one dielectric layer 602 and the solid structure 601 disposed in contact with the dielectric layer 602, the material constituting the solid structure 601 includes at least one of tungsten, copper or aluminum, and the material constituting the dielectric layer 602 may include at least one of silicon oxide, silicon nitride, silicon carbide, amorphous carbon, aluminum oxide, titanium oxide, vanadium oxide, amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous germanium oxygen, silicon, germanium, silicon germanium, silicon germanium oxygen, graphene, copper or platinum.

Specifically, as shown in fig. 5, at least one dielectric layer 602 covering the solid structure 601 may play an electrical insulation role, the dielectric layer 602 is used to protect the solid structure 601 from being corroded by external materials, the dielectric layer 602 may also be used as an auxiliary supporting structure of the columnar structure 6, and the auxiliary supporting structure and the solid structure 601 support the suspended micro-bridge structure 40 together, which is beneficial to improving the mechanical stability of the columnar structure 6, so as to improve the structural stability of the infrared sensor. In addition, the material forming the dielectric layer 602 may include at least one of silicon oxide, silicon nitride, silicon carbide, amorphous carbon, aluminum oxide, titanium oxide, vanadium oxide, amorphous silicon, amorphous germanium, amorphous silicon germanium oxide, silicon, germanium, silicon germanium oxide, graphene, copper, or platinum, and none of the foregoing materials is corroded by gas-phase hydrogen fluoride, carbon tetrafluoride, or trifluoromethane, so that the dielectric layer 602 covering the solid structure 601 is not corroded when the sacrificial layer is corroded by gas-phase hydrogen fluoride, carbon tetrafluoride, and trifluoromethane in the subsequent process steps. For example, as shown in fig. 5, the dielectric layer 602 covering the solid structure 601 may be set as the first dielectric layer 13 in the suspended microbridge structure 40, or the dielectric layer covering the solid structure 601 may also be a separately manufactured dielectric layer, or the dielectric layer covering the solid structure 601 may also be set as the second dielectric layer 15 or the heat-sensitive dielectric layer 12 in the suspended microbridge structure 40.

Fig. 6 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in an embodiment of the present disclosure. Unlike the infrared detector having the structure shown in fig. 2 to 5, the infrared detector having the structure shown in fig. 6 has a sidewall of the solid structure 601 and a surface of the solid structure 601 adjacent to the CMOS measurement circuit system 1 coated with at least one adhesion layer 603, fig. 6 exemplarily provides a sidewall of the solid structure 601 and a surface of the solid structure 601 adjacent to the CMOS measurement circuit system 1 coated with one adhesion layer 603, a sidewall of the outermost periphery of the columnar structure 6, which is far from the solid structure 601, is coated with a dielectric layer 604, a material constituting the solid structure 601 includes at least one of tungsten, copper or aluminum, a material constituting the adhesion layer 603 includes at least one of titanium, titanium nitride, tantalum or tantalum nitride, and a material constituting the dielectric layer 604 includes at least one of silicon oxide, silicon nitride, silicon carbide, amorphous carbon, aluminum oxide, titanium oxide, vanadium oxide, amorphous silicon, amorphous germanium, amorphous silicon germanium-oxygen, silicon, germanium, silicon-oxygen, graphene, copper or platinum.

Specifically, as shown in fig. 6, adhesion layer 603 is used for reinforcing the connectivity between columnar structure 6 and support base 42, including intensifier mechanical connection performance, promote structural stability, also include intensifier electrical connection performance, reduce contact resistance, reduce the loss among the signal transmission process, infrared detector's infrared detection performance has been promoted, and still surround solid structure 601's side through setting up adhesion layer 603, can increase adhesion layer 603 and solid structure 601's area of contact, be equivalent to the transmission channel of widening the signal of telecommunication, columnar structure 6's transmission resistance has been reduced, thereby further reduced signal transmission loss, infrared detector's infrared detection performance has been promoted. In addition, the material forming the adhesion layer 603 includes at least one of titanium, titanium nitride, tantalum, or tantalum nitride, and the adhesion layer 603 is formed by using at least one of the four conductive materials, so that the requirement of enhancing the mechanical and electrical connection performance between the supporting base 42 and the columnar structure 6 by using the adhesion layer 603 can be met, and the requirement of preparing the adhesion layer 603 by using a CMOS process, that is, the requirement of integrating the CMOS process, can be met.

As shown in fig. 6, the sidewall of the adhesion layer 603 on the outermost periphery in the columnar structure 6, which is far away from the solid structure 601, is further coated with a dielectric layer 604, and when the adhesion layer 603 is used to enhance the connection performance between the columnar structure 6 and the supporting base 42, the dielectric layer 604 coating the sidewall of the adhesion layer 603 plays a role of insulation protection, and the dielectric layer 604 can be used to play a role of auxiliary support for the columnar structure 6, so as to improve the structural stability and the infrared detection performance of the infrared detector. Similarly, the material forming the dielectric layer 604 may include at least one of silicon oxide, silicon nitride, silicon carbide, amorphous carbon, aluminum oxide, titanium oxide, vanadium oxide, amorphous silicon, amorphous germanium, amorphous silicon germanium oxide, silicon, germanium, silicon germanium oxide, graphene, copper, or platinum, which are not corroded by the gas phase hydrogen fluoride, carbon tetrafluoride, or trifluoromethane, and thus the dielectric layer 604 covering the adhesion layer 603 is not corroded when the sacrificial layer is corroded by the gas phase hydrogen fluoride, carbon tetrafluoride, and trifluoromethane in the subsequent process steps. For example, as shown in fig. 6, the adhesion layer 603 covering the solid structure 601 may be disposed as the electrode layer 14 in the suspended microbridge structure 40, and the dielectric layer 604 covering the adhesion layer 603 is the first dielectric layer 13 in the suspended microbridge structure 40, or the adhesion layer 603 covering the solid structure 601 and/or the dielectric layer 604 covering the adhesion layer 603 may also be a separately fabricated film layer, or the dielectric layer covering the adhesion layer 603 may also be disposed as the second dielectric layer 15 or the heat-sensitive dielectric layer 12 in the suspended microbridge structure 40.

Alternatively, in conjunction with fig. 1 to 6, at least one hole-shaped structure may be formed on the absorption plate 10, wherein the hole-shaped structure penetrates through at least the medium layer in the absorption plate 10; and/or, at least one hole-shaped structure is formed on the beam structure 11, and the hole-shaped structure at least penetrates through the medium layer in the beam structure 11, that is, only the absorption plate 10, only the beam structure 11, or both the absorption plate 10 and the beam structure 11 may be provided with the hole-shaped structure. For example, whether the hole structures on the absorption plate 10 or the beam structure 11 are hole structures, the hole structures may be circular hole structures, square hole structures, polygonal hole structures, or irregular pattern hole structures, the shape of the hole structures on the absorption plate 10 and the beam structure 11 is not specifically limited by the embodiments of the present disclosure, and the number of the hole structures on the absorption plate 10 and the beam structure 11 is not specifically limited by the embodiments of the present disclosure.

Therefore, at least one hole-shaped structure is formed on the absorption plate 10, the hole-shaped structure at least penetrates through the dielectric layer in the absorption plate 10, a sacrificial layer which needs to be released finally is arranged between the reflection layer 4 and the absorption plate 10, the sacrificial layer needs to be corroded by chemical reagents at the end of the infrared detector manufacturing process when the sacrificial layer is released, and the hole-shaped structure on the absorption plate 10 is beneficial to increasing the contact area between the chemical reagents for releasing and the sacrificial layer and accelerating the release rate of the sacrificial layer. In addition, the area of the absorption plate 10 is larger than that of the beam structure 11, the hole-shaped structure on the absorption plate 10 is beneficial to releasing the internal stress of the absorption plate 10, optimizing the planarization degree of the absorption plate 10, and being beneficial to improving the structural stability of the absorption plate 10, so that the structural stability of the whole infrared detector is improved. In addition, at least one hole-shaped structure is formed on the beam structure 11, and the hole-shaped structure at least penetrates through the medium layer in the beam structure 11, so that the thermal conductance of the beam structure 11 is further reduced, and the infrared detection sensitivity of the infrared detector is improved.

As shown in fig. 2, for example, a hole structure on the absorber plate 10 may be provided to penetrate through the first medium layer 13 and the second medium layer 15 in the absorber plate 10, or a hole structure on the absorber plate 10 may be provided to penetrate through the first medium layer 13, the electrode layer 14, and the second medium layer 15 in the absorber plate 10, a hole structure on the beam structure 11 may penetrate through the first medium layer 13 and the second medium layer 15 in the beam structure 11 where the electrode layer 14 is not provided, or a hole structure on the beam structure 11 may penetrate through the first medium layer 13, the electrode layer 14, and the second medium layer 15 in the beam structure 11. With reference to fig. 3 to 6, for example, a hole structure on the absorber plate 10 may be disposed to penetrate through the first medium layer 13 and the second medium layer 15 in the absorber plate 10, or a hole structure on the absorber plate 10 may be disposed to penetrate through the first medium layer 13, the electrode layer 14, the heat-sensitive medium layer 12, and the second medium layer 15 in the absorber plate 10, a hole structure on the beam structure 11 may penetrate through the first medium layer 13 and the second medium layer 15 in the beam structure 11 where the electrode layer 14 is not disposed, or a hole structure on the beam structure 11 may penetrate through the first medium layer 13, the electrode layer 14, and the second medium layer 15 in the beam structure 11.

With reference to fig. 1 to 6, at least one layer of hermetic release isolation layer 3 may be included above the CMOS measurement circuitry 1, and the hermetic release isolation layer 3 is used to protect the CMOS measurement circuitry 1 from process influence during the release etching process for fabricating the CMOS infrared sensing structure 2. Optionally, the close release isolation layer 3 is located at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 and/or in the CMOS infrared sensing structure 2, that is, the close release isolation layer 3 may be located at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2, or the close release isolation layer 3 is located in the CMOS infrared sensing structure 2, or the close release isolation layer 3 is located at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 and is provided with the close release isolation layer 3, and the close release isolation layer 3 is used for protecting the CMOS measurement circuit system 1 from erosion when a sacrificial layer is released by a corrosion process, and the close release isolation layer 3 at least includes a dielectric layer, and a dielectric material constituting the close release isolation layer 3 includes at least one of silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon, silicon germanium, silicon, germanium, silicon germanium alloy, amorphous carbon, or aluminum oxide.

Fig. 2 to 6 exemplarily show that the hermetic release insulating layer 3 is disposed in the CMOS infrared sensing structure 2, the hermetic release insulating layer 3 may be, for example, one or more dielectric layers disposed above the metal interconnection layer of the reflective layer 4, where exemplarily the hermetic release insulating layer 3 is disposed as one dielectric layer, the hermetic release insulating layer 3 is disposed on the reflective layer 4 and in contact with the reflective layer 4, and the solid structure 601 is electrically connected to the reflective layer 4, i.e., the supporting base 42, through a through hole penetrating through the hermetic release insulating layer 3. Illustratively, the material constituting the hermetic release barrier layer 3 may include at least one of silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, a silicon germanium alloy, amorphous carbon, or aluminum oxide, and the thickness of the hermetic release barrier layer 3 is smaller than that of the sacrificial layer. The resonant cavity of the infrared detector is realized by releasing the vacuum cavity after the silicon oxide sacrificial layer, the reflecting layer 4 is used as the reflecting layer of the resonant cavity, the sacrificial layer is positioned between the reflecting layer 4 and the suspended microbridge structure 40, and when at least one layer of closed release isolating layer 3 positioned on the reflecting layer 4 is arranged to select silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium-silicon, germanium, silicon-germanium alloy, amorphous carbon or aluminum oxide and other materials as a part of the resonant cavity, the reflecting effect of the reflecting layer 4 is not influenced, the height of the resonant cavity can be reduced, the thickness of the sacrificial layer is further reduced, and the release difficulty of the sacrificial layer formed by silicon oxide is reduced. In addition, the sealed release isolation layer 3 and the columnar structure 6 are arranged to form a sealed structure, so that the CMOS measurement circuit system 1 is completely separated from the sacrificial layer, and the CMOS measurement circuit system 1 is protected.

Fig. 7 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in the embodiment of the disclosure. On the basis of the above embodiment, fig. 7 also provides that the hermetic release isolation layer 3 is located in the CMOS infrared sensing structure 2, the hermetic release isolation layer 3 may be, for example, one or more dielectric layers located above the metal interconnection layer of the reflective layer 4, here, the hermetic release isolation layer 3 is exemplarily shown to be one dielectric layer, the hermetic release isolation layer 3 is located on the reflective layer 4 and is disposed in contact with the reflective layer 4, the pillar-shaped structure 6 is electrically connected to the reflective layer 4, i.e., the supporting base 42, through a through hole penetrating through the hermetic release isolation layer 3, and the hermetic release isolation layer 3 covers the pillar-shaped structure 6, at this time, the material constituting the hermetic release isolation layer 3 may include at least one of silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon, germanium, silicon germanium alloy, amorphous carbon, or aluminum oxide, and the thickness of the hermetic release isolation layer 3 is also smaller than the thickness of the sacrificial layer. Through setting up airtight release insulating layer 3 cladding columnar structure 6, can utilize airtight release insulating layer 3 as the support of columnar structure 6 department on the one hand, improve columnar structure 6's stability, guarantee columnar structure 6 and unsettled microbridge structure 40 and support base 42's electricity and be connected. On the other hand, the airtight release insulating layer 3 coating the columnar structure 6 can reduce the contact between the columnar structure 6 and the external environment, reduce the contact resistance between the columnar structure 6 and the external environment, further reduce the noise of the infrared detector pixel, improve the detection sensitivity of the infrared detection sensor, and prevent the electrical breakdown of the exposed metal of the columnar structure 6. Similarly, the resonant cavity of the infrared detector is realized by releasing the vacuum cavity after the silicon oxide sacrificial layer, the reflective layer 4 is used as the reflective layer of the resonant cavity, the sacrificial layer is located between the reflective layer 4 and the suspended microbridge structure 40, and when at least one layer of airtight release isolation layer 3 located on the reflective layer 4 is arranged to select silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, silicon germanium alloy, amorphous carbon or aluminum oxide and other materials as a part of the resonant cavity, the reflection effect of the reflective layer 4 is not affected, the height of the resonant cavity can be reduced, the thickness of the sacrificial layer is further reduced, and the release difficulty of the sacrificial layer formed by silicon oxide is reduced. In addition, the sealing release isolation layer 3 and the columnar structure 6 are arranged to form a sealing structure, so that the CMOS measurement circuit system 1 is completely separated from the sacrificial layer, and the protection of the CMOS measurement circuit system 1 is realized.

Fig. 8 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in the embodiment of the disclosure. Unlike the infrared detector having the structure shown in the above embodiment, in the infrared detector having the structure shown in fig. 8, the close release isolation layer 3 is located at the interface between the CMOS measurement circuitry 1 and the CMOS infrared sensing structure 2, for example, the close release isolation layer 3 is located between the reflective layer 4 and the CMOS measurement circuitry 1, that is, the close release isolation layer 3 is located below the metal interconnection layer of the reflective layer 4, and the support base 42 is electrically connected to the CMOS measurement circuitry 1 through a through hole penetrating through the close release isolation layer 3. Specifically, since the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 are both formed by using a CMOS process, after the CMOS measurement circuit system 1 is formed, a wafer including the CMOS measurement circuit system 1 is transferred to a next process to form the CMOS infrared sensing structure 2, since silicon oxide is a most commonly used dielectric material in the CMOS process, and silicon oxide is mostly used as an insulating layer between metal layers on the CMOS circuit, if no insulating layer is used as a barrier when silicon oxide with a thickness of about 2um is corroded, the circuit will be seriously affected, and in order to ensure that the silicon oxide medium on the CMOS measurement circuit system is not corroded when the silicon oxide of a sacrificial layer is released, a closed release insulating layer 3 is provided at an interface between the CMOS measurement circuit system 1 and the CMOS infrared sensing structure 2 according to the embodiment of the present disclosure. After the CMOS measuring circuit system 1 is prepared and formed, a closed release isolation layer 3 is prepared and formed on the CMOS measuring circuit system 1, the CMOS measuring circuit system 1 is protected by the closed release isolation layer 3, in order to ensure the electric connection between the support base 42 and the CMOS measuring circuit system 1, after the closed release isolation layer 3 is prepared and formed, a through hole is formed in the area of the closed release isolation layer 3 corresponding to the support base 42 by adopting an etching process, and the support base 42 is electrically connected with the CMOS measuring circuit system 1 through the through hole. In addition, the closed release isolation layer 3 and the support base 42 are arranged to form a closed structure, so that the CMOS measurement circuit system 1 is completely separated from the sacrificial layer, and the CMOS measurement circuit system 1 is protected.

Illustratively, the material provided to constitute hermetic release barrier layer 3 includes at least one of silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, a silicon germanium alloy, amorphous carbon, or aluminum oxide. Specifically, silicon carbide, silicon carbonitride, silicon nitride, amorphous silicon, amorphous germanium, amorphous silicon germanium, silicon, germanium, a silicon germanium alloy, amorphous carbon, or aluminum oxide are all CMOS process corrosion-resistant materials, i.e., these materials are not corroded by the sacrificial layer release agent, so the hermetic release barrier layer 3 can be used to protect the CMOS measurement circuitry 1 from corrosion when the corrosion process is performed to release the sacrificial layer. In addition, the closed release isolation layer 3 covers the CMOS measurement circuit system 1, and the closed release isolation layer 3 can also be used for protecting the CMOS measurement circuit system 1 from being influenced by the process in the release etching process for manufacturing the CMOS infrared sensing structure 2. In addition, when being provided with at least one deck airtight release insulating layer 3 on reflection stratum 4, the material that sets up to constitute airtight release insulating layer 3 includes silicon, germanium, silicon germanium alloy, amorphous silicon, amorphous germanium, amorphous silicon germanium, amorphous carbon, carborundum, aluminium oxide, at least one in silicon nitride or the silicon carbonitride, when setting up airtight release insulating layer 3 and improving the stability of columnar structure 6, airtight release insulating layer 3 can hardly influence the reflection course in the resonant cavity, can avoid airtight release insulating layer 3 to influence the reflection course of resonant cavity, and then avoid airtight release insulating layer 3 to infrared detector detection sensitivity's influence.

With reference to fig. 1 to 8, a CMOS fabrication process of the CMOS infrared sensing structure 2 includes a Metal interconnection process, a via process, an IMD (Inter Metal Dielectric) process, and an RDL (redistribution) process, where the CMOS infrared sensing structure 2 includes at least two Metal interconnection layers, at least two Dielectric layers, and a plurality of interconnection vias, the Dielectric layers include at least one sacrificial layer and one thermal sensitive Dielectric layer, the Metal interconnection layers include at least a reflective layer 4 and an electrode layer 14, the thermal sensitive Dielectric layer includes a thermal sensitive material having a resistance temperature coefficient greater than a predetermined value, for example, the resistance temperature coefficient may be greater than or equal to 0.015/K, the thermal sensitive material having a resistance temperature coefficient greater than the predetermined value forms the thermal sensitive Dielectric layer, and the thermal sensitive Dielectric layer is configured to convert a temperature change corresponding to infrared radiation absorbed by the thermal sensitive Dielectric layer into a resistance change, and further convert an infrared target signal into a signal capable of being electrically read through the CMOS measurement circuit system 1. In addition, the heat-sensitive dielectric layer comprises a heat-sensitive material with a resistance temperature coefficient larger than a set value, and the resistance temperature coefficient can be larger than or equal to 0.015/K, so that the detection sensitivity of the infrared detector can be improved.

Specifically, the metal interconnection process is used to achieve electrical connection between the upper and lower metal interconnection layers, for example, to achieve electrical connection between the pillar structure 6 and the supporting pedestal 42, the via process is used to form an interconnection via for connecting the upper and lower metal interconnection layers, for example, to form an interconnection via for connecting the pillar structure 6 and the supporting pedestal 42, the IMD process is used to achieve isolation between the upper and lower metal interconnection layers, that is, electrical insulation, for example, electrical insulation between the electrode layer 14 and the reflector plate 41 in the absorber plate 10 and the beam structure 11, and the RDL process is a redistribution layer process, that is, a process in which a layer of metal is re-laid above the top metal of the circuit and is electrically connected to the top metal of the circuit, for example, a tungsten pillar, and the RDL process is used to re-fabricate the reflective layer 4 in the infrared detector on the top metal of the CMOS measurement circuit system 1, and the supporting pedestal 42 on the reflective layer 4 is electrically connected to the top metal of the CMOS measurement circuit system 1. In addition, as shown in fig. 2, the CMOS manufacturing process of the CMOS measurement circuit system 1 may also include a metal interconnection process and a via process, the CMOS measurement circuit system 1 includes metal interconnection layers 101, dielectric layers 102 and a silicon substrate 103 at the bottom, which are arranged at intervals, and the upper and lower metal interconnection layers 101 are electrically connected through vias 104.

With reference to fig. 1 to 8, the CMOS measurement circuit system 1 is configured to measure and process an array resistance value formed by one or more CMOS infrared sensing structures 2 and convert an infrared signal into an electrical image signal, and the infrared detector includes a plurality of infrared detector pixels arranged in an array, where each infrared detector pixel includes one CMOS infrared sensing structure 2. Specifically, the resonant cavity may be formed by a cavity between the reflective layer 4 and the heat-sensitive medium layer in the absorption plate 10, for example, the infrared light is reflected back and forth in the resonant cavity through the absorption plate 10 to improve the detection sensitivity of the infrared detector, and due to the arrangement of the columnar structure 6, the beam structure 11 and the absorption plate 10 form the suspended micro-bridge structure 10 for controlling the heat transfer, and the columnar structure 6 is electrically connected to the supporting base 42 and the corresponding beam structure 11 and is used for supporting the suspended micro-bridge structure 40 on the columnar structure 6.

Fig. 9 is a schematic structural diagram of a CMOS measurement circuit system according to an embodiment of the present disclosure. With reference to fig. 1 to 9, the cmos measurement circuit system 1 includes a bias generation circuit 7, a column-level analog front-end circuit 8 and a row-level circuit 9, an input end of the bias generation circuit 7 is connected to an output end of the row-level circuit 9, an input end of the column-level analog front-end circuit 8 is connected to an output end of the bias generation circuit 7, the row-level circuit 9 includes row-level mirror image elements Rsm and row selection switches K1, and the column-level analog front-end circuit 8 includes blind image elements RD; the row-level circuit 9 is distributed in each pixel, selects a signal to be processed according to a row strobe signal of the time sequence generating circuit, and outputs a current signal to the column-level analog front-end circuit 8 under the action of the bias generating circuit 7 to perform current-voltage conversion and output; the row stage circuit 9 outputs a third bias voltage VRsm to the bias generation circuit 7 when being controlled by the row selection switch K1 to be gated, the bias generation circuit 7 outputs a first bias voltage V1 and a second bias voltage V2 according to an input constant voltage and the third bias voltage VRsm, and the column stage analog front-end circuit 8 obtains two currents according to the first bias voltage V1 and the second bias voltage V2, performs transimpedance amplification on a difference between the two generated currents, and outputs the amplified current as an output voltage.

Specifically, the row-level circuit 9 includes a row-level mirror image element Rsm and a row selection switch K1, and the row-level circuit 9 is configured to generate a third bias voltage VRsm according to a gating state of the row selection switch K1. Illustratively, the row-level image elements Rsm may be subjected to a shading process, so that the row-level image elements Rsm are subjected to a fixed radiation of a shading sheet having a temperature constantly equal to the substrate temperature, the row selection switch K1 may be implemented by a transistor, the row selection switch K1 is closed, and the row-level image elements Rsm are connected to the bias generation circuit 7, that is, the row-level circuit 9 outputs the third bias voltage VRsm to the bias generation circuit 7 when being controlled by the row selection switch K1 to be turned on. The bias generating circuit 7 may include a first bias generating circuit 71 and a second bias generating circuit 72, the first bias generating circuit 71 being configured to generate a first bias voltage V1 according to an input constant voltage, which may be, for example, a positive power supply signal with a constant voltage. The second bias generating circuit 72 may include a bias control sub-circuit 721 and a plurality of gate-driving sub-circuits 722, the bias control sub-circuit 721 controlling the gate-driving sub-circuits 722 to generate the corresponding second bias voltages V2, respectively, according to the third bias voltage VRsm.

The column-level analog front-end circuit 8 includes a plurality of column control sub-circuits 81, the column control sub-circuits 81 are disposed in correspondence with the gate driving sub-circuits 722, and exemplarily, the column control sub-circuits 81 may be disposed in one-to-one correspondence with the gate driving sub-circuits 722, and the gate driving sub-circuits 722 are configured to provide the second bias voltage V2 to the corresponding column control sub-circuits 81 according to their own gate states. For example, it may be set that when the gate driving sub-circuit 722 is gated, the gate driving sub-circuit 722 supplies the second bias voltage V2 to the corresponding column control sub-circuit 81; when the gate driving sub-circuit 722 is not gated, the gate driving sub-circuit 722 stops supplying the second bias voltage V2 to the corresponding column control sub-circuit 81.

The column-level analog front-end circuit 8 comprises an effective pixel RS and a blind pixel RD, the column control sub-circuit is used for generating a first current I1 according to a first bias voltage V1 and the blind pixel RD, generating a second current I2 according to a second bias voltage V2 and the effective pixel RS, performing transimpedance amplification on a difference value of the first current I1 and the second current I2, and outputting the amplified difference value, and the temperature drift amounts of the row-level image pixel Rsm and the effective pixel RS are the same at the same ambient temperature.

Illustratively, the row-level image elements Rsm are thermally insulated from the CMOS measurement circuitry 1 and are shaded, and the row-level image elements Rsm are subjected to a fixed radiation from a shade sheet having a temperature constantly equal to the substrate temperature. The absorption plate 10 of the active pixel RS is thermally insulated from the CMOS measurement circuitry 1 and the active pixel RS receives external radiation. The absorbing plates 10 of the row-level mirror image elements Rsm and the effective elements RS are thermally insulated from the CMOS measuring circuit system 1, so that the row-level mirror image elements Rsm and the effective elements RS have a self-heating effect.

When the row selection switch K1 is used for gating the corresponding row-level mirror image element Rsm, the resistance value of both the row-level mirror image element Rsm and the effective pixel RS changes due to joule heat, but when the row-level mirror image element Rsm and the effective pixel RS are subjected to the same fixed radiation, the resistance value of the row-level mirror image element Rsm and the resistance value of the effective pixel RS are the same, the temperature coefficients of the row-level mirror image element Rsm and the temperature coefficient of the effective pixel RS are also the same, the temperature drift amounts of the row-level mirror image element Rsm and the effective pixel RS at the same environmental temperature are the same, the change of the row-level mirror image element Rsm and the effective pixel RS at the same environmental temperature are synchronized, the resistance value change of the row-level mirror image element Rsm and the effective pixel RS due to the self-heating effect is effectively compensated, and the stable output of the CMOS measurement circuit system 1 is realized.

In addition, by arranging the second bias generating circuit 72 to include a bias control sub-circuit 721 and a plurality of gate driving sub-circuits 722, the bias control sub-circuit 721 is configured to control the gate driving sub-circuits 722 to generate corresponding second bias voltages V2 respectively according to the row control signal, so that each row of pixels has one path to drive the entire columns of pixels in the row individually, thereby reducing the requirement for the second bias voltages V2, that is, improving the driving capability of the bias generating circuit 7, and facilitating the use of the CMOS measurement circuit system 1 to drive a larger-scale infrared detector pixel array. In addition, the specific detailed operation principle of the CMOS measurement circuit system 1 is well known to those skilled in the art, and will not be described herein.

Alternatively, the CMOS infrared sensing structure 2 may be disposed on a metal interconnect layer of the CMOS measurement circuitry 1 or fabricated on the same layer. Specifically, the metal interconnection layer of the CMOS measurement circuitry 1 may be a top metal layer in the CMOS measurement circuitry 1, and in conjunction with fig. 1 to 8, the CMOS infrared sensing structure 2 may be fabricated on the top metal interconnection layer of the CMOS measurement circuitry 1, and the CMOS infrared sensing structure 2 is electrically connected to the CMOS measurement circuitry 1 through a supporting base 42 on the top metal interconnection layer of the CMOS measurement circuitry 1, so as to transmit the electrical signal converted by the infrared signal to the CMOS measurement circuitry 1.

Fig. 10 is a schematic cross-sectional structure diagram of another infrared detector pixel provided in an embodiment of the present disclosure. As shown in fig. 10, the CMOS infrared sensing structure 2 may also be prepared on the same layer as the metal interconnection layer of the CMOS measurement circuitry 1, that is, the CMOS measurement circuitry 1 and the CMOS infrared sensing structure 2 are arranged on the same layer, for example, as shown in fig. 10, the CMOS infrared sensing structure 2 may be arranged on one side of the CMOS measurement circuitry 1, and the top of the CMOS measurement circuitry 1 may also be provided with a hermetic release isolation layer 3 to protect the CMOS measurement circuitry 1.

Optionally, in conjunction with fig. 1 to 10, the sacrificial layer is used to make the CMOS infrared sensing structure 2 form a hollow structure, the material constituting the sacrificial layer is silicon oxide, and the sacrificial layer is etched by a post-CMOS process. For example, the post-CMOS process may etch the sacrificial layer using at least one of gases having corrosive properties to silicon oxide, such as gaseous hydrogen fluoride, carbon tetrafluoride, and trifluoromethane. Specifically, a sacrificial layer (not shown in fig. 1 to 10) is provided between the reflective layer 4 and the suspended microbridge structure 40, and when the closed release isolation layer 3 is provided on the reflective layer 4, the sacrificial layer is provided between the closed release isolation layer 3 and the suspended microbridge structure 40, and the sacrificial layer is made of silicon oxide, so as to be compatible with a CMOS process, and a post-CMOS process can be adopted, that is, the post-CMOS process corrodes the sacrificial layer to release the sacrificial layer in the final infrared detection chip product.

Optionally, the absorption plate 10 is used for absorbing the infrared target signal and converting the infrared target signal into an electrical signal, the absorption plate 10 includes a metal interconnection layer and at least one thermal sensitive medium layer, the metal interconnection layer in the absorption plate 10 is an electrode layer 14 in the absorption plate 10 for transmitting the electrical signal converted from the infrared signal. The beam structures 11 and the columnar structures 6 are used for transmitting electrical signals and for supporting and connecting the absorption plates 10, the electrode layers 14 in the absorption plates 10 comprise two patterned electrode structures, the two patterned electrode structures output positive electrical signals and grounding electrical signals respectively, and the positive electrical signals and the grounding electrical signals are transmitted to the supporting base 42 electrically connected with the columnar structures 6 through the different beam structures 11 and the different columnar structures 6 and then transmitted to the CMOS measurement circuit system 1. The beam structure 11 comprises at least a metal interconnection layer, the metal interconnection layer in the beam structure 11 is an electrode layer 14 in the beam structure 11, and the electrode layer 14 in the beam structure 11 and the electrode layer 14 in the absorber plate 10 are electrically connected. The beam structure 11 and the CMOS measurement circuit system 1 are connected by the columnar structure 6 through a metal interconnection process and a through hole process, the upper side of the columnar structure 6 is electrically connected to the electrode layer 14 in the beam structure 11 through a through hole penetrating through the sacrificial layer, the lower side of the columnar structure 6 is electrically connected to the corresponding support base 42 through a through hole penetrating through the dielectric layer on the support base 42, and the electrode layer 14 in the beam structure 11 is electrically connected to the corresponding support base 42 through the corresponding columnar structure 6. The reflecting plate 41 is used for reflecting infrared signals and forms a resonant cavity with the heat-sensitive medium layer, that is, the reflecting plate 41 is used for reflecting infrared signals and forms a resonant cavity with the heat-sensitive medium layer, and the reflecting layer 4 comprises at least one metal interconnection layer which is used for forming a supporting base 42 and is also used for forming the reflecting plate 41.

Optionally, the infrared detector may further include a metamaterial structure and/or a polarization structure, and the metamaterial structure or the polarization structure is at least one metal interconnection layer. Illustratively, the metal interconnection layer constituting the metamaterial structure may include a plurality of metal repeating units arranged in an array, each metal repeating unit includes two diagonally arranged L-shaped patterned structures, and an infrared absorption spectrum band of the infrared detector is in a 3-30 μm band. A plurality of patterned hollow structures arranged in an array can be arranged on the metal interconnection layer forming the metamaterial structure, the patterned hollow structures are in an open ring shape, and the infrared absorption spectrum band of the infrared detector is 3-30 micrometers. The metal interconnection layer forming the metamaterial structure can also be provided with a plurality of linear strip structures and a plurality of inflection strip structures, the linear strip structures and the inflection strip structures are alternately arranged along the direction perpendicular to the linear strip structures, and the infrared absorption spectrum band of the infrared detector is 8-24 microns. A plurality of patterned hollow structures arranged in an array mode can be arranged on the metal interconnection layer forming the metamaterial structure, the patterned hollow structures are in a regular hexagon shape, and the infrared absorption spectrum band of the infrared detector is 3-30 micrometers. It should be noted that, in the embodiments of the present disclosure, specific patterns on the metal interconnection layer constituting the metamaterial structure are not limited, and it is sufficient to ensure that repeated patterns can realize functions of the metamaterial structure or the polarization structure.

Specifically, the metamaterial is a material for electromagnetic or optical beam regulation and control by controlling wavefront phase, amplitude and polarization based on the generalized snell's law, and can also be called as a super surface or a super structure, and the super surface or the super structure is an ultrathin two-dimensional array plane, so that the characteristics of electromagnetic waves such as phase, polarization mode, propagation mode and the like can be flexibly and effectively manipulated. The embodiment of the present disclosure utilizes a patterned structure to form an electromagnetic metamaterial structure, i.e., an artificial composite structure or a composite material having extraordinary electromagnetic properties is formed, so as to implement clipping of electromagnetic waves and light waves, thereby obtaining an electromagnetic wave absorption special device.

Fig. 11 is a schematic top view of a polarization structure according to an embodiment of the present disclosure. As shown in fig. 11, the polarization structure 26 may include a plurality of gratings 27 arranged in sequence, an interval between adjacent gratings 27 is 10nm to 500nm, the gratings 27 may be linear as shown in fig. 11, or may be curved as shown in fig. 12 and 13, the gratings 27 in the polarization structure 26 may be rotated or combined at any angle, and the polarization structure 26 may be disposed such that the CMOS sensing structure absorbs polarized light in a specific direction. Illustratively, the grating 27 may be a structure formed by etching a metal thin film, i.e., a metal interconnection layer. Specifically, polarization is an important information of light, and polarization detection can expand the information quantity from three dimensions, such as light intensity, light spectrum and space, to seven dimensions, such as light intensity, light spectrum, space, polarization degree, polarization azimuth angle, polarization ellipse ratio and rotation direction, and since the polarization degree of the ground object background is far smaller than that of the artificial target, the infrared polarization detection technology has very important application in the field of space remote sensing. In the existing polarization detection system, a polarization element is independent of a detector, and a polarizing film needs to be added on a lens of the whole machine or a polarization lens needs to be designed. The prior polarization detection system, which acquires polarization information by rotating a polarization element, has disadvantages of complicated optical elements and complicated optical path system. In addition, the polarization image acquired by combining the polarizer and the detector needs to be processed by an image fusion algorithm, which is not only complex but also relatively inaccurate.

According to the embodiment of the disclosure, the polarization structure 26 and the uncooled infrared detector are monolithically integrated, so that not only can monolithic integration of the polarization-sensitive infrared detector be realized, but also the difficulty of optical design is greatly reduced, the optical system is simplified, optical elements are reduced, and the cost of the optical system is reduced. In addition, the images acquired by the single-chip integrated polarization type uncooled infrared detector are original infrared image information, the CMOS measuring circuit system 1 can obtain accurate image information only by processing signals detected by the infrared detector without image fusion of the existing detector, and therefore authenticity and effectiveness of the images are greatly improved. In addition, the polarization structure 26 can also be located above the absorption plate 10 and is not in contact with the absorption plate 10, that is, the polarization structure 26 can be a suspended structure located above the suspended microbridge structure 40, the polarization structure 26 and the suspended microbridge structure 40 can adopt a column connection supporting mode or a bonding supporting mode, and the polarization structure 26 and the infrared detector pixel can be bonded in a one-to-one correspondence manner or can also adopt a whole chip bonding manner. Therefore, the independently suspended metal grating structure cannot cause deformation of the infrared sensitive micro-bridge structure, and the heat-sensitive characteristic of the sensitive film cannot be influenced.

Exemplarily, referring to fig. 1 to 13, the metamaterial structure is at least one metal interconnection layer, the polarization structure is at least one metal interconnection layer, and the metamaterial structure or the polarization structure may be at least one metal interconnection layer on a side of the first dielectric layer 13 adjacent to the CMOS measurement circuitry 1, for example, the metal interconnection layer constituting the metamaterial structure or the polarization structure may be disposed on a side of the first dielectric layer 13 adjacent to the CMOS measurement circuitry 1 and in contact with the first dielectric layer 13, that is, the metal interconnection layer is located at the lowest position of the suspended microbridge structure 40. For example, the meta-material structure or the polarization structure may also be at least one metal interconnection layer on the side of the second dielectric layer 15 away from the CMOS measurement circuitry 1, and for example, the metal interconnection layer constituting the meta-material structure or the polarization structure may be located on the side of the second dielectric layer 15 away from the CMOS measurement circuitry 1 and in contact with the second dielectric layer 15, that is, the metal interconnection layer is located at the uppermost portion of the suspended microbridge structure 40. Illustratively, the metamaterial structure or the polarization structure may also be at least one metal interconnection layer located between the first dielectric layer 13 and the second dielectric layer 15 and electrically insulated from the electrode layer 14, for example, the metal interconnection layer constituting the metamaterial structure or the polarization structure may be located between the first dielectric layer 13 and the electrode layer 14 and electrically insulated from the electrode layer 14 or located between the second dielectric layer 15 and the electrode layer 14 and electrically insulated from the electrode layer 14. For example, the electrode layer 14 may also be disposed as a metamaterial structure layer or a polarization structure layer, that is, the patterned structure described in the above embodiments may be formed on the electrode layer 14.

Optionally, in conjunction with fig. 1 to 13, at least one patterned metal interconnection layer may be disposed between the reflective layer 4 and the suspended micro-bridge structure 40, the patterned metal interconnection layer is located above or below the hermetic release barrier layer 3 and is electrically insulated from the reflective layer 4, and the patterned metal interconnection layer is used for adjusting a resonance mode of the infrared detector. Specifically, a Bragg reflector (Bragg reflector) is an optical device for enhancing reflection of light with different wavelengths by utilizing constructive interference of reflected light with different interfaces, and is composed of a plurality of 1/4 wavelength reflectors to achieve efficient reflection of incident light with multiple wavelengths.

Illustratively, at least one patterned metal interconnect layer may be disposed on a side of the hermetic release barrier 3 away from the CMOS measurement circuitry 1 and/or at least one patterned metal interconnect layer may be disposed on a side of the hermetic release barrier 3 adjacent to the CMOS measurement circuitry 1. Illustratively, the patterned metal interconnection layer may include a plurality of metal repeating units arranged in an array, each metal repeating unit may include at least one of an L-shaped patterned structure, a circular structure, a sector-shaped structure, an elliptical structure, a circular ring structure, an open ring structure, or a polygonal structure arranged at two opposite corners, or the patterned metal interconnection layer may include a plurality of patterned hollow structures arranged in an array, and the patterned hollow structures may include at least one of a circular hollow structure, an open ring-shaped hollow structure, or a polygonal hollow structure.

Alternatively, it may be provided that the beam structure 11 and the absorber plate 10 are electrically connected at least at two ends, the CMOS infrared sensing structure 2 includes at least two columnar structures 6 and at least two support bases 42, and the electrode layer 14 includes at least two electrode terminals. Specifically, as shown in fig. 1, the beam structures 11 are electrically connected to two ends of the absorption plate 10, each beam structure 11 is electrically connected to one end of the absorption plate 10, the CMOS infrared sensing structure 2 includes two pillar structures 6, the electrode layer 14 includes at least two electrode terminals, at least a portion of the electrode terminals transmit positive electrical signals, and at least a portion of the electrode terminals transmit negative electrical signals, and the signals are transmitted to the supporting base 42 through the corresponding beam structures 11 and pillar structures 6.

Fig. 14 is a schematic perspective structure diagram of another infrared detector pixel provided in an embodiment of the present disclosure. As shown in fig. 14, the beam structures 11 may be electrically connected to four ends of the absorption plate 10, each beam structure 11 is electrically connected to two ends of the absorption plate 10, the CMOS infrared sensing structure 2 includes four pillar structures 6, one beam structure 11 connects two pillar structures 6, and the beam structure 11 may adopt a thermal symmetry structure, which is well known to those skilled in the art and will not be discussed herein. It should be noted that, in the embodiment of the present disclosure, the number of the connecting ends of the beam structure 11 and the absorbing plate 10 is not particularly limited, and it is sufficient that the beam structure 11 and the electrode terminal are respectively present, and the beam structure 11 is used for transmitting the electrical signal output by the corresponding electrode terminal.

Alternatively, the infrared detector may be configured based on a 3nm, 7nm, 10nm, 14nm, 22nm, 28nm, 32nm, 45nm, 65nm, 90nm, 130nm, 150nm, 180nm, 250nm or 350nm CMOS process, which characterizes process nodes of the integrated circuit, i.e., features during the processing of the integrated circuit.

Alternatively, the metal wiring material constituting the metal interconnection layer in the infrared detector may be configured to include at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium, or cobalt, and for example, the material constituting the reflective layer 4 may be configured to include at least one of aluminum, copper, tungsten, titanium, nickel, chromium, platinum, silver, ruthenium, or cobalt. In addition, the CMOS measuring circuit system 1 and the CMOS infrared sensing structure 2 are both prepared by using a CMOS process, the CMOS infrared sensing structure 2 is directly prepared on the CMOS measuring circuit system 1, the radial side length of the columnar structure 6 can be more than or equal to 0.5um and less than or equal to 3um, the width of the beam structure 11, namely the width of a single line in the beam structure 11 is less than or equal to 0.3um, and the height of the resonant cavity is less than or equal to 2.5um.

It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a component of' 8230; \8230;" does not exclude the presence of additional identical elements in the process, method, article, or apparatus that comprises the element.

The foregoing are merely exemplary embodiments of the present disclosure, which will enable those skilled in the art to understand or practice the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A step-type infrared detector, comprising:

the CMOS manufacturing process of the CMOS infrared sensing structure comprises a metal interconnection process, a through hole process, an IMD (in-mold decoration) process and an RDL (remote description language) process, wherein the CMOS infrared sensing structure comprises at least two metal interconnection layers, at least two dielectric layers and a plurality of interconnection through holes, the two metal interconnection layers comprise a reflecting layer and an electrode layer, and the two dielectric layers comprise a sacrificial layer and a heat-sensitive dielectric layer; the thermal sensitive medium layer is used for converting temperature change corresponding to infrared radiation absorbed by the thermal sensitive medium layer into resistance change, and further converting an infrared target signal into a signal capable of realizing electric reading through the CMOS measuring circuit system;

the CMOS infrared sensing structure comprises a resonant cavity formed by the reflecting layer and the heat sensitive medium layer, a suspended micro-bridge structure for controlling heat transfer and a columnar structure with electric connection and support functions, wherein the suspended micro-bridge structure comprises an absorption plate and a plurality of beam structures, the position of the surface, close to the CMOS measuring circuit system, of the suspended micro-bridge structure, corresponding to the columnar structure, is in a step shape, the surface, not in contact with the columnar structure, of the suspended micro-bridge structure is higher than the surface, in contact with the columnar structure, of the suspended micro-bridge structure, and the columnar structure is a solid columnar structure; the surface of the sacrificial layer, which is in contact with the first part of the suspended micro-bridge structure, is higher than the surface of the columnar structure, which is away from the CMOS measurement circuit system, and the first part is the part of the suspended micro-bridge structure, which is not in contact with the columnar structure;

the column-level analog front-end circuit obtains two paths of currents according to the first bias voltage and the second bias voltage, performs transimpedance amplification on the difference between the two paths of generated currents and outputs the amplified current as an output voltage.

2. A step-type infrared detector as recited in claim 1, wherein the CMOS infrared sensing structure is fabricated on top of or at the same level as a metal interconnect layer of the CMOS measurement circuitry.

3. The step-type infrared detector as claimed in claim 1, wherein the sacrificial layer is used to make the CMOS infrared sensing structure form a hollow structure, the material constituting the sacrificial layer is silicon oxide, and the sacrificial layer is etched by a post-CMOS process.

4. The step-type infrared detector as claimed in claim 1, wherein the absorption plate is used for absorbing the infrared target signal and converting the infrared target signal into an electrical signal, the beam structure and the pillar structure are used for transmitting the electrical signal and for supporting and connecting the absorption plate, the reflection layer is used for reflecting the infrared signal and forming the resonant cavity with the thermal sensitive medium layer, the reflection layer comprises at least one metal interconnection layer, and the pillar structure connects the beam structure and the CMOS measurement circuit system by using the metal interconnection process and the through hole process;

the absorption plate and the film layer of the beam structure are the same in composition, the absorption plate and the corresponding film layer of the beam structure are manufactured at the same time, the absorption plate sequentially comprises a first dielectric layer, an electrode layer and a second dielectric layer along the direction far away from the CMOS measuring circuit system, the material for forming the first dielectric layer comprises at least one of materials with the resistance temperature coefficient larger than a set value and prepared by amorphous silicon, amorphous germanium silicon or amorphous carbon, and the material for forming the second dielectric layer comprises at least one of materials with the resistance temperature coefficient larger than the set value and prepared by amorphous silicon, amorphous germanium silicon or amorphous carbon; alternatively, the first and second liquid crystal display panels may be,

the beam structure sequentially comprises a first dielectric layer, an electrode layer and a second dielectric layer along the direction far away from the CMOS measuring circuit system, the absorption plate sequentially comprises the first dielectric layer, the electrode layer, the heat sensitive dielectric layer and the second dielectric layer or the absorption plate sequentially comprises the first dielectric layer, the heat sensitive dielectric layer, the electrode layer and the second dielectric layer, the material for forming the first dielectric layer comprises at least one of amorphous silicon, amorphous germanium silicon, aluminum oxide or amorphous carbon, the material for forming the second dielectric layer comprises at least one of amorphous silicon, amorphous germanium silicon, aluminum oxide or amorphous carbon, and the material for forming the heat sensitive dielectric layer comprises at least one of materials prepared from titanium oxide, vanadium oxide, silicon, germanium silicon, germanium oxygen silicon, graphene, barium strontium titanate film, copper or platinum, wherein the resistance temperature coefficient of the materials is larger than a set value;

the electrode layer is made of at least one of titanium, titanium nitride, tantalum nitride, titanium tungsten alloy, nickel-chromium alloy, nickel-platinum alloy, nickel-silicon alloy, nickel, chromium, platinum, tungsten, aluminum and copper.

5. A step-type infrared detector as set forth in claim 1, wherein said absorber plate is formed with at least one hole-like structure extending through at least a dielectric layer in said absorber plate; and/or at least one hole-shaped structure is formed on the beam structure, and the hole-shaped structure at least penetrates through the medium layer in the beam structure.

6. A step-type infrared detector as recited in claim 1 wherein the columnar structure comprises a solid structure, the material comprising the solid structure comprising at least one of tungsten, copper, or aluminum;

the side wall of the solid structure is coated with at least one dielectric layer, the solid structure is arranged in contact with the dielectric layer, and the material for forming the dielectric layer comprises at least one of silicon oxide, silicon nitride, silicon carbide, amorphous carbon, aluminum oxide, titanium oxide, vanadium oxide, silicon, germanium, silicon germanium oxide, graphene, copper or platinum; alternatively, the first and second electrodes may be,

solid construction's lateral wall and solid construction closes on CMOS measures circuit system's surface cladding has at least one deck adhesion layer, outermost periphery in the columnar structure adhesion layer is kept away from solid construction's lateral wall cladding has the dielectric layer, constitutes the material of adhesion layer includes at least one in titanium, titanium nitride, tantalum or the tantalum nitride, constitutes the material of dielectric layer includes at least one in silicon oxide, silicon nitride, carborundum, amorphous carbon, aluminium oxide, titanium oxide, vanadium oxide, silicon, germanium silicon, germanium oxygen silicon, graphite alkene, copper or platinum.

7. A stepped infrared detector as recited in claim 1 wherein the reinforcing structure comprises a weighted block structure;

8. A step-type infrared detector as recited in claim 1, wherein the hermetic release barrier is located at an interface between the CMOS measurement circuitry and the CMOS infrared sensing structure and/or within the CMOS infrared sensing structure.

9. A step-type infrared detector as recited in claim 8, wherein said hermetic release barrier is disposed on and in contact with said reflective layer;

the closed release isolation layer comprises at least one dielectric layer, and the material for forming the closed release isolation layer comprises at least one of silicon carbide, silicon carbonitride, silicon nitride, silicon, germanium, silicon-germanium alloy, amorphous carbon or aluminum oxide.

10. The step-type infrared detector as claimed in claim 1, wherein the infrared detector is based on 3nm, 7nm, 10nm, 14nm, 22nm, 28nm, 32nm, 45nm, 65nm, 90nm, 130nm, 150nm, 180nm, 250nm or 350nm CMOS process;