CN103996707B - Add grid field plate enhanced AlGaN/GaN HEMT device structure and preparation method thereof - Google Patents
Add grid field plate enhanced AlGaN/GaN HEMT device structure and preparation method thereof Download PDFInfo
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- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract description 96
- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 59
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 59
- 230000004888 barrier function Effects 0.000 claims abstract description 21
- 238000002161 passivation Methods 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 230000001105 regulatory effect Effects 0.000 claims abstract description 6
- 238000007789 sealing Methods 0.000 claims abstract description 4
- 239000000463 material Substances 0.000 claims description 27
- 229910002601 GaN Inorganic materials 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 20
- 238000001259 photo etching Methods 0.000 claims description 16
- 239000010409 thin film Substances 0.000 claims description 14
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 12
- 238000001312 dry etching Methods 0.000 claims description 10
- 239000007789 gas Substances 0.000 claims description 8
- 238000005566 electron beam evaporation Methods 0.000 claims description 6
- 239000010408 film Substances 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- 229910005883 NiSi Inorganic materials 0.000 claims description 5
- 238000005054 agglomeration Methods 0.000 claims description 5
- 230000002776 aggregation Effects 0.000 claims description 5
- 238000005530 etching Methods 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 229910045601 alloy Inorganic materials 0.000 claims description 4
- 239000000956 alloy Substances 0.000 claims description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 4
- 238000005260 corrosion Methods 0.000 claims description 4
- 229910052593 corundum Inorganic materials 0.000 claims description 4
- 239000008367 deionised water Substances 0.000 claims description 4
- 229910021641 deionized water Inorganic materials 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 claims description 4
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 4
- 238000004151 rapid thermal annealing Methods 0.000 claims description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 4
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 4
- 229910021244 Co2Si Inorganic materials 0.000 claims description 3
- 229910008479 TiSi2 Inorganic materials 0.000 claims description 3
- 230000015556 catabolic process Effects 0.000 claims description 3
- 230000005684 electric field Effects 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 239000012159 carrier gas Substances 0.000 claims description 2
- 230000007797 corrosion Effects 0.000 claims description 2
- 229910052733 gallium Inorganic materials 0.000 claims description 2
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 claims description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 claims description 2
- 239000010980 sapphire Substances 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 238000005406 washing Methods 0.000 claims description 2
- 238000001039 wet etching Methods 0.000 claims description 2
- 230000005533 two-dimensional electron gas Effects 0.000 abstract description 9
- 230000010287 polarization Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 230000008901 benefit Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 241000160765 Erebia ligea Species 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 150000003377 silicon compounds Chemical class 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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Abstract
The invention discloses one and add grid field plate enhanced AlGaN/GaN HEMT device structure and preparation method thereof, described structure includes substrate, intrinsic GaN layer, AlN sealing coat, intrinsic AlGaN layer, AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, grid field plate, insulating barrier, passivation layer and for regulating the silicide of two-dimensional electron gas.Described source electrode, drain electrode and insulating barrier are positioned on AlGaN doped layer, and described gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier.Grid field plate electrically connects with gate electrode, described silicide, and insulating barrier and AlGaN layer are introduced compressive stress, and the AlGaN layer between silicide is subject to tensile stress, by making block be smaller than block width so that AlGaN layer totally obtains tensile stress, increases the concentration of 2DEG.
Description
Technical field
The invention belongs to microelectronics technology, relate to semiconductor device to make, one adds grid field plate enhanced AlGaN/GaNHEMT device architecture and manufacture method specifically, can be used for making the enhancement type high electron mobility transistor of low on-resistance, altofrequency, high-breakdown-voltage.
Background technology
, the characteristic such as breakdown electric field high, thermal conductivity high, saturated electrons speed big and heterojunction boundary two-dimensional electron gas high big with its energy gap with SiC and GaN the 3rd bandwidth bandgap quasiconductor being representative in recent years so that it is receive significant attention.In theory, the devices such as high electron mobility transistor (HEMT) that these materials make, LED, laser diode LD are utilized to have obvious advantageous characteristic than existing device, therefore it has been carried out extensive and deep research by researcher both at home and abroad in the last few years, and achieves the achievement in research attracted people's attention.
AlGaN/GaN hetero-junctions high electron mobility transistor (HEMT) has had shown that advantageous advantage in high-temperature device and HIGH-POWERED MICROWAVES device, and pursuit device altofrequency, high pressure, high power have attracted numerous research.In recent years, make higher frequency high pressure AlGaN/GaNHEMT and become the another study hotspot of concern.After having grown due to AlGaN/GaN hetero-junctions, heterojunction boundary exists for a large amount of two-dimensional electron gas 2DEG, and when interface resistivity reduces, we can obtain higher device frequency characteristic.AlGaN/GaN hetero-junctions electron mobility transistor can obtain significantly high frequency, but often will to sacrifice high pressure resistant property for cost.The method of the AlGaN/GaN heterojunction transistor frequency improved at present is as follows:
1. combine without passivated dielectric medium (dielectric-freepassivation) with long Ohmic contact of living again to reduce resistivity.Referring to InAlN/AlN/GaNHEMTsWithRegrownOhmicContactsandf such as YuanzhengYue, ZongyangHu, JiaGuoTOf370GH.EDL.Vol33.NO.7, P1118-P1120.The process employs 30 nanometers of grid long, and combine without passivated dielectric medium (dielectric-freepassivation) with long Ohmic contact of living again to reduce source and drain resistivity.Frequency can reach 370GHz.Can also by minimizing channel length continuation raising frequency to 500GHz.
2. long heavy-doped source of living again drains to the Two-dimensional electron gas channel of nearly grid.Referring to self-aligned-gateGaN-HEMTswithheavily-dopedn such as Shinohara, K.Regan, D.Corrion, A.Brown+-GaNohmiccontactsto2DEG；IEDM, IEEE；2012.Live again long n in the past+GaN Ohmic contact achieves noticeable achievement to reducing raceway groove contact resistance, but the Two-dimensional electron gas channel that heavy-doped source drain contact is directly arrived under gate electrode can obtain better frequency characteristic and current characteristics.In literary composition, the method for report makes frequency reach fT/ fmax=342/518GHz.Breakdown voltage 14V simultaneously.
Summary of the invention
Present invention aims to the deficiency of above altofrequency device, a kind of method raceway groove being produced stress based on silicide is provided, to improve the frequency characteristic voltage endurance of enhanced AlGaN/GaN high mobility transistor simultaneously, strengthen controllability and the repeatability of technique, meet GaN base electronic device to altofrequency, high-tension application requirement.
The present invention is achieved in that
The technical thought of the present invention is: use epitaxial growth the method etched grow insulating barrier on AlGaN, a step-like thick thin dielectric layer is generated by etching, multiple bulk silicon compound is grown again on thin dielectric layer, silicide agglomeration is smaller than block width, also grows Formation of silicide field plate and be connected in gate electrode in thick dielectric layer.Owing to the thermal coefficient of expansion of silicide is more than the thermal coefficient of expansion of insulating barrier Yu AlGaN.When epitaxial growth cools down, insulating barrier and AlGaN layer can be introduced compressive stress by silicide, and meanwhile, the AlGaN layer between silicide will be subject to tensile stress.When AlGaN layer is subject to compressive stress time, the 2DEG concentration being positioned at AlGaN/GaN interface reduces to some extent, and when AlGaN layer is subject to tensile stress time, the 2DEG concentration being positioned at AlGaN/GaN interface increases to some extent.The size of AlGaN layer institute compression chord (tensile stress) is relevant with the length of silicide (silicide spacing), this relation is not a kind of linear relationship, and be treated as, with the stress suffered by AlGaN layer in time reducing, the impact of polarization charge is increased sharply (being illustrated in fig. 2 shown below), so we can make the width of silicide, spacing difference between silicide realizes the adjustment of two-dimensional electron gas, increasing of 2DEG concentration still reduces the magnitude relationship then depending on the two on the whole, in this invention, we select to make two-dimensional electron gas increase to reduce channel resistance.So tensile stress is greater than compressive stress, then silicide width is greater than silicide spacing.As shown in Figure 2, if the width of silicide is 1 μm, silicide spacing is 0.25 μm,. the tension force effect that so silicide spacing (0.25 μm) region is experienced makes polarization charge finally two orders of magnitude bigger than the polarization charge of silicide regions (1 μm), so effect on the whole shows as AlGaN layer and is subject to tensile stress and polarization charge concentration increases to some extent, thus the concentration of 2DEG also presents the result of overall increase because of the increase of polarization charge between grid source and between grid leak.Therefore the resistance in this region reduces to some extent.Referring to IEICETRANS.ELECTON, VOL.E93-C, NO.8AUGUST2010.AnalysisofPassivation-Film-InducedStressE ffectsonElectricalPropertiesinAlGaN/GaNHEMTs. is by selecting the length being smaller than silicide made between silicide, what make 2DEG concentration increases the reduction much larger than 2DEG concentration, so that the resistance between grid leak and grid source reduces to some extent, improve the frequency characteristic of high mobility transistor when not changing grid leak spacing.Field plate in thick dielectric layer is thicker due to medium, and the impact of 2DEG can be ignored, but can play the effect of field plate after being connected in gate electrode, it is possible to improve the voltage endurance of the present invention.
According to above-mentioned technical thought, one adds grid field plate enhanced AlGaN/GaNHEMT device architecture, and described structure includes substrate, intrinsic GaN layer, AlN sealing coat, intrinsic AlGaN layer, AlGaN doped layer .p type GaN layer, gate electrode, source electrode, drain electrode, grid field plate, insulating barrier, passivation layer and for regulating the silicide of two-dimensional electron gas；Described AlGaN doped layer is positioned on intrinsic AlGaN layer, and p-type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned on AlGaN doped layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier；Enhanced AlGaN/GaN heterojunction material is had at substrate Epitaxial growth, and on this heterojunction material, it is formed with source electrode and drain electrode, and then deposit a layer insulating, wherein thick dielectric layer is between gate electrode and drain electrode, adjacent gate electrode, thickness is 200nm-700nm；Thin dielectric layer lays respectively between thick dielectric layer and drain electrode and between gate electrode and source electrode, thickness is 5～10nm, between grid leak region on the insulating layer and grid source region, is formed with silicide, silicide is block, insulating barrier and AlGaN layer being introduced compressive stress, the AlGaN layer between silicide can be subject to tensile stress, by making block be smaller than block width, AlGaN layer is made totally to obtain tensile stress, so that 2DEG is strengthened in raceway groove, described silicide includes NiSi, TiSi2Or Co2Si, is electrically connected to form grid field plate by the silicide in thick dielectric layer and gate electrode；There is p-GaN epitaxial layer below gate electrode, form enhancement device.Finally deposit passivation layer realizes the passivation of device.
Backing material in the present invention is sapphire, carborundum, GaN or MgO, intrinsic AlGaN layer and in AlGaN doped layer the component of Al and Ga can regulate, AlxGa1-xX=0～1 in N, its intrinsic GaN layer can replace with AlGaN layer, and in this AlGaN, Al component is less than the Al component in intrinsic AlGaN layer and AlGaN doped layer, and p-type GaN material can replace with p-type AlGaN material or p-type InGaN material.According to above-mentioned technical thought, metal silicide is utilized to improve the structure of enhanced AlGaN/GaNHEMT device performance, including following process:
(1) epitaxially grown enhancement mode p-GaN/AlGaN/GaN material is carried out organic washing, clean with the deionized water of flowing and put into HCl: H2The solution of O=1: 1 volume ratio carries out corrosion 30-60s, finally cleans with the deionized water of flowing and dry up with high pure nitrogen；
(2) the p-GaN/AlGaN/GaN material cleaned up is carried out photoetching and dry etching, be formed with region meas；
(3) the p-GaN/AlGaN/GaN material preparing table top is carried out photoetching, form the etch areas of p-GaN；
(4) and by material putting in ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl2The flow that flow is 10sccm, Ar gas be 10sccm, etch period is 10min, etches away the extra-regional p-GaN epitaxial layer of gate electrode；
(5) the p-GaN/AlGaN/GaN material completing etching is carried out photoetching, form source and drain ohmic contact regions, put into and electron beam evaporation platform deposits metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm and peels off, last in nitrogen environment, carry out 850 DEG C, the rapid thermal annealing of 35s, form Ohmic contact；
(6) device is put into preparation Al in magnetron sputtering reative cell2O3Thin film, process conditions are: the DC offset voltage of Al target is 100V, Ar throughput be 30sccm, O2 flow is 10sccm, and the pressure of reative cell is 0.5Pa, the Al that deposit 300nm is thick2O3Thin film；
(7) device completing deposit is carried out photoetching development, form Al2O3The wet etching district of thin film, puts into HF: H by material2In the solution of O=1: 10 volume ratios, corrode 3-5min, by Al2O3Corrode to 5-10nm；
(8) then device is put in the reative cell of magnetron sputtering and sputter Ni and Si simultaneously, process conditions are: the DC offset voltage of Ni target is 100V, the radio-frequency bias voltage of Si target is 450V, and the flow of carrier gas Ar is 30sccm, the hybrid metal thin film that codeposition 100nm～150nm is thick；
(9) device having deposited thin film carrying out photoetching, form the etching window district of mixed film, and put in ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF4The flow that flow is 20sccm, Ar gas be 10sccm, etch period is 5min, and the silicide stayed on device after dry etching is bulk, and makes to be smaller than silicide agglomeration width between silicide agglomeration；
(10) device is put in quick anneal oven, carry out 450 DEG C in a nitrogen environment, the rapid thermal annealing of 30s, form NiSi alloy, insulating barrier and AlGaN layer can be introduced compressive stress by silicide, and the AlGaN layer between silicide can be subject to tensile stress, by making block be smaller than block width, AlGaN layer is made totally to obtain tensile stress, so that 2DEG is strengthened in raceway groove；
(11) device completing alloy is carried out photoetching, form gate electrode and grid field plate region, and device is put into HF: H2By the Al in gate electrode region in the solution of O=1: 1 volume ratio2O3Corrosion forms gate electrode and grid field plate window completely, is then placed in electron beam evaporation platform and deposits Ni/Au=20/200nm and peel off, completes gate electrode and the preparation of grid field plate；
(12) putting into PECVD reative cell deposit SiN passivating film by completing device prepared by gate electrode, concrete technology condition is: SiH4Flow be 40sccm, NH3Flow be 10sccm, chamber pressure is 1～2Pa, and radio-frequency power is 40W, the SiN passivating film that deposit 200nm～300nm is thick；
(13) device is carried out again, photoetching development, form the etched area of SiN thin film, and put in ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF4The flow that flow is 20sccm, Ar gas be 10sccm, etch period is 10min, SiN and Al source electrode, drain electrode and gate electrode covered above2O3Thin film etches away；
(14) device is carried out, photoetching development, and put in electron beam evaporation platform deposit Ti/Au=20/200nm add thick electrode, complete the preparation of integral device.
Present invention have the advantage that
(1) method that the device of the present invention adopts deposition insulating layer and silicide, produces stress effect to AlGaN, regulates electron gas concentration and electric field intensity in raceway groove.Improve device frequency characteristic.
(2) in the present invention prepared silicide between grid leak and grid source, improve frequency characteristic without the need for reducing grid leak distance, from without sacrificing high pressure resistant property.
(3) owing to size and the spacing of silicide can be regulated between grid leak and grid source as required in the present invention, thus regulating stress effect size.Electron gas concentration and frequency characteristic can regulate as required between grid source and between grid leak.
(4) in the present invention, the addition of grid field plate improves the voltage endurance of device.
Accompanying drawing explanation
Be more fully described the exemplary embodiment of the present invention by referring to accompanying drawing, the above and other aspect of the present invention and advantage will become more easily clear, in the accompanying drawings:
Fig. 1 is the cross-sectional view of device of the present invention；
Fig. 2 is physical principle explanation figure (polarization charge is with the change of silicide width)；
Fig. 3 is the fabrication processing schematic diagram of device of the present invention.
Detailed description of the invention
Hereinafter, it is more fully described the present invention, various embodiments shown in the drawings now with reference to accompanying drawing.But, the present invention can implement in many different forms, and should not be construed as limited to embodiment set forth herein.On the contrary, it is provided that these embodiments make the disclosure will be thoroughly with completely, and fully convey the scope of the present invention to those skilled in the art.
Hereinafter, the exemplary embodiment of the present invention it is more fully described with reference to the accompanying drawings.
With reference to Fig. 1, one adds grid field plate enhanced AlGaN/GaNHEMT device architecture, and described structure includes substrate, intrinsic GaN layer, AlN sealing coat, intrinsic AlGaN layer, AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, grid field plate, insulating barrier, passivation layer and for regulating the silicide of two-dimensional electron gas；Described AlGaN doped layer is positioned on intrinsic AlGaN layer, and p-type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned on AlGaN doped layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier；Enhanced AlGaN/GaN heterojunction material is had at substrate Epitaxial growth, and on this heterojunction material, it is formed with source electrode and drain electrode, then a layer insulating is deposited, wherein thick dielectric layer is between gate electrode and drain electrode, adjacent gate electrode, thickness is 200nm-700nm, thin dielectric layer lays respectively between thick dielectric layer and drain electrode and between gate electrode and source electrode, thickness is 5～10nm, between grid leak region on the insulating layer and grid source region, it is formed with silicide, insulating barrier and AlGaN layer can be introduced compressive stress by silicide, AlGaN layer between silicide can be subject to tensile stress, block is smaller than block width and makes AlGaN layer totally obtain tensile stress, so that 2DEG is strengthened in raceway groove, described silicide includes NiSi, TiSi2Or Co2Si, is electrically connected to form grid field plate by the silicide in thick dielectric layer and gate electrode；There is p-GaN epitaxial layer below gate electrode, form enhancement device.Finally deposit passivation layer realizes the passivation of device.
The foregoing is only embodiments of the invention, be not limited to the present invention.The present invention can have various suitable change and change.All make within the spirit and principles in the present invention any amendment, equivalent replacement, improvement etc., should be included within protection scope of the present invention.
Claims (7)
1. one kind adds grid field plate enhanced AlGaN/GaNHEMT device architecture, it is characterised in that: described structure includes substrate, intrinsic GaN layer, AlN sealing coat, intrinsic AlGaN layer, AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, grid field plate, insulating barrier, passivation layer and for regulating the silicide of raceway groove electric field；Described AlGaN doped layer is positioned on intrinsic AlGaN layer, and p-type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned on AlGaN doped layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier；Enhanced AlGaN/GaN heterojunction material is had at substrate Epitaxial growth, and on this heterojunction material, it is formed with source electrode and drain electrode, then a layer insulating is deposited, wherein thick dielectric layer is between gate electrode and drain electrode, adjacent gate electrode, thickness is 200nm-700nm, thin dielectric layer lays respectively between thick dielectric layer and drain electrode and between gate electrode and source electrode, thickness is 5～10nm, between grid leak region on the insulating layer and grid source region, it is formed with silicide, silicide is block, insulating barrier and AlGaN layer can be introduced compressive stress, AlGaN layer between silicide can be subject to tensile stress, by making block be smaller than block width, AlGaN layer is made totally to obtain tensile stress, so that 2DEG is strengthened in raceway groove, described silicide includes NiSi, TiSi2Or Co2Si, is electrically connected to form grid field plate by the silicide in thick dielectric layer and gate electrode；There is p-GaN epitaxial layer below gate electrode, form enhancement device, finally deposit passivation layer realizes the passivation of device.
2. according to claim 1 add grid field plate enhanced AlGaN/GaNHEMT device architecture, it is characterised in that: backing material therein is sapphire, carborundum, GaN or MgO.
3. according to claim 1 add grid field plate enhanced AlGaN/GaNHEMT device architecture, it is characterised in that: intrinsic AlGaN layer and in AlGaN doped layer the component of Al and Ga can regulate, AlxGa1-xX=0～1 in N.
4. according to claim 1 add grid field plate enhanced AlGaN/GaNHEMT device architecture, it is characterised in that: its intrinsic GaN layer replaces with AlGaN layer, and in this AlGaN, the component of Al is less than the Al component in intrinsic AlGaN layer and AlGaN doped layer.
5. according to claim 1 add grid field plate enhanced AlGaN/GaNHEMT device architecture, it is characterized by: wherein p-type GaN layer material replaces with p-type AlGaN material or p-type InGaN material.
6. according to claim 1 add grid field plate enhanced AlGaN/GaNHEMT device architecture, it is characterized by: the silicide being positioned in thick dielectric layer and gate electrode are electrically connected formation grid field plate, improve the breakdown voltage of device.
7., based on the manufacture method adding grid field plate enhanced AlGaN/GaNHEMT device architecture, comprise the steps:
(1) epitaxially grown enhancement mode p-GaN/AlGaN/GaN material is carried out organic washing, clean with the deionized water of flowing and put into HCl: H2The solution of O=1: 1 volume ratio carries out corrosion 30-60s, finally cleans with the deionized water of flowing and dry up with high pure nitrogen；
(2) the p-GaN/AlGaN/GaN material cleaned up is carried out photoetching and dry etching, be formed with region meas；
(3) the p-GaN/AlGaN/GaN material preparing table top is carried out photoetching, form the etch areas of p-GaN；
(4) and by material putting in ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl2The flow that flow is 10sccm, Ar gas be 10sccm, etch period is 10min, etches away the extra-regional p-GaN epitaxial layer of gate electrode；
(5) the p-GaN/AlGaN/GaN material completing etching is carried out photoetching, form source-drain electrode contact area, put into and electron beam evaporation platform deposits metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm and peels off, last in nitrogen environment, carry out 850 DEG C, the rapid thermal annealing of 35s, form Ohmic contact；
(6) device is put into preparation Al in magnetron sputtering reative cell2O3Thin film, process conditions are: the DC offset voltage of Al target is 100V, Ar throughput be 30sccm, O2 flow is 10sccm, and the pressure of reative cell is 0.5Pa, the Al that deposit 300nm is thick2O3Thin film；
(7) device completing deposit is carried out photoetching development, form Al2O3The wet etching district of thin film, puts into HF: H by material2In the solution of O=1: 10 volume ratios, corrode 3-5min, by Al2O3Corrode to 5-10nm；
(8) then device is put in the reative cell of magnetron sputtering and sputter Ni and Si simultaneously, process conditions are: the DC offset voltage of Ni target is 100V, the radio-frequency bias voltage of Si target is 450V, and the flow of carrier gas Ar is 30sccm, the hybrid metal thin film that codeposition 100nm～150nm is thick；
(9) device having deposited thin film carrying out photoetching, form the etching window district of mixed film, and put in ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF4The flow that flow is 20sccm, Ar gas be 10sccm, etch period is 5min, and the silicide stayed on device after dry etching is bulk, and makes to be smaller than silicide agglomeration width between silicide agglomeration；
(10) device is put in quick anneal oven, carry out 450 DEG C in a nitrogen environment, the rapid thermal annealing of 30s, form NiSi alloy, insulating barrier and AlGaN layer can be introduced compressive stress by silicide, and the AlGaN layer between silicide can be subject to tensile stress, by making block be smaller than block width, AlGaN layer is made totally to obtain tensile stress, so that 2DEG is strengthened in raceway groove；
(11) device completing alloy is carried out photoetching, form gate electrode and grid field plate region, and device is put into HF: H2By the Al in gate electrode region in the solution of O=1: 1 volume ratio2O3Corrosion forms gate electrode and grid field plate window completely, is then placed in electron beam evaporation platform and deposits Ni/Au=20/200nm and peel off, completes gate electrode and the preparation of grid field plate；
(12) putting into PECVD reative cell deposit SiN passivating film by completing device prepared by gate electrode, concrete technology condition is: SiH4Flow be 40sccm, NH3Flow be 10sccm, chamber pressure is 1～2Pa, and radio-frequency power is 40W, the SiN passivating film that deposit 200nm～300nm is thick；
(13) device is carried out again, photoetching development, form the etched area of SiN thin film, and put in ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF4The flow that flow is 20sccm, Ar gas be 10sccm, etch period is 10min, SiN and Al source electrode, drain electrode and gate electrode covered above2O3Thin film etches away；
(14) device is carried out, photoetching development, and put in electron beam evaporation platform deposit Ti/Au=20/200nm add thick electrode, complete the preparation of integral device.
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