CN103904114B - Add source field plate enhanced AlGaN/GaN HEMT device architecture and preparation method thereof - Google Patents

Add source field plate enhanced AlGaN/GaN HEMT device architecture and preparation method thereof Download PDF

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CN103904114B
CN103904114B CN201410025460.XA CN201410025460A CN103904114B CN 103904114 B CN103904114 B CN 103904114B CN 201410025460 A CN201410025460 A CN 201410025460A CN 103904114 B CN103904114 B CN 103904114B
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algan
layer
silicide
gan
electrode
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CN103904114A (en
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冯倩
杜锴
马晓华
郑雪峰
代波
郝跃
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Xidian University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1058Channel region of field-effect devices of field-effect transistors with PN junction gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/404Multiple field plate structures
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

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Abstract

The invention discloses one and add source field plate enhanced AlGaN/GaN? HEMT device architecture and preparation method thereof, described structure comprises substrate, intrinsic GaN layer, AlN separation layer, intrinsic AlGaN layer, AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, source field plate, insulating barrier, passivation layer and for regulating the silicide of two-dimensional electron gas, described source electrode, drain electrode and insulating barrier are positioned on AlGaN doped layer, described gate electrode is positioned on p-type GaN layer, silicide is positioned on insulating barrier, source field plate is electrically connected with source electrode, described silicide, insulating barrier and AlGaN layer are introduced to compression, AlGaN layer between silicide is subject to tensile stress, by making interblock apart from being less than piece width, make AlGaN layer totally obtain tensile stress, increase the concentration of 2DEG.

Description

Add source field plate enhanced AlGaN/GaN HEMT device architecture and preparation method thereof
Technical field
The invention belongs to microelectronics technology, relating to semiconductor devices makes, one adds source field plate enhanced AlGaN/GaNHEMT device architecture and preparation method specifically, can be used for making the enhancement type high electron mobility transistor of low on-resistance, high-frequency, high-breakdown-voltage.
Background technology
The 3rd bandwidth bandgap semiconductor taking SiC and GaN as representative is large with its energy gap in recent years, breakdown electric field is high, thermal conductivity is high, saturated electrons speed is large and the characteristic such as heterojunction boundary two-dimensional electron gas height, makes it be subject to extensive concern. In theory, utilize the devices such as high electron mobility transistor (HEMT) that these materials make, LED, laser diode LD to there is obvious advantageous characteristic than existing device, therefore researcher has carried out extensive and deep research to it both at home and abroad in the last few years, and has obtained the achievement in research attracting people's attention.
AlGaN/GaN hetero-junctions high electron mobility transistor (HEMT) is demonstrating advantageous advantage aspect high-temperature device and HIGH-POWERED MICROWAVES device, and pursuit device high-frequency, high pressure, high power have attracted numerous research. In recent years, make higher frequency high pressure AlGaN/GaNHEMT and become the another study hotspot of concern. Due to after AlGaN/GaN hetero-junctions grown, just there are a large amount of two-dimensional electron gas 2DEG in heterojunction boundary, and in the time of the resistivity decreased of interface, we can obtain higher device frequency characteristic. AlGaN/GaN hetero-junctions electron mobility transistor can obtain very high frequency, but often will be to sacrifice high pressure resistant property as cost. The method of the AlGaN/GaN heterojunction transistor frequency improving is at present as follows:
1. in conjunction with reducing resistivity without passivated dielectric medium (dielectric-freepassivation) and the long Ohmic contact of living again. Referring to YuanzhengYue, ZongyangHu, the InAlN/AlN/GaNHEMTsWithRegrownOhmicContactsandf such as JiaGuoTOf370GH. EDL.Vol33.NO.7, P1118-P1120. The method has adopted 30 nanometer grid long, and in conjunction with reducing source ohmic leakage rate without passivated dielectric medium (dielectric-freepassivation) and the long Ohmic contact of living again. Frequency can reach 370GHz. Can also continue to improve frequency to 500GHz by reducing channel length.
2. the long heavy-doped source of living again drains to the Two-dimensional electron gas channel of nearly grid. Referring to Shinohara, K.Regan, D.Corrion, the self-aligned-gateGaN-HEMTswithheavily-dopedn such as A.Brown+-GaNohmiccontactsto2DEG; IEDM, IEEE; 2012. Long n in the past lives again+GaN Ohmic contact achieves noticeable achievement to reducing raceway groove contact resistance, but heavy-doped source drain contact directly can obtain better frequency characteristic and current characteristics to the Two-dimensional electron gas channel approaching under gate electrode. The method of reporting in literary composition makes frequency reach fT/ fmax=342/518GHz. Breakdown voltage 14V simultaneously.
Summary of the invention
The object of the invention is to the deficiency for above high-frequency device, a kind of method that based on silicide, raceway groove is produced stress is provided, to improve the transistorized frequency characteristic of enhanced AlGaN/GaN high mobility simultaneously, the controllability and the repeatability that strengthen technique, meet the application requirements of GaN base electron device to high-frequency, low on-resistance, high-breakdown-voltage.
The present invention is achieved in that
Technical thought of the present invention is: use the method for epitaxial growth the etching thin dielectric layer of growing on AlGaN, multiple bulk silicon compounds of growing on thin dielectric layer, silicide agglomeration spacing is less than piece width, because the thermal coefficient of expansion of silicide is greater than the thermal coefficient of expansion of insulating barrier and AlGaN. in the time that epitaxial growth is cooling, silicide can be introduced compression to insulating barrier and AlGaN layer, and meanwhile, the AlGaN layer between silicide will be subject to tensile stress. in the time that AlGaN layer is subject to compression, the 2DEG concentration that is positioned at AlGaN/GaN interface reduces to some extent, and in the time that AlGaN layer is subject to tensile stress, the 2DEG concentration that is positioned at AlGaN/GaN interface increases to some extent. the size of AlGaN layer institute compression chord (tensile stress) is relevant with the length of silicide (silicide spacing), this relation is not a kind of linear relationship, but in the time that operating distance reduces the suffered stress of AlGaN layer on the impact of polarization charge increase sharply (being illustrated in fig. 2 shown below), so we can make the width of silicide, spacing difference between silicide realizes the adjusting of two-dimensional electron gas, the increase of 2DEG concentration still reduces the magnitude relationship that depends on the two on the whole, in this invention, we select to make two-dimensional electron gas increase reduce channel resistance. so tensile stress is greater than compression, so silicide width is greater than silicide spacing. as shown in Figure 2, if the width of silicide is 1 μ m, silicide spacing is 0.25 μ m,. (0.25 μ m) the tension force effect that stands in region makes polarization charge finally than silicide regions (large two orders of magnitude of 1 μ polarization charge m) to silicide spacing so, so effect on the whole shows as AlGaN layer, to be subject to tensile stress be that polarization charge concentration increases to some extent, thereby the concentration of 2DEG also presents the result that entirety increases because of the increase of polarization charge between grid source and between grid leak. therefore the resistance in this region reduces to some extent. referring to IEICETRANS.ELECTON, VOL.E93-C, NO.8AUGUST2010.AnalysisofPassivation-Film-InducedStressE ffectsonElectricalPropertiesinAlGaN/GaNHEMTs. makes spacing between silicide be less than the length of silicide by selection, the growth that makes 2DEG concentration reduces much larger than 2DEG concentration, thereby the resistance between grid leak and grid source is reduced to some extent, in the situation that not changing grid leak spacing, improve the transistorized frequency characteristic of high mobility.
According to above-mentioned technical thought, enhanced AlGaN/GaN high-frequency element of the present invention, comprises substrate, intrinsic GaN layer, AlN separation layer, AlGaN barrier layer (intrinsic AlGaN layer), AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, source field plate, insulating barrier, passivation layer and for regulating the silicide of two-dimensional electron gas. AlGaN doped layer is positioned on intrinsic AlGaN, and p-type GaN layer is positioned on AlGaN doped layer, source-drain electrode and insulating barrier are positioned on AlGaN doped layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier. On substrate, epitaxial growth has enhanced AlGaN/GaN heterojunction material, and in this structure, form active electrode and drain electrode, and then deposit one layer insulating, wherein thick dielectric layer is between gate electrode and drain electrode, adjacent gate electrode, thickness is 200nm-700nm; Thin dielectric layer lay respectively between thick dielectric layer and drain electrode and gate electrode and source electrode between, thickness is 5~10nm, on insulating barrier (between grid leak region and grid source region), be formed with silicide, silicide is block, can introduce compression to insulating barrier and AlGaN layer, AlGaN layer between silicide can be subject to tensile stress, by making interblock apart from being less than piece width, make AlGaN layer totally obtain tensile stress, thereby 2DEG in raceway groove is enhanced, and described silicide comprises NiSi, TiSi2Or Co2Si, there is p-GaN epitaxial layer in gate electrode below, forms enhancement device, and last deposit passivation layer is realized the passivation of device.
Backing material in the present invention is sapphire, carborundum, GaN or MgO, and in intrinsic AlGaN layer and AlGaN doped layer, the component of Al and Ga can regulate, AlxGa1-xX=0~1 in N, its intrinsic GaN layer can replace with AlGaN layer, and Al component is less than the Al component in intrinsic AlGaN layer and AlGaN doped layer in this AlGaN, p-type GaN material can replace with p-type AlGaN material or p-type InGaN material, silicide in thick dielectric layer is electrically connected with source electrode, forms source field plate structure.
As shown in Figure 3, according to above-mentioned technical thought, utilize metal silicide to improve the structure of enhanced AlGaN/GaNHEMT device performance, comprise following process:
(1) epitaxially grown enhancement mode p-GaN/AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and put into HCl: H2O=1: corrode 30-60s in the solution of 1 volume ratio, finally dry up by mobile washed with de-ionized water and with high pure nitrogen;
(2) the p-GaN/AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the p-GaN/AlGaN/GaN material for preparing table top is carried out to photoetching, form the etch areas of p-GaN;
(4) and by material put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl2Flow be 10sccm, the flow of Ar gas is 10sccm, etch period is 10min, etches away the extra-regional p-GaN epitaxial layer of gate electrode;
(5) the p-GaN/AlGaN/GaN material that completes etching is carried out to photoetching, metal area is leaked in formation source, put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm and peel off, last in nitrogen environment, carry out 850 DEG C, the rapid thermal annealing of 35s, form Ohmic contact;
(6) device is put into magnetron sputtering reative cell and prepared Al2O3Film, process conditions are: the DC offset voltage of Al target is 100V, Ar throughput is 30sccm, O2Flow is 10sccm, and the pressure of reative cell is 0.5Pa, the Al that deposit 300nm is thick2O3Film;
(7) device that completes deposit is carried out to photoetching development, form Al2O3The wet etching district of film, puts into HF by material: H2O=1: in the solution of 10 volume ratios, by Al2O3Corrode to 5-10nm;
(8) then device is put into simultaneously sputter Ni and the Si of reative cell of magnetron sputtering, process conditions are: the DC offset voltage of Ni target is 100V, the radio-frequency bias voltage of Si target is 450V, and the flow of carrier gas Ar is 30sccm, the hybrid metal film that codeposition 100nm~150nm is thick;
(9) device of the good film of deposit is carried out to photoetching, form the etching window district of mixed film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF4Flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 5min, the silicide staying on device after dry etching is for block, and makes the spacing between silicide agglomeration be less than silicide agglomeration width;
(10) device is put into quick anneal oven, under nitrogen environment, carry out 450 DEG C, the rapid thermal annealing of 30s, form NiSi alloy, silicide can be introduced compression to insulating barrier and AlGaN layer, and the AlGaN layer between silicide can be subject to tensile stress, by making interblock apart from being less than piece width, make AlGaN layer totally obtain tensile stress, thereby 2DEG in raceway groove is enhanced;
(11) device that completes alloy is carried out to photoetching, form gate electrode region, and device is put into HF: H2O=1: in the solution of 1 volume ratio by the Al in gate electrode region2O3Corrosion forms gate electrode window completely, then puts into electron beam evaporation platform deposit Ni/Au=20/200nm and peels off, and completes the preparation of gate electrode;
(12) put into PECVD reative cell deposit SiN passivating film by completing device prepared by gate electrode, concrete technology condition is: SiH4Flow be 40sccm, NH3Flow be 10sccm, chamber pressure is 1~2Pa, radio-frequency power is 40W, the SiN passivating film that deposit 200nm~300nm is thick;
(13) device is cleaned again, photoetching development, form the etched area of SiN film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, CF4Flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min, the SiN film that source electrode, drain electrode and silicide field plate are covered above etches away;
(14) device is cleaned, photoetching development, and put into electron beam evaporation platform deposit Ti/Au=20/200nm, form and add thick electrode and source field plate, complete the preparation of integral device.
Tool of the present invention has the following advantages:
(1) device of the present invention adopts the method for deposition insulating layer and silicide, and AlGaN is produced to effect of stress, regulates electron gas concentration and electric-field intensity in raceway groove. Improve device frequency characteristic.
(2) in the present invention, prepared silicide, between grid leak and grid source, does not need to reduce grid leak distance when improving frequency characteristic, thereby without sacrificing high pressure resistant property.
(3) in the present invention owing to can regulate as required size and the spacing of silicide between grid leak and grid source, thereby regulate effect of stress size. Electron gas concentration and frequency characteristic can regulate as required between grid source and between grid leak.
(4) in the present invention source field plate add the breakdown voltage that has improved device.
Brief description of the drawings
By describing in more detail exemplary embodiment of the present invention with reference to accompanying drawing, above and other aspect of the present invention and advantage will become more and be readily clear of, in the accompanying drawings:
Fig. 1 is the cross-sectional view of device of the present invention;
Fig. 2 is physical principle key diagram (polarization charge is with the variation of silicide);
Fig. 3 is the fabrication processing schematic diagram of device of the present invention.
Detailed description of the invention
Hereinafter, now with reference to accompanying drawing, the present invention is described more fully, various embodiment shown in the drawings. But the present invention can implement in many different forms, and should not be interpreted as being confined to embodiment set forth herein. On the contrary, it will be thorough with completely providing these embodiment to make the disclosure, and scope of the present invention is conveyed to those skilled in the art fully.
Hereinafter, exemplary embodiment of the present invention is described with reference to the accompanying drawings in more detail.
With reference to Fig. 1, device of the present invention comprises substrate, intrinsic GaN layer, AlN separation layer, AlGaN barrier layer (intrinsic AlGaN layer), AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, source field plate, insulating barrier, passivation layer and for regulating the silicide of two-dimensional electron gas. AlGaN doped layer is positioned on intrinsic AlGaN, and p-type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned on AlGaN doped layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier. on substrate, epitaxial growth has enhanced AlGaN/GaN heterojunction material, and in this structure, form active electrode and drain electrode, then deposit one layer insulating, wherein thick dielectric layer is between gate electrode and drain electrode, adjacent gate electrode, thickness is 200nm-700nm, thin dielectric layer lay respectively between thick dielectric layer and drain electrode and gate electrode and source electrode between, thickness is 5~10nm, on insulating barrier (between grid leak region and grid source region), be formed with silicide, silicide can be introduced compression to insulating barrier and AlGaN layer, AlGaN layer between silicide can be subject to tensile stress, interblock makes AlGaN layer totally obtain tensile stress apart from being less than piece width, thereby 2DEG in raceway groove is enhanced, described silicide comprises NiSi, TiSi2Or Co2Si, is electrically connected the silicide in thick dielectric layer formation source field plate structure with source electrode; There is p-GaN epitaxial layer in gate electrode below, forms enhancement device. Last deposit passivation layer is realized the passivation of device.
Backing material in the present invention is sapphire, carborundum, GaN or MgO, and in intrinsic AlGaN layer and AlGaN doped layer, the component of Al and Ga can regulate, AlxGa1-xX=0~1 in N, its intrinsic GaN layer can replace with AlGaN layer, and Al component is less than the Al component in intrinsic AlGaN layer and AlGaN doped layer in this AlGaN, p-type GaN material can replace with p-type AlGaN material or p-type InGaN material, silicide in thick dielectric layer is electrically connected with source electrode, forms source field plate structure.
The foregoing is only embodiments of the invention, be not limited to the present invention. The present invention can have various suitable changes and variation. All any amendments of doing within the spirit and principles in the present invention, be equal to replacement, improvement etc., within protection scope of the present invention all should be included in.

Claims (7)

1. add source field plate enhanced AlGaN/GaNHEMT device architecture, it is characterized in that: described structure bagDraw together substrate, intrinsic GaN layer, AlN separation layer, intrinsic AlGaN layer, AlGaN doped layer, p-type GaN layer,Gate electrode, source electrode, drain electrode, source field plate, insulating barrier, passivation layer and for regulating two-dimensional electron gasSilicide, described AlGaN doped layer is positioned on intrinsic AlGaN layer, and p-type GaN layer is positioned at AlGaN dopingOn layer, source-drain electrode and insulating barrier are positioned on AlGaN doped layer, and gate electrode is positioned on p-type GaN layer,Silicide is positioned on insulating barrier; On substrate, epitaxial growth has enhanced AlGaN/GaN heterojunction material, andOn this heterojunction material, form active electrode and drain electrode, then deposit one layer insulating, wherein thick dielectric layer is positioned at gridBetween electrode and drain electrode, adjacent gate electrode, thickness is 200nm-700nm, thin dielectric layer lays respectively at thick dielectric layerAnd between drain electrode and between gate electrode and source electrode, thickness is 5~10nm, the grid leak region on insulating barrier andBetween grid source region, be formed with silicide, silicide is block, can introduce compression to insulating barrier and AlGaN layer,AlGaN layer between silicide can be subject to tensile stress, by making interblock apart from being less than piece width, makes AlGaN layer totalBody obtains tensile stress, thereby 2DEG in raceway groove is enhanced, and described silicide comprises NiSi, TiSi2Or Co2Si,Silicide in thick dielectric layer is electrically connected to formation source field plate structure with source electrode; Gate electrode below exists outside p-GaNProlong layer, form enhancement device, last deposit passivation layer is realized the passivation of device.
2. source field plate enhanced AlGaN/GaNHEMT device architecture, its feature of adding according to claim 1Be: the material of substrate is wherein sapphire, carborundum, GaN or MgO.
3. source field plate enhanced AlGaN/GaNHEMT device architecture, its feature of adding according to claim 1Be: in intrinsic AlGaN layer and AlGaN doped layer, the component of Al and Ga can regulate, AlxGa1-xIn Nx=0~1。
4. source field plate enhanced AlGaN/GaNHEMT device architecture, its feature of adding according to claim 1Be: its intrinsic GaN layer replaces with AlGaN layer, and in this AlGaN Al component be less than intrinsic AlGaN layer andAl component in AlGaN doped layer.
5. source field plate enhanced AlGaN/GaNHEMT device architecture, its feature of adding according to claim 1For the silicide being positioned in thick dielectric layer is electrically connected with source electrode, form source field plate structure, improve the breakdown voltage of device.
6. source field plate enhanced AlGaN/GaNHEMT device architecture, its feature of adding according to claim 1For: wherein p-type GaN layer material replaces with p-type AlGaN material or p-type InGaN material.
7. the preparation method based on adding source field plate enhanced AlGaN/GaNHEMT device architecture, comprises the steps:
(1) epitaxially grown enhancement mode p-GaN/AlGaN/GaN material is carried out to organic washing, with flow go fromSub-water cleans and puts into HCl: H2O=1: in the solution of 1 volume ratio, corrode 30-60s, finally with flow go fromSub-water cleans and dries up with high pure nitrogen;
(2) the p-GaN/AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region platformFace;
(3) the p-GaN/AlGaN/GaN material for preparing table top is carried out to photoetching, form the etched area of p-GaNTerritory;
(4) and by material put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W,Lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl2Flow be 10sccm, the flow of Ar gas is 10sccm,Etch period is 10min, etches away the extra-regional p-GaN epitaxial layer of gate electrode;
(5) the p-GaN/AlGaN/GaN material that completes etching is carried out to photoetching, form source-drain electrode metal area, putEnter in electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm and peel off, finally existingIn nitrogen environment, carry out 850 DEG C, the rapid thermal annealing of 35s, form Ohmic contact;
(6) device is put into magnetron sputtering reative cell and prepared Al2O3Film, process conditions are: the direct current of Al target is inclined to one sidePutting voltage is 100V, and Ar throughput is 30sccm, O2Flow is 10sccm, and the pressure of reative cell is 0.5Pa, depositThe Al that 300nm is thick2O3Film;
(7) device that completes deposit is carried out to photoetching development, form Al2O3The wet etching district of film, puts materialEnter HF: H2O=1: in the solution of 10 volume ratios, by Al2O3Corrode to 5-10nm;
(8) then device is put into simultaneously sputter Ni and the Si of reative cell of magnetron sputtering, process conditions are: Ni targetDC offset voltage is 100V, and the radio-frequency bias voltage of Si target is 450V, and the flow of carrier gas Ar is 30sccm, forms sediment altogetherThe long-pending thick hybrid metal film of 100nm~150nm;
(9) device of the good film of deposit is carried out to photoetching, form the etching window district of mixed film, and it is dry to put into ICPIn method etching reaction chamber, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, reaction constant pressurePower is 1.5Pa, CF4Flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 5min, through overdryingThe silicide staying on device after method etching is bulk, and makes the spacing between silicide agglomeration be less than silicide agglomerationWidth;
(10) device is put into quick anneal oven, under nitrogen environment, carry out 450 DEG C, the rapid thermal annealing of 30s,Form NiSi alloy, silicide can be introduced compression, the AlGaN between silicide to insulating barrier and AlGaN layerLayer can be subject to tensile stress, by making interblock apart from being less than piece width, makes AlGaN layer totally obtain tensile stress, thereby2DEG in raceway groove is enhanced;
(11) device that completes alloy is carried out to photoetching, form gate electrode region, and device is put into HF: H2O=1∶1In the solution of volume ratio by the Al in gate electrode region2O3Corrosion forms gate electrode window completely, then puts into electron beam and steamsSend out in platform deposit Ni/Au=20/200nm and peel off, completing the preparation of gate electrode;
(12) put into PECVD reative cell deposit SiN passivating film by completing device prepared by gate electrode, concreteProcess conditions are: SiH4Flow be 40sccm, NH3Flow be 10sccm, chamber pressure is 1~2Pa,Radio-frequency power is 40W, the SiN passivating film that deposit 200nm~300nm is thick;
(13) device is cleaned again, photoetching development, form the etched area of SiN film, and put into ICP dry methodIn etching reaction chamber, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, chamber pressureFor 1.5Pa, CF4Flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min, by source electrode,SiN and Al that drain electrode and silicide field plate cover above2O3Film etches away;
(14) device is cleaned, photoetching development, and put into electron beam evaporation platform deposit Ti/Au=20/200nm,Formation adds thick electrode and source field plate, completes the preparation of integral device.
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