CN103904111B - Based on enhanced AlGaN/GaN HEMT device structure and preparation method thereof - Google Patents
Based on enhanced AlGaN/GaN HEMT device structure and preparation method thereof Download PDFInfo
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- CN103904111B CN103904111B CN201410025004.5A CN201410025004A CN103904111B CN 103904111 B CN103904111 B CN 103904111B CN 201410025004 A CN201410025004 A CN 201410025004A CN 103904111 B CN103904111 B CN 103904111B
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- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract description 103
- 238000002360 preparation method Methods 0.000 title claims abstract description 7
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 53
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 53
- 238000000034 method Methods 0.000 claims abstract description 26
- 230000004888 barrier function Effects 0.000 claims abstract description 23
- 230000008569 process Effects 0.000 claims abstract description 11
- 238000002161 passivation Methods 0.000 claims abstract description 10
- 230000005533 two-dimensional electron gas Effects 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 230000001105 regulatory effect Effects 0.000 claims abstract description 5
- 238000007789 sealing Methods 0.000 claims abstract description 4
- 239000000463 material Substances 0.000 claims description 27
- 229910002601 GaN Inorganic materials 0.000 claims description 26
- 238000001259 photo etching Methods 0.000 claims description 14
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 10
- 239000007789 gas Substances 0.000 claims description 8
- 239000010409 thin film Substances 0.000 claims description 8
- 230000005611 electricity Effects 0.000 claims description 6
- 239000010408 film Substances 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 6
- 229910005883 NiSi Inorganic materials 0.000 claims description 5
- 238000005054 agglomeration Methods 0.000 claims description 5
- 230000002776 aggregation Effects 0.000 claims description 5
- 230000008859 change Effects 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- 229910045601 alloy Inorganic materials 0.000 claims description 4
- 239000000956 alloy Substances 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 239000008367 deionised water Substances 0.000 claims description 4
- 229910021641 deionized water Inorganic materials 0.000 claims description 4
- 238000011161 development Methods 0.000 claims description 4
- 238000001312 dry etching Methods 0.000 claims description 4
- 238000005566 electron beam evaporation Methods 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 claims description 4
- 238000004151 rapid thermal annealing Methods 0.000 claims description 4
- 229910008479 TiSi2 Inorganic materials 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 229910052594 sapphire Inorganic materials 0.000 claims description 3
- 239000010980 sapphire Substances 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 238000000231 atomic layer deposition Methods 0.000 claims description 2
- 239000012159 carrier gas Substances 0.000 claims description 2
- 238000005260 corrosion Methods 0.000 claims description 2
- 238000010894 electron beam technology Methods 0.000 claims description 2
- 238000009413 insulation Methods 0.000 claims description 2
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 claims description 2
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 238000005406 washing Methods 0.000 claims description 2
- 229910001868 water Inorganic materials 0.000 claims description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims 1
- 229910052593 corundum Inorganic materials 0.000 claims 1
- 229910001845 yogo sapphire Inorganic materials 0.000 claims 1
- 230000008901 benefit Effects 0.000 abstract description 4
- 230000010287 polarization Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 229910052799 carbon Inorganic materials 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910021244 Co2Si Inorganic materials 0.000 description 1
- 241000160765 Erebia ligea Species 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 150000003377 silicon compounds Chemical class 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
- H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1058—Channel region of field-effect devices of field-effect transistors with PN junction gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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Abstract
The invention discloses a kind of based on enhanced AlGaN/GaN HEMT device structure and preparation method thereof, described structure includes substrate, intrinsic GaN layer, AlN sealing coat, intrinsic AlGaN layer, AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, insulating barrier, passivation layer and for regulating the silicide of two-dimensional electron gas.Described source-drain electrode and insulating barrier are positioned on AlGaN doped layer, described gate electrode is positioned on p-type GaN layer, silicide is positioned on insulating barrier, described silicide, insulating barrier and AlGaN layer are introduced compressive stress, and the AlGaN layer between silicide is by tensile stress, by making block be smaller than block width, make AlGaN layer totally obtain tensile stress, increase the concentration of 2DEG.The present invention has the advantage that device frequency height, process repeatability and controllability are high.
Description
Technical field
The invention belongs to microelectronics technology, relate to semiconductor device and make, a kind of based on enhancement mode
AlGaN/GaN HEMT device structure and manufacture method, can be used for making the high-frequency enhancement mode of low on-resistance high
Electron mobility transistor.
Background technology
The 3rd bandwidth bandgap quasiconductor with SiC and GaN as representative is big with its energy gap in recent years, breakdown potential
The characteristic such as high, thermal conductivity is high, saturated electrons speed big and heterojunction boundary two-dimensional electron gas is high so that it is be subject to
Extensive concern.In theory, high electron mobility transistor (HEMT), light emitting diode that these materials make are utilized
The device such as LED, laser diode LD has obvious advantageous characteristic than existing device, the most domestic and international
It is had made extensive and intensive studies by researcher, and achieves the achievement in research attracted people's attention.
AlGaN/GaN hetero-junctions high electron mobility transistor (HEMT) is in high-temperature device and HIGH-POWERED MICROWAVES device side
Face has had shown that advantageous advantage, pursuit device altofrequency, high pressure, high power have attracted numerous research.
In recent years, make higher frequency high pressure AlGaN/GaN HEMT and become the another study hotspot of concern.Due to
After AlGaN/GaN hetero-junctions has grown, heterojunction boundary exists for a large amount of two-dimensional electron gas 2DEG, works as interface
When resistivity reduces, we can obtain higher device frequency characteristic.AlGaN/GaN hetero-junctions electron mobility
Transistor can obtain the highest frequency, but often will be to sacrifice high pressure resistant property as cost.Improve at present
The method of AlGaN/GaN heterojunction transistor frequency is as follows:
1. combine without passivated dielectric medium (dielectric-free passivation) with long Ohmic contact of living again to reduce electricity
Resistance rate.See the InAlN/AlN/GaN HEMTs With such as Yuanzheng Yue, Zongyang Hu, Jia Guo
Regrown Ohmic Contacts and fTof 370 GH.EDL.Vol33.NO.7, P1118-P1120.Should
It is long that method have employed 30 nanometer grid, and combine without passivated dielectric medium (dielectric-free passivation) with live again
Long Ohmic contact reduces source and drain resistivity.Frequency can reach 370GHz.Can also continue by reducing channel length
The continuous frequency that improves is to 500GHz.
2. long heavy-doped source of living again drains to the Two-dimensional electron gas channel of nearly grid.See Shinohara, K.Regan,
The self-aligned-gate GaN-HEMTs with heavily-doped n such as D.Corrion, A.Brown+-GaN ohmic
contacts to 2DEG；IEDM, IEEE；2012.Live again long n in the past+GaN Ohmic contact is to reducing raceway groove contact
Resistance achieves noticeable achievement, but the Two-dimensional electron gas channel that heavy-doped source drain contact is directly arrived under gate electrode can obtain
Preferably frequency characteristic and current characteristics.In literary composition, the method for report makes frequency reach fT/ fmax=342/518GHz.
Breakdown voltage 14V simultaneously.
Summary of the invention
Present invention aims to the deficiency of above altofrequency device, it is provided that raceway groove is produced by one based on silicide
The method of stress, to improve the frequency characteristic of enhanced AlGaN/GaN high mobility transistor simultaneously, strengthens technique
Controllability and repeatability, meet GaN base electronic device to altofrequency, the application requirement of low on-resistance.
The present invention is achieved in that
The technical thought of the present invention is: use epitaxial growth the method etched grow thin dielectric layer on AlGaN,
Growing multiple bulk silicon compound on thin dielectric layer, silicide agglomeration is smaller than block width, due to the thermal expansion of silicide
Coefficient is more than the thermal coefficient of expansion of insulating barrier with AlGaN.When epitaxial growth cools down, silicide can to insulating barrier with
And AlGaN layer introduces compressive stress, meanwhile, the AlGaN layer between silicide will be by tensile stress.
When AlGaN layer by compressive stress when, the 2DEG concentration being positioned at AlGaN/GaN interface has reduced, and works as
The when that AlGaN layer being by tensile stress, the 2DEG concentration being positioned at AlGaN/GaN interface increased.AlGaN
The size of layer institute's compression chord (tensile stress) is relevant with the length of silicide (silicide spacing), and this relation is not
It is a kind of linear relationship, and is treated as the impact on polarization charge of the use stress in time reducing suffered by AlGaN layer
Increase sharply (as shown below), so we can make the spacing difference between the width of silicide, silicide
Realizing the regulation of two-dimensional electron gas, the increase of 2DEG concentration still reduces on the whole, depends on the two
Magnitude relationship, in this invention, we select make two-dimensional electron gas increase to reduce channel resistance.So
Stress is greater than compressive stress, and then silicide width is greater than silicide spacing.If as in figure 2 it is shown, silicide
Width is 1 μm, and silicide spacing is 0.25 μm. the tension force that so silicide spacing (0.25 μm) region is stood
Effect makes polarization charge finally two orders of magnitude bigger than the polarization charge of silicide regions (1 μm), so on the whole
Effect shows as AlGaN layer and be increased by the i.e. polarization charge concentration of tensile stress, thus between grid source and between grid leak
The concentration of 2DEG also presents the result of overall increase because of the increase of polarization charge.Therefore the resistance in this region has
Reduced.See IEICE TRANS.ELECTON, VOL.E93-C, NO.8 AUGUST 2010.Analysis of
Passivation-Film-Induced Stress Effects on Electrical Properties in AlGaN/GaN HEMTs.
Make the length being smaller than silicide between silicide by selection, make the growth of 2DEG concentration much larger than 2DEG
The reduction of concentration, so that the resistance between grid leak and grid source has reduced, carry in the case of not changing grid leak spacing
The frequency characteristic of high high mobility transistor.
According to above-mentioned technical thought, device of the present invention includes substrate, intrinsic GaN layer, AlN sealing coat, AlGaN
Barrier layer (intrinsic AlGaN layer), AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode,
Insulating barrier, passivation layer and for regulating the silicide of two-dimensional electron gas.AlGaN doped layer is positioned at intrinsic
On AlGaN layer, p-type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned at AlGaN
On doped layer, gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier.Extension on substrate
Growth has enhanced AlGaN/GaN heterojunction material, and is formed with source electrode and drain electrode on this structure, then
Depositing a layer insulating, the thickness of insulating barrier is 5～10nm, on the insulating layer (between grid leak region and grid source region),
Being formed with silicide, silicide is block, insulating barrier and AlGaN layer can be introduced compressive stress, be positioned at silicide it
Between AlGaN layer can be by tensile stress, by making block be smaller than block width so that AlGaN layer totally obtains
Stress, so that 2DEG is strengthened in raceway groove, described silicide includes NiSi, TiSi2Or Co2Si, grid electricity
There is p-GaN epitaxial layer below pole, form enhancement device.Finally deposit passivation layer realizes the passivation of device.
Backing material in the present invention is sapphire, carborundum, GaN or MgO, intrinsic AlGaN layer and AlGaN
In doped layer, the component of Al with Ga can regulate, AlxGa1-xX=0 in N～1, intrinsic GaN layer can replace with
AlGaN layer, and in this AlGaN, Al component is less than the Al component in intrinsic AlGaN layer and AlGaN doped layer,
P-type GaN material can replace with p-type AlGaN material or p-type InGaN material.As it is shown on figure 3, foundation
Above-mentioned technical thought, utilizes metal silicide to improve the structure of enhanced AlGaN/GaN HEMT device performance, bag
Include following steps:
(1) epitaxially grown p-GaN/AlGaN/GaN material is carried out organic washing, with the deionized water of flowing
Clean and put into HCl: H2The solution of O=1: 1 volume ratio carries out corroding 30-60s, finally with the deionized water of flowing
Clean and dry up with high pure nitrogen；
(2) the p-GaN/AlGaN/GaN material cleaned up is carried out photoetching and dry etching, be formed with source region
Table top；
(3) the p-GaN/AlGaN/GaN material preparing table top is carried out photoetching, form the etched area of p-GaN
Territory；
(4) and by material putting in ICP dry etching reative cell, process conditions are: upper electrode power is 200W,
Lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl2The flow that flow is 10sccm, Ar gas be 10sccm,
Etch period is 10min, etches away the p-GaN epitaxial layer that gate electrode area is overseas；
(5) the p-GaN/AlGaN/GaN material completing etching is carried out photoetching, forms source and drain ohmic contact regions,
Put into and electron beam evaporation platform deposits metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm and peels off, finally
In nitrogen environment, carry out 850 DEG C, the rapid thermal annealing of 35s, form Ohmic contact；
(6) putting in atomic layer deposition apparatus by device, process conditions are: growth temperature is 300 DEG C, and pressure is
2000Pa, H2The flow of O and TMAl is 150sccm, the Al that deposit 5-10nm is thick2O3Medium；
(7) then being put into by device in the reative cell of magnetron sputtering and sputter Ni and Si simultaneously, process conditions are: Ni
The DC offset voltage of target be the radio-frequency bias voltage of 100V, Si target be 450V, the flow of carrier gas Ar is 30sccm,
The hybrid metal thin film that codeposition 100nm～150nm is thick；
(8) device having deposited thin film is carried out photoetching, form the etching window district of mixed film, and it is dry to put into ICP
In method etching reaction chamber, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, react chamber pressure
Power is 1.5Pa, CF4The flow that flow is 20sccm, Ar gas be 10sccm, etch period is 5min, through overdrying
After method etching, the silicide that stays on device is bulk, and makes to be smaller than silicide agglomeration between silicide agglomeration
Width；
(9) device is put in quick anneal oven, carry out 450 DEG C in a nitrogen environment, the rapid thermal annealing of 30s,
Forming NiSi alloy, silicide can introduce compressive stress, the AlGaN between silicide to insulating barrier and AlGaN layer
Layer can be by tensile stress, and block is smaller than block width and makes AlGaN layer totally obtain tensile stress, so that in raceway groove
2DEG is strengthened；
(10) device completing alloy is carried out photoetching, form gate electrode region, and device is put into HF: H2O=1: 1
By the Al in gate electrode region in the solution of volume ratio2O3Corrosion completely forms gate electrode window, is then placed in electron beam and steams
Send out and platform deposits Ni/Au=20/200nm and peels off, complete the preparation of gate electrode；
(11) PECVD reative cell deposit SiN passivating film, concrete technology are put into by completing device prepared by gate electrode
Condition is: SiH4Flow be 40sccm, NH3Flow be 10sccm, chamber pressure is 1～2Pa, radio frequency merit
Rate is 40W, the SiN passivating film that deposit 200nm～300nm is thick；
(12) device is carried out again, photoetching development, formed SiN thin film etched area, and put into ICP do
In method etching reaction chamber, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, react chamber pressure
Power is 1.5Pa, CF4The flow that flow is 20sccm, Ar gas be 10sccm, etch period is 10min, by source electricity
SiN and Al that pole, drain electrode and gate electrode cover above2O3Thin film etches away；
(13) device is carried out, photoetching development, and put in electron beam evaporation platform deposit Ti/Au=20/200nm
Add thick electrode, complete the preparation of integral device.
Present invention have the advantage that
(1) method that the device of the present invention uses deposition insulating layer and silicide, produces stress effect to AlGaN, adjusts
Electron gas concentration and electric field intensity in joint raceway groove.Improve device frequency characteristic.
(2) in the present invention, prepared silicide, between grid leak and grid source, need not subtract while improving frequency characteristic
Few grid leak distance, thus without sacrificing high pressure resistant property.
(3) owing to size and the spacing of silicide can be regulated between grid leak and grid source as required in the present invention,
Thus regulate stress effect size.Electron gas concentration and frequency characteristic can be adjusted as required between grid source and between grid leak
Joint.
Accompanying drawing explanation
The exemplary embodiment of the present invention it is more fully described, the above and other side of the present invention by referring to accompanying drawing
Face and advantage will become the clearest, in the accompanying drawings:
Fig. 1 is the cross-sectional view of device of the present invention；
Fig. 2 is physical principle explanatory diagram (polarization charge is with the change of silicide width)；
Fig. 3 is the fabrication processing schematic diagram of device of the present invention.
Detailed description of the invention
Hereinafter, it is more fully described the present invention, various enforcements shown in the drawings now with reference to accompanying drawing
Example.But, the present invention can implement in many different forms, and should not be construed as limited to explain at this
The embodiment stated.On the contrary, it is provided that these embodiments make the disclosure will be thoroughly and completely, and by the present invention
Scope be fully conveyed to those skilled in the art.
Hereinafter, the exemplary embodiment of the present invention it is more fully described with reference to the accompanying drawings.
With reference to Fig. 1, device of the present invention includes substrate, intrinsic GaN layer, AlN sealing coat, AlGaN potential barrier (this
Levy AlGaN layer), AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, insulating barrier, blunt
Change layer and for regulating the silicide of two-dimensional electron gas.AlGaN doped layer is positioned on intrinsic AlGaN layer,
P-type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned on AlGaN doped layer,
Gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier.Enhancement mode is had at substrate Epitaxial growth
AlGaN/GaN heterojunction material, and it is formed with source electrode and drain electrode on this structure, then one layer of insulation of deposit
Layer, the thickness of insulating barrier is 5～10nm, on the insulating layer (between grid leak region and grid source region), is formed with silication
Thing, silicide can introduce compressive stress to insulating barrier and AlGaN layer, and the AlGaN layer between silicide can be subject to
Tensile stress, block is smaller than block width and makes AlGaN layer totally obtain tensile stress, so that 2DEG obtains in raceway groove
To strengthening, described silicide includes NiSi, TiSi2Or Co2, below gate electrode, there is p-GaN epitaxial layer, shape in Si
Become enhancement device.Finally deposit passivation layer realizes the passivation of device.Backing material in the present invention is sapphire, carbon
In SiClx, GaN or MgO, intrinsic AlGaN layer and AlGaN doped layer, the component of Al with Ga can regulate,
AlxGa1-xX=0 in N～1, intrinsic GaN layer can replace with AlGaN layer, and in this AlGaN, Al component is little
Al component in intrinsic AlGaN layer and AlGaN doped layer, p-type GaN material can replace with p-type AlGaN
Material or p-type InGaN material.
The foregoing is only embodiments of the invention, be not limited to the present invention.The present invention can have various conjunction
Suitable change and change.All any modification, equivalent substitution and improvement etc. made within the spirit and principles in the present invention,
Should be included within the scope of the present invention.
Claims (6)
1. one kind based on enhanced AlGaN/GaN HEMT device structure, it is characterised in that: described structure includes lining
The end, intrinsic GaN layer, AlN sealing coat, intrinsic AlGaN layer, AlGaN doped layer, p-type GaN layer, grid electricity
Pole, source electrode, drain electrode, insulating barrier, passivation layer and for regulating the silicide of two-dimensional electron gas, described
AlGaN doped layer is positioned on intrinsic AlGaN layer, and p-type GaN layer is positioned on AlGaN doped layer, source and drain electricity
Pole and insulating barrier are positioned on AlGaN doped layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned at absolutely
On edge layer；Enhanced AlGaN/GaN heterojunction material is had at substrate Epitaxial growth, and at this heterojunction material
On be formed with source electrode and drain electrode, then deposit a layer insulating, the thickness of insulating barrier is 5～10nm, insulation
Between grid leak region on layer and grid source region, being formed with silicide, silicide is block, can be to insulating barrier and AlGaN
Layer introduces compressive stress, and the AlGaN layer between silicide can be by tensile stress, by making block be smaller than block width,
Making AlGaN layer totally obtain tensile stress, so that 2DEG is strengthened in raceway groove, described silicide includes
NiSi, TiSi2Or Co2, there is p-GaN epitaxial layer in Si, forms enhancement device, finally deposit blunt below gate electrode
Change layer and realize the passivation of device.
It is the most according to claim 1 based on enhanced AlGaN/GaN HEMT device structure, it is characterised in that:
The material of substrate therein is sapphire, carborundum, GaN or MgO.
It is the most according to claim 1 based on enhanced AlGaN/GaN HEMT device structure, it is characterised in that:
The component of Al with Ga in intrinsic AlGaN and AlGaN doped layer can regulate, AlxGa1-xX=0～～1 in N.
It is the most according to claim 1 based on enhanced AlGaN/GaN HEMT device structure, it is characterised in that:
Intrinsic GaN layer replaces with AlGaN layer, and in this AlGaN, the component of Al is less than intrinsic AlGaN layer and AlGaN
Al component in doped layer.
The most according to claim 1 based on enhanced AlGaN/GaN HEMT device structure, it is characterized by:
P-type GaN layer material therein replaces with p-type AlGaN material or p-type InGaN material.
6. manufacture method based on enhanced AlGaN/GaN HEMT device structure, it is characterised in that: include as follows
Step:
(1) epitaxially grown p-GaN/AlGaN/GaN material is carried out organic washing, with the deionized water of flowing
Clean and put into HCl: H2The solution of O=1: 1 volume ratio carries out corroding 30-60s, finally with the deionized water of flowing
Clean and dry up with high pure nitrogen；
(2) the p-GaN/AlGaN/GaN material cleaned up is carried out photoetching and dry etching, be formed with source region
Table top；
(3) the p-GaN/AlGaN/GaN material preparing table top is carried out photoetching, form the etched area of p-GaN
Territory；
(4) and by material putting in ICP dry etching reative cell, process conditions are: upper electrode power is 200W,
Lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl2The flow that flow is 10sccm, Ar gas be 10sccm,
Etch period is 10min, etches away the p-GaN epitaxial layer that gate electrode area is overseas；
(5) the p-GaN/AlGaN/GaN material completing etching is carried out photoetching, forms source and drain ohmic contact regions,
Put into and electron beam evaporation platform deposits metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm and peels off, finally
In nitrogen environment, carry out 850 DEG C, the rapid thermal annealing of 35s, form Ohmic contact；
(6) putting in atomic layer deposition apparatus by device, process conditions are: growth temperature is 300 DEG C, and pressure is
2000Pa, H2The flow of O and TMAl is 150sccm, the Al that deposit 5-10nm is thick2O3Medium；
(7) then being put into by device in the reative cell of magnetron sputtering and sputter Ni and Si simultaneously, process conditions are: Ni
The DC offset voltage of target be the radio-frequency bias voltage of 100V, Si target be 450V, the flow of carrier gas Ar is 30sccm,
The hybrid metal thin film that codeposition 100nm～150nm is thick；
(8) device having deposited thin film is carried out photoetching, form the etching window district of mixed film, and it is dry to put into ICP
In method etching reaction chamber, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, react chamber pressure
Power is 1.5Pa, CF4The flow that flow is 20sccm, Ar gas be 10sccm, etch period is 5min, through overdrying
After method etching, the silicide that stays on device is bulk, and makes to be smaller than silicide agglomeration between silicide agglomeration
Width；
(9) device is put in quick anneal oven, carry out 450 DEG C in a nitrogen environment, the rapid thermal annealing of 30s,
Forming NiSi alloy, silicide can introduce compressive stress, the AlGaN between silicide to insulating barrier and AlGaN layer
Layer can be by tensile stress, and block is smaller than block width and makes AlGaN layer totally obtain tensile stress, so that in raceway groove
2DEG is strengthened；
(10) device completing alloy is carried out photoetching, form gate electrode region, and device is put into HF: H2O=1: 1
By the Al in gate electrode region in the solution of volume ratio2O3Corrosion completely forms gate electrode window, is then placed in electron beam and steams
Send out and platform deposits Ni/Au=20/200nm and peels off, complete the preparation of gate electrode；
(11) PECVD reative cell deposit SiN passivating film, concrete technology are put into by completing device prepared by gate electrode
Condition is: SiH4Flow be 40sccm, NH3Flow be 10sccm, chamber pressure is 1～2Pa, radio frequency merit
Rate is 40W, the SiN passivating film that deposit 200nm～300nm is thick；
(12) device is carried out again, photoetching development, formed SiN thin film etched area, and put into ICP do
In method etching reaction chamber, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, react chamber pressure
Power is 1.5Pa, CF4The flow that flow is 20sccm, Ar gas be 10sccm, etch period is 10min, by source electricity
SiN thin film that pole, drain electrode and gate electrode cover above and Al2O3Etch away；
(13) device is carried out, photoetching development, and put in electron beam evaporation platform deposit Ti/Au=20/200nm
Add thick electrode, complete the preparation of integral device.
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| CN109411350B (en) * | 2018-10-12 | 2021-12-10 | 中国工程物理研究院电子工程研究所 | Preparation method of GaN-based p-type gate structure |
| CN111524958B (en) * | 2019-02-01 | 2023-05-02 | 联华电子股份有限公司 | High electron mobility transistor |
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| CN114600253A (en) * | 2019-11-26 | 2022-06-07 | 苏州晶湛半导体有限公司 | Semiconductor structure and manufacturing method thereof |
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| EP0100529A1 (en) * | 1982-07-29 | 1984-02-15 | Nec Corporation | High speed field-effect transistor employing heterojunction |
| CN101410985A (en) * | 2006-03-29 | 2009-04-15 | 克里公司 | High efficiency and/or high power density wide bandgap transistors |
| CN101414629A (en) * | 2008-12-03 | 2009-04-22 | 西安电子科技大学 | Source field plate transistor with high electron mobility |
| CN103337516A (en) * | 2013-06-07 | 2013-10-02 | 苏州晶湛半导体有限公司 | Enhanced switching device and manufacturing method thereof |
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| EP0100529A1 (en) * | 1982-07-29 | 1984-02-15 | Nec Corporation | High speed field-effect transistor employing heterojunction |
| CN101410985A (en) * | 2006-03-29 | 2009-04-15 | 克里公司 | High efficiency and/or high power density wide bandgap transistors |
| CN101414629A (en) * | 2008-12-03 | 2009-04-22 | 西安电子科技大学 | Source field plate transistor with high electron mobility |
| CN103337516A (en) * | 2013-06-07 | 2013-10-02 | 苏州晶湛半导体有限公司 | Enhanced switching device and manufacturing method thereof |
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