CN103904110B - Add grid field plate depletion type insulated gate AlGaN/GaN device architecture and preparation method thereof - Google Patents

Add grid field plate depletion type insulated gate AlGaN/GaN device architecture and preparation method thereof Download PDF

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CN103904110B
CN103904110B CN201410025002.6A CN201410025002A CN103904110B CN 103904110 B CN103904110 B CN 103904110B CN 201410025002 A CN201410025002 A CN 201410025002A CN 103904110 B CN103904110 B CN 103904110B
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algan
layer
silicide
field plate
gan
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CN103904110A (en
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冯倩
杜锴
代波
张春福
梁日泉
郝跃
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Xidian University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/404Multiple field plate structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/407Recessed field plates, e.g. trench field plates, buried field plates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

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Abstract

The invention discloses one and add grid field plate depletion type insulated gate AlGaN/GaN device architecture and preparation method thereof, described structure comprises substrate, intrinsic GaN layer, AlN separation layer, intrinsic AlGaN layer, AlGaN doped layer, gate electrode, source electrode, drain electrode, grid field plate, insulating barrier, passivation layer and for regulating the silicide of two-dimensional electron gas, described source electrode, drain electrode and insulating barrier are positioned on AlGaN doped layer, described silicide and gate electrode are positioned on insulating barrier, grid field plate is electrically connected with gate electrode, described silicide is block, insulating barrier and AlGaN layer are introduced to compression, AlGaN layer between silicide is subject to tensile stress, by making interblock apart from being less than piece width, make AlGaN layer totally obtain tensile stress, increase the concentration of 2DEG.

Description

Add grid field plate depletion type insulated gate AlGaN/GaN device architecture and preparation method thereof
Technical field
The invention belongs to microelectronics technology, relate to semiconductor devices and make, one adds grid field plate consumption specificallyType AlGaN/GaNHEMT device architecture and preparation method, can be used for making low on-resistance, high-frequency, height to the greatest extentThe depletion high electron mobility transistors of breakdown voltage.
Background technology
, the breakdown potential large with its energy gap of the 3rd bandwidth bandgap semiconductor taking SiC and GaN as representative in recent yearsHigh, thermal conductivity is high, saturated electrons speed large and the characteristic such as heterojunction boundary two-dimensional electron gas height, and it is subject toExtensive concern. In theory, the high electron mobility transistor (HEMT), the light emitting diode that utilize these materials to makeThe device such as LED, laser diode LD has obvious advantageous characteristic than existing device, therefore domestic and international in the last few yearsResearcher has carried out extensive and deep research to it, and has obtained the achievement in research attracting people's attention.
AlGaN/GaN hetero-junctions high electron mobility transistor (HEMT) is in high-temperature device and HIGH-POWERED MICROWAVES device sideFace has demonstrated advantageous advantage, and pursuit device high-frequency, high pressure, high power have attracted numerous research.In recent years, make higher frequency high pressure AlGaN/GaNHEMT and become the another study hotspot of concern. Due toAfter AlGaN/GaN hetero-junctions has been grown, just there are a large amount of two-dimensional electron gas 2DEG in heterojunction boundary, works as interfaceWhen resistivity decreased, we can obtain higher device frequency characteristic. AlGaN/GaN hetero-junctions electron mobilityTransistor can obtain very high frequency, but often will be to sacrifice high pressure resistant property as cost. Improve at presentThe method of AlGaN/GaN heterojunction transistor frequency is as follows:
1. in conjunction with reducing electricity without passivated dielectric medium (dielectric-freepassivation) and the long Ohmic contact of living againResistance rate. Referring to YuanzhengYue, ZongyangHu, the InAlN/AlN/GaNHEMTsWith such as JiaGuoRegrownOhmicContactsandfTOf370GH. EDL.Vol33.NO.7, P1118-P1120. The partyMethod has adopted 30 nanometer grid long, and combination is without passivated dielectric medium (dielectric-freepassivation) and the length of living againOhmic contact reduces source ohmic leakage rate. Frequency can reach 370GHz. Can also continue by reducing channel lengthImprove frequency to 500GHz.
2. the long heavy-doped source of living again drains to the Two-dimensional electron gas channel of nearly grid. Referring to Shinohara, K.Regan,D.Corrion, the self-aligned-gateGaN-HEMTswithheavily-dopedn such as A.Brown+-GaNohmicContactsto2DEG; IEDM, IEEE; 2012. Long n in the past lives again+GaN Ohmic contact is to reducing raceway groove contactResistance achieves noticeable achievement, but heavy-doped source drain contact directly can obtain to the Two-dimensional electron gas channel approaching under gate electrodeBetter frequency characteristic and current characteristics. The method of reporting in literary composition makes frequency reach fT/fmax=342/518GHz。Breakdown voltage 14V simultaneously.
Summary of the invention
The object of the invention is to the deficiency for above high-frequency device, provide a kind of and based on silicide, raceway groove is producedThe method of stress, to improve the transistorized frequency characteristic voltage endurance of depletion-mode AlGaN/GaN high mobility simultaneously,The controllability and the repeatability that strengthen technique, meet GaN base electron device to high-frequency, high-tension application requirements.
The present invention is achieved in that
Technical thought of the present invention is: use the method for epitaxial growth the etching insulating barrier of growing on AlGaN,Generate a step-like thick thin dielectric layer by etching, more multiple bulk silicon compounds of growing on thin dielectric layer, silicationThing interblock is apart from being less than piece width, the Formation of silicide field plate be connected in gate electrode of also growing in thick dielectric layer. Due to silicationThe thermal coefficient of expansion of thing is greater than the thermal coefficient of expansion of insulating barrier and AlGaN. In the time that epitaxial growth is cooling, silicide meetingInsulating barrier and AlGaN layer are introduced to compression, and meanwhile, the AlGaN layer between silicide will be subject toTo tensile stress. In the time that AlGaN layer is subject to compression, be positioned at the 2DEG concentration at AlGaN/GaN interface to some extentReduce, and in the time that AlGaN layer is subject to tensile stress, the 2DEG concentration that is positioned at AlGaN/GaN interface increases to some extentAdd. The size of AlGaN layer institute compression chord (tensile stress) is relevant with the length of silicide (silicide spacing), thisKind of relation is not a kind of linear relationship, but when operating distance reduces the suffered stress of AlGaN layer to polarizingThe impact of electric charge increases sharply (being illustrated in fig. 2 shown below), so we can make between the width, silicide of silicideSpacing difference realize the adjusting of two-dimensional electron gas, the increase of 2DEG concentration still reduces on the wholeDepend on the magnitude relationship of the two, in this invention, we select to make two-dimensional electron gas increase reduce raceway grooveResistance. So tensile stress is greater than compression, so silicide width is greater than silicide spacing. As shown in the figure, asThe width of fruit silicide is 1 μ m, and silicide spacing is 0.25 μ m. (0.25 μ is region institute m) for silicide spacing soThe tension force effect standing makes polarization charge finally than silicide regions (large two orders of magnitude of 1 μ polarization charge m), instituteShowing as AlGaN layer with effect on the whole, to be subject to tensile stress be that polarization charge concentration increases to some extent, thereby between grid sourceAnd between grid leak, the concentration of 2DEG also presents the result that entirety increases because of the increase of polarization charge. Therefore this regionResistance reduces to some extent. Referring to IEICETRANS.ELECTON, VOL.E93-C, NO.8AUGUST2010.AnalysisofPassivation-Film-InducedStressEffectsonElectricalPropertiesinAlGaN/GaNHEMTs. make spacing between silicide be less than the length of silicide by selection, make 2DEG concentrationGrowth much larger than the reducing of 2DEG concentration, thereby the resistance between grid leak and grid source reduced to some extent, do not changingIn the situation of grid leak spacing, improve the transistorized frequency characteristic of high mobility. Field plate in thick dielectric layer due to mediumThick, can ignore the impact of 2DEG, but be connected in the effect that can play field plate after gate electrode, can improve thisBright voltage endurance.
According to above-mentioned technical thought, device of the present invention comprises substrate, intrinsic GaN layer, AlN separation layer, AlGaNBarrier layer (intrinsic AlGaN layer), AlGaN doped layer, gate electrode, source electrode, drain electrode, grid field plate, insulationLayer, passivation layer and for regulating the silicide of two-dimensional electron gas. Described AlGaN doped layer is positioned at intrinsicOn AlGaN layer, source-drain electrode and insulating barrier are positioned on AlGaN doped layer, and gate electrode and silicide are positioned atOn insulating barrier; On substrate, epitaxial growth has depletion-mode AlGaN/GaN heterojunction material, and at this hetero-junctions materialOn material, form active electrode and drain electrode, then deposit one layer insulating, wherein thick dielectric layer is positioned at gate electrode and electric leakageBetween the utmost point, adjacent gate electrode, thickness is 200nm-700nm, thin dielectric layer lay respectively at thick dielectric layer and drain electrode itBetween and between gate electrode and source electrode, thickness is 5~10nm, is formed with gate electrode, on insulating barrier on insulating barrierGrid leak region and grid source region between, be formed with silicide, silicide is block, can be to insulating barrier and AlGaNLayer is introduced compression, and the AlGaN layer between silicide can be subject to tensile stress, by making interblock apart from being less than piece width,Make AlGaN layer totally obtain tensile stress, thereby 2DEG in raceway groove is enhanced, described silicide comprisesNiSi,TiSi2Or Co2Si, is electrically connected the silicide in thick dielectric layer and forms grid field plate structure with gate electrode, lastDeposit passivation layer is realized the passivation of device.
Backing material in the present invention is sapphire, carborundum, GaN or MgO, intrinsic AlGaN layer and AlGaNIn doped layer, the component of Al and Ga can regulate, AlxGa1-xX=0~1 in N, its intrinsic GaN layer can be replacedFor AlGaN layer, and in this AlGaN, Al component is less than the Al group in intrinsic AlGaN layer and AlGaN doped layerPart, and the silicide in thick dielectric layer is electrically connected to formation grid field plate structure with gate electrode, improve the breakdown voltage of device,Adopt insulated gate structure at gate electrode, reduced gate electrode leakage current.
According to above-mentioned technical thought, utilize the structure of metal silicide raising AlGaN/GaNHEMT device performance,Comprise the steps:
(1) epitaxially grown AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and putEnter HCl: H2O=1: corrode 30-60s in the solution of 1 volume ratio, finally by mobile washed with de-ionized water useHigh pure nitrogen dries up;
(2) the AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the AlGaN/GaN material for preparing table top is carried out to photoetching, form source-drain area, put into electron beam evaporationDeposit metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm peeling off in platform finally enters in nitrogen environmentThe rapid thermal annealing of 850 DEG C of row, 35s, forms Ohmic contact;
(4) device is put into magnetron sputtering reative cell and prepared Al2O3Film, process conditions are: the direct current of Al target is inclined to one sidePutting voltage is 100V, and Ar throughput is 30sccm, O2Flow is 10sccm, and the pressure of reative cell is 0.5Pa, depositThe Al that 300nm is thick2O3Film;
(5) device that completes deposit is carried out to photoetching development, form Al2O3The wet etching district of film, puts materialEnter HF: H2O=1: in the solution of 10 volume ratios, corrosion 3min~5min, by Al2O3Corrode to 5-10nm;
(6) then device is put into simultaneously sputter Ni and the Si of reative cell of magnetron sputtering, process conditions are: Ni targetDC offset voltage be 100V, the radio-frequency bias voltage of Si target is 450V, the flow of carrier gas Ar is 30sccm,The hybrid metal film that codeposition 100nm~150nm is thick;
(7) device of the good film of deposit is carried out to photoetching, form the etching window district of mixed film, and put into ICPIn dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, reative cellPressure is 1.5Pa, CF4Flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 5min, processThe silicide staying on device after dry etching is bulk, and makes the spacing between silicide agglomeration be less than silicidePiece width;
(8) device is put into quick anneal oven, under nitrogen environment, carry out 450 DEG C, the rapid thermal annealing of 30s,Form NiSi alloy, silicide can be introduced compression, the AlGaN layer between silicide to insulating barrier and AlGaN layerCan be subject to tensile stress, by making interblock apart from being less than piece width, make AlGaN layer totally obtain tensile stress, thereby makeIn raceway groove, 2DEG is enhanced;
(9) device that completes alloy is carried out to photoetching, form gate electrode and grid field plate region, then put into electron beamDeposit Ni/Au=20/200nm peeling off in evaporator, completes the preparation of gate electrode and grid field plate;
(10) put into PECVD equipment deposit SiN film, concrete technology by completing device prepared by gate electrodeCondition is: SiH4Flow be 40sccm, NH3Flow be 10sccm, chamber pressure is 1~2Pa, radio frequency meritRate is 40W, the SiN passivating film that deposit 200nm~300nm is thick;
(11) device is cleaned again, photoetching development, form the etched area of SiN film, and it is dry to put into ICPIn method etching reaction chamber, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, reaction constant pressurePower is 1.5Pa, CF4Flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min, by source electricityThe SiN that the utmost point, drain electrode and gate electrode cover above and Al2O3Film etches away;
(12) device is cleaned, photoetching development, and put into electron beam evaporation platform deposit Ti/Au=20/200nmAdd thick electrode, complete the preparation of integral device.
Tool of the present invention has the following advantages:
(1) device of the present invention adopts the method for deposition insulating layer and silicide, and AlGaN is produced to effect of stress,Regulate electron gas concentration and electric-field intensity in raceway groove. Improve device frequency characteristic.
(2) in the present invention, prepared silicide, between grid leak and grid source, does not need when improving frequency characteristicReduce grid leak distance, thereby without sacrificing high pressure resistant property.
(3) in the present invention owing to can regulate as required size and the spacing of silicide between grid leak and grid source,Thereby regulate effect of stress size. Electron gas concentration and frequency characteristic can be adjusted as required between grid source and between grid leakJoint.
(4) in the present invention grid field plate add the breakdown voltage that has improved device.
(5) in the present invention, adopt insulated gate structure, greatly reduced gate electrode leakage current.
Brief description of the drawings
By describing in more detail exemplary embodiment of the present invention with reference to accompanying drawing, above and other side of the present inventionFace and advantage will become more and be readily clear of, in the accompanying drawings:
Fig. 1 is the cross-sectional view of device of the present invention;
Fig. 2 is physical principle key diagram (polarization charge is with the variation of silicide width);
Fig. 3 is the fabrication processing schematic diagram of device of the present invention.
Detailed description of the invention
Hereinafter, now with reference to accompanying drawing, the present invention is described more fully, various enforcement shown in the drawingsExample. But the present invention can implement in many different forms, and should not be interpreted as being confined to explain at thisThe embodiment stating. On the contrary, it will be thorough with completely providing these embodiment to make the disclosure, and by the present inventionScope convey to fully those skilled in the art.
Hereinafter, exemplary embodiment of the present invention is described with reference to the accompanying drawings in more detail.
With reference to Fig. 1, device of the present invention comprise substrate, intrinsic GaN layer, AlN separation layer, intrinsic AlGaN layer,AlGaN doped layer, gate electrode, source electrode, drain electrode, source field plate, insulating barrier, passivation layer and for regulating twoThe silicide of dimensional electron gas concentration; Described AlGaN doped layer is positioned on intrinsic AlGaN layer, source-drain electrode andInsulating barrier is positioned on AlGaN doped layer, and gate electrode and silicide are positioned on insulating barrier; On substrate, extension is rawLong have depletion-mode AlGaN/GaN heterojunction material, and on this heterojunction material, form active electrode and drain electrode,Then deposit one layer insulating, wherein thick dielectric layer between gate electrode and drain electrode, adjacent gate electrode, thickness is200nm-700nm, thin dielectric layer lay respectively between thick dielectric layer and drain electrode and gate electrode and source electrode between, thicknessBe 5~10nm, on insulating barrier, be formed with gate electrode, between grid leak region and grid source region on insulating barrier, shapeIt is block becoming to have silicide, silicide, can introduce compression, the AlGaN between silicide to insulating barrier and AlGaN layerLayer can be subject to tensile stress, by making interblock apart from being less than piece width, makes AlGaN layer totally obtain tensile stress, thereby2DEG in raceway groove is enhanced, and described silicide comprises NiSi, TiSi2Or Co2Si, by thick dielectric layerSilicide is electrically connected with gate electrode and forms grid field plate structure, and last deposit passivation layer is realized the passivation of device.
Backing material in the present invention is sapphire, carborundum, GaN or MgO, intrinsic AlGaN layer and AlGaNIn doped layer, the component of Al and Ga can regulate, AlxGa1-xX=0~1 in N, its intrinsic GaN layer can be replacedFor AlGaN layer, and in this AlGaN, Al component is less than the Al group in intrinsic AlGaN layer and AlGaN doped layerPart, and the silicide in thick dielectric layer is electrically connected to formation grid field plate structure with gate electrode, improve the breakdown voltage of device,Adopt insulated gate structure at grid, reduced grid leakage current.
The foregoing is only embodiments of the invention, be not limited to the present invention. The present invention can have various closingSuitable change and variation. All any amendments of doing within the spirit and principles in the present invention, be equal to replacement, improvement etc.,Within all should being included in protection scope of the present invention.

Claims (7)

1. add a grid field plate depletion type insulated gate AlGaN/GaN device architecture, it is characterized in that: described structure bagDraw together substrate, intrinsic GaN layer, AlN separation layer, intrinsic AlGaN layer, AlGaN doped layer, gate electrode, source electricityThe utmost point, drain electrode, grid field plate, insulating barrier, passivation layer and for regulating the silicide of two-dimensional electron gas; DescribedAlGaN doped layer is positioned on intrinsic AlGaN layer, and source-drain electrode and insulating barrier are positioned on AlGaN doped layer,Gate electrode and silicide are positioned on insulating barrier; On substrate, epitaxial growth has depletion-mode AlGaN/GaN hetero-junctions materialMaterial, and on this heterojunction material, form active electrode and drain electrode, then deposit one layer insulating, wherein heavy insulationLayer between gate electrode and drain electrode, adjacent gate electrode, thickness is 200nm-700nm, thin dielectric layer lays respectively atBetween thick dielectric layer and drain electrode and between gate electrode and source electrode, thickness is 5~10nm, on insulating barrier, is formed withGate electrode, between grid leak region and grid source region on insulating barrier, is formed with silicide, and silicide is block, meetingInsulating barrier and AlGaN layer are introduced to compression, and the AlGaN layer between silicide can be subject to tensile stress, by making pieceSpacing is less than piece width, makes AlGaN layer totally obtain tensile stress, thereby 2DEG in raceway groove is enhanced,Described silicide comprises NiSi, TiSi2Or Co2Si is electrically connected the silicide in thick dielectric layer formation with gate electrodeGrid field plate structure, last deposit passivation layer is realized the passivation of device.
2. grid field plate depletion type insulated gate AlGaN/GaN device architecture, its feature of adding according to claim 1Be: backing material is wherein sapphire, carborundum, GaN or MgO.
3. grid field plate depletion type insulated gate AlGaN/GaN device architecture, its feature of adding according to claim 1Be: wherein in intrinsic AlGaN layer and AlGaN doped layer, the component of Al and Ga can regulate, AlxGa1-xNMiddle x=0~1.
4. grid field plate depletion type insulated gate AlGaN/GaN device architecture, its feature of adding according to claim 1Be: its intrinsic GaN layer replaces with AlGaN layer, and in this AlGaN, the component of Al is less than intrinsic AlGaN layerWith the Al component in AlGaN doped layer.
5. grid field plate depletion type insulated gate AlGaN/GaN device architecture, its feature of adding according to claim 1For: the silicide being positioned in thick dielectric layer is electrically connected formation grid field plate structure with gate electrode, improve the breakdown voltage of device.
6. grid field plate depletion type insulated gate AlGaN/GaN device architecture, its feature of adding according to claim 1For: gate electrode adopts insulated gate structure, has reduced gate electrode leakage current.
7. the preparation method based on adding grid field plate depletion type insulated gate AlGaN/GaN device architecture, comprises the steps:
(1) epitaxially grown AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and putEnter HCl: H2O=1: corrode 30-60s in the solution of 1 volume ratio, finally by mobile washed with de-ionized water useHigh pure nitrogen dries up;
(2) the AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the AlGaN/GaN material for preparing table top is carried out to photoetching, form source-drain area, put into electron beam evaporationDeposit metal ohmic contact Ti/Al/Ni/Au=20/120/45/50nm peeling off in platform finally enters in nitrogen environmentThe rapid thermal annealing of 850 DEG C of row, 35s, forms Ohmic contact;
(4) device is put into magnetron sputtering reative cell and prepared Al2O3Film, process conditions are: the direct current of Al target is inclined to one sidePutting voltage is 100V, and Ar throughput is 30sccm, O2Flow is 10sccm, and the pressure of reative cell is 0.5Pa, depositThe Al that 300nm is thick2O3Film;
(5) device that completes deposit is carried out to photoetching development, form Al2O3The wet etching district of film, puts materialEnter HF: H2O=1: in the solution of 10 volume ratios, corrosion 3min~5min, by Al2O3Corrode to 5-10nm;
(6) then device is put into simultaneously sputter Ni and the Si of reative cell of magnetron sputtering, process conditions are: Ni targetDC offset voltage be 100V, the radio-frequency bias voltage of Si target is 450V, the flow of carrier gas Ar is 30sccm,The hybrid metal film that codeposition 100nm~150nm is thick;
(7) device of the good film of deposit is carried out to photoetching, form the etching window district of mixed film, and it is dry to put into ICPIn method etching reaction chamber, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, reaction constant pressurePower is 1.5Pa, CF4Flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 5min, through overdryingThe silicide staying on device after method etching is bulk, and makes the spacing between silicide agglomeration be less than silicide agglomerationWidth;
(8) device is put into quick anneal oven, under nitrogen environment, carry out 450 DEG C, the rapid thermal annealing of 30s,Form NiSi alloy, silicide can be introduced compression to insulating barrier and AlGaN layer, between silicideAlGaN layer can be subject to tensile stress, and interblock makes AlGaN layer totally obtain tensile stress apart from being less than piece width, thereby makesIn raceway groove, 2DEG is enhanced;
(9) device that completes alloy is carried out to photoetching, form gate electrode and grid field plate region, then put into electronicsDeposit Ni/Au=20/200nm peeling off in beam evaporation platform, completes the preparation of gate electrode and grid field plate;
(10) put into PECVD equipment deposit SiN film by completing device prepared by gate electrode, concrete workSkill condition is: SiH4Flow be 40sccm, NH3Flow be 10sccm, chamber pressure is 1~2Pa,Radio-frequency power is 40W, the SiN passivating film that deposit 200nm~300nm is thick;
(11) device is cleaned again, photoetching development, form the etched area of SiN film, and it is dry to put into ICPIn method etching reaction chamber, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, reaction constant pressurePower is 1.5Pa, CF4Flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min, by source electricityThe SiN that the utmost point, drain electrode and gate electrode cover above and Al2O3Film etches away;
(12) device is cleaned, photoetching development, and put into electron beam evaporation platform deposit Ti/Au=20/200nmAdd thick electrode, complete the preparation of integral device.
CN201410025002.6A 2014-01-20 2014-01-20 Add grid field plate depletion type insulated gate AlGaN/GaN device architecture and preparation method thereof Expired - Fee Related CN103904110B (en)

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