ZA888032B - Multi-cache data storage system - Google Patents
Multi-cache data storage systemInfo
- Publication number
- ZA888032B ZA888032B ZA888032A ZA888032A ZA888032B ZA 888032 B ZA888032 B ZA 888032B ZA 888032 A ZA888032 A ZA 888032A ZA 888032 A ZA888032 A ZA 888032A ZA 888032 B ZA888032 B ZA 888032B
- Authority
- ZA
- South Africa
- Prior art keywords
- data storage
- storage system
- cache data
- cache
- storage
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
- G06F12/1063—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache the data cache being concurrently virtually addressed
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB878728494A GB8728494D0 (en) | 1987-12-05 | 1987-12-05 | Multi-cache data storage system |
Publications (1)
Publication Number | Publication Date |
---|---|
ZA888032B true ZA888032B (en) | 1989-06-28 |
Family
ID=10628059
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ZA888032A ZA888032B (en) | 1987-12-05 | 1988-10-26 | Multi-cache data storage system |
Country Status (6)
Country | Link |
---|---|
US (1) | US5008813A (de) |
EP (1) | EP0320099B1 (de) |
AU (1) | AU609228B2 (de) |
DE (1) | DE3886182T2 (de) |
GB (1) | GB8728494D0 (de) |
ZA (1) | ZA888032B (de) |
Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE68917326T2 (de) | 1988-01-20 | 1995-03-02 | Advanced Micro Devices Inc | Organisation eines integrierten Cachespeichers zur flexiblen Anwendung zur Unterstützung von Multiprozessor-Operationen. |
GB8823077D0 (en) * | 1988-09-30 | 1988-11-09 | Int Computers Ltd | Data processing apparatus |
US5535359A (en) * | 1988-12-02 | 1996-07-09 | Mitsubishi Denki Kabushiki Kaisha | Computer system with cache memory having address mask register |
JPH0680499B2 (ja) * | 1989-01-13 | 1994-10-12 | インターナショナル・ビジネス・マシーンズ・コーポレーション | マルチプロセッサ・システムのキャッシュ制御システムおよび方法 |
US5214777A (en) * | 1989-03-27 | 1993-05-25 | Ncr Corporation | High speed read/modify/write memory system and method |
US5072369A (en) * | 1989-04-07 | 1991-12-10 | Tektronix, Inc. | Interface between buses attached with cached modules providing address space mapped cache coherent memory access with SNOOP hit memory updates |
FR2645986B1 (fr) * | 1989-04-13 | 1994-06-17 | Bull Sa | Procede pour accelerer les acces memoire d'un systeme informatique et systeme pour la mise en oeuvre du procede |
FR2645987B1 (fr) * | 1989-04-13 | 1991-06-07 | Bull Sa | Dispositif d'acceleration des acces memoire dans un systeme informatique |
US5197146A (en) * | 1989-06-21 | 1993-03-23 | Hewlett-Packard Company | Method for maintaining cache coherence in a multiprocessor computer system |
US5155828A (en) * | 1989-07-05 | 1992-10-13 | Hewlett-Packard Company | Computing system with a cache memory and an additional look-aside cache memory |
JPH0340046A (ja) * | 1989-07-06 | 1991-02-20 | Hitachi Ltd | キャッシュメモリ制御方式および情報処理装置 |
JP2511146B2 (ja) * | 1989-07-07 | 1996-06-26 | 富士通株式会社 | デ―タ処理装置 |
JPH0348951A (ja) * | 1989-07-18 | 1991-03-01 | Fujitsu Ltd | アドレスモニタ装置 |
JPH0697449B2 (ja) * | 1989-09-20 | 1994-11-30 | 株式会社日立製作所 | 多重化共有メモリ制御方法、多重化共有メモリシステムおよび共有メモリ拡張方法 |
JP2833062B2 (ja) * | 1989-10-30 | 1998-12-09 | 株式会社日立製作所 | キャッシュメモリ制御方法とこのキャッシュメモリ制御方法を用いたプロセッサおよび情報処理装置 |
US5297270A (en) * | 1989-11-13 | 1994-03-22 | Zenith Data Systems Corporation | Programmable cache memory which associates each section of main memory to be cached with a status bit which enables/disables the caching accessibility of the particular section, and with the capability of functioning with memory areas of varying size |
JPH061463B2 (ja) * | 1990-01-16 | 1994-01-05 | インターナショナル・ビジネス・マシーンズ・コーポレーション | マルチプロセッサ・システムおよびそのプライベート・キャッシュ制御方法 |
US5263142A (en) * | 1990-04-12 | 1993-11-16 | Sun Microsystems, Inc. | Input/output cache with mapped pages allocated for caching direct (virtual) memory access input/output data based on type of I/O devices |
US5249284A (en) * | 1990-06-04 | 1993-09-28 | Ncr Corporation | Method and system for maintaining data coherency between main and cache memories |
US5276852A (en) * | 1990-10-01 | 1994-01-04 | Digital Equipment Corporation | Method and apparatus for controlling a processor bus used by multiple processor components during writeback cache transactions |
US5301340A (en) * | 1990-10-31 | 1994-04-05 | International Business Machines Corporation | IC chips including ALUs and identical register files whereby a number of ALUs directly and concurrently write results to every register file per cycle |
US5249283A (en) * | 1990-12-24 | 1993-09-28 | Ncr Corporation | Cache coherency method and apparatus for a multiple path interconnection network |
GB2260429B (en) * | 1991-10-11 | 1995-05-24 | Intel Corp | Versatile cache memory |
US5469555A (en) * | 1991-12-19 | 1995-11-21 | Opti, Inc. | Adaptive write-back method and apparatus wherein the cache system operates in a combination of write-back and write-through modes for a cache-based microprocessor system |
US5414827A (en) * | 1991-12-19 | 1995-05-09 | Opti, Inc. | Automatic cache flush |
US5555382A (en) * | 1992-04-24 | 1996-09-10 | Digital Equipment Corporation | Intelligent snoopy bus arbiter |
US5778424A (en) * | 1993-04-30 | 1998-07-07 | Avsys Corporation | Distributed placement, variable-size cache architecture |
US5671391A (en) * | 1994-01-10 | 1997-09-23 | Ncr Corporation | Coherent copyback protocol for multi-level cache memory systems |
US6928521B1 (en) | 2000-08-01 | 2005-08-09 | International Business Machines Corporation | Method, system, and data structures for using metadata in updating data in a storage device |
US7681141B2 (en) * | 2004-05-11 | 2010-03-16 | Sony Computer Entertainment America Inc. | Fast scrolling in a graphical user interface |
JP4189402B2 (ja) * | 2005-02-21 | 2008-12-03 | パナソニック株式会社 | キャッシュ回路 |
US7409524B2 (en) * | 2005-08-17 | 2008-08-05 | Hewlett-Packard Development Company, L.P. | System and method for responding to TLB misses |
US8627014B2 (en) * | 2008-12-30 | 2014-01-07 | Intel Corporation | Memory model for hardware attributes within a transactional memory system |
US9785462B2 (en) | 2008-12-30 | 2017-10-10 | Intel Corporation | Registering a user-handler in hardware for transactional memory event handling |
US8806101B2 (en) * | 2008-12-30 | 2014-08-12 | Intel Corporation | Metaphysical address space for holding lossy metadata in hardware |
US8627017B2 (en) * | 2008-12-30 | 2014-01-07 | Intel Corporation | Read and write monitoring attributes in transactional memory (TM) systems |
US10592424B2 (en) * | 2017-07-14 | 2020-03-17 | Arm Limited | Range-based memory system |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3699533A (en) * | 1970-10-29 | 1972-10-17 | Rca Corp | Memory system including buffer memories |
US3693165A (en) * | 1971-06-29 | 1972-09-19 | Ibm | Parallel addressing of a storage hierarchy in a data processing system using virtual addressing |
US3848234A (en) * | 1973-04-04 | 1974-11-12 | Sperry Rand Corp | Multi-processor system with multiple cache memories |
US4453230A (en) * | 1977-12-29 | 1984-06-05 | Tokyo Shibaura Electric Co., Ltd. | Address conversion system |
US4445191A (en) * | 1979-08-13 | 1984-04-24 | Burroughs Corporation | Data word handling enhancement in a page oriented named-data hierarchical memory system |
FR2474201B1 (fr) * | 1980-01-22 | 1986-05-16 | Bull Sa | Procede et dispositif pour gerer les conflits poses par des acces multiples a un meme cache d'un systeme de traitement numerique de l'information comprenant au moins deux processus possedant chacun un cache |
US4481573A (en) * | 1980-11-17 | 1984-11-06 | Hitachi, Ltd. | Shared virtual address translation unit for a multiprocessor system |
US4602368A (en) * | 1983-04-15 | 1986-07-22 | Honeywell Information Systems Inc. | Dual validity bit arrays |
US4858111A (en) * | 1983-07-29 | 1989-08-15 | Hewlett-Packard Company | Write-back cache system using concurrent address transfers to setup requested address in main memory before dirty miss signal from cache |
US4785398A (en) * | 1985-12-19 | 1988-11-15 | Honeywell Bull Inc. | Virtual cache system using page level number generating CAM to access other memories for processing requests relating to a page |
US4785395A (en) * | 1986-06-27 | 1988-11-15 | Honeywell Bull Inc. | Multiprocessor coherent cache system including two level shared cache with separately allocated processor storage locations and inter-level duplicate entry replacement |
US4843542A (en) * | 1986-11-12 | 1989-06-27 | Xerox Corporation | Virtual memory cache for use in multi-processing systems |
US4977498A (en) * | 1988-04-01 | 1990-12-11 | Digital Equipment Corporation | Data processing system having a data memory interlock coherency scheme |
DE68928454T2 (de) * | 1988-07-04 | 1998-04-23 | Sun Microsystems Inc | Multiprozessorsystem mit hierarchischer cachespeicheranordnung |
GB8823077D0 (en) * | 1988-09-30 | 1988-11-09 | Int Computers Ltd | Data processing apparatus |
-
1987
- 1987-12-05 GB GB878728494A patent/GB8728494D0/en active Pending
-
1988
- 1988-10-17 DE DE88309704T patent/DE3886182T2/de not_active Expired - Fee Related
- 1988-10-17 EP EP88309704A patent/EP0320099B1/de not_active Expired - Lifetime
- 1988-10-21 US US07/261,033 patent/US5008813A/en not_active Expired - Fee Related
- 1988-10-26 ZA ZA888032A patent/ZA888032B/xx unknown
- 1988-12-02 AU AU26541/88A patent/AU609228B2/en not_active Ceased
Also Published As
Publication number | Publication date |
---|---|
EP0320099A3 (en) | 1990-08-22 |
US5008813A (en) | 1991-04-16 |
DE3886182D1 (de) | 1994-01-20 |
GB8728494D0 (en) | 1988-01-13 |
AU609228B2 (en) | 1991-04-26 |
EP0320099A2 (de) | 1989-06-14 |
DE3886182T2 (de) | 1994-05-05 |
EP0320099B1 (de) | 1993-12-08 |
AU2654188A (en) | 1989-06-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB8728494D0 (en) | Multi-cache data storage system | |
AU7942187A (en) | Data storage system | |
EP0153553A3 (en) | Data storage system | |
EP0281225A3 (en) | Secure information storage | |
GB2184577B (en) | Data storage system | |
ZA893785B (en) | Data memory system | |
EP0316084A3 (en) | Data storage apparatus | |
GB8800353D0 (en) | Data storage method | |
KR910007036B1 (en) | Data storage system | |
GB8716706D0 (en) | Data storage | |
EP0292249A3 (en) | Data storage systems | |
GB8912423D0 (en) | Information storage system | |
EP0279189A3 (en) | Storage system | |
EP0282248A3 (en) | Block access system using cache memory | |
GB2209364B (en) | Oil storage system | |
GB8415182D0 (en) | Data storage system | |
GB2211374B (en) | Information storage system | |
GB2215887B (en) | Data memory system | |
GB2214876B (en) | Storage system | |
ZA883413B (en) | Data storage system | |
GB8712687D0 (en) | Optical data storage | |
GB8727037D0 (en) | Storage board system | |
GB8710603D0 (en) | Electronic data storage & retrieval system | |
GB8711742D0 (en) | Vehicle data storage system | |
GB8429767D0 (en) | Data storage |