ZA838260B - A clock pulse train supply arrangement for a multiple-microcomputer system in railway safety installations - Google Patents
A clock pulse train supply arrangement for a multiple-microcomputer system in railway safety installationsInfo
- Publication number
- ZA838260B ZA838260B ZA838260A ZA838260A ZA838260B ZA 838260 B ZA838260 B ZA 838260B ZA 838260 A ZA838260 A ZA 838260A ZA 838260 A ZA838260 A ZA 838260A ZA 838260 B ZA838260 B ZA 838260B
- Authority
- ZA
- South Africa
- Prior art keywords
- clock
- clock pulse
- pulse train
- supply arrangement
- microcomputer system
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
- G06F11/1679—Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Direct Current Feeding And Distribution (AREA)
- Fittings On The Vehicle Exterior For Carrying Loads, And Devices For Holding Or Mounting Articles (AREA)
- Electric Clocks (AREA)
- Power Sources (AREA)
- Electronic Switches (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Safety Devices In Control Systems (AREA)
- Train Traffic Observation, Control, And Security (AREA)
- Hardware Redundancy (AREA)
Abstract
1. Clock current supply for a multimicro computer system in railways safety equipments, in which the micro computers process the same data for safety reasons, a separate clock supply chip with its own time standard being provided for generating a system clock for each micro computer and all clock supply chips being connected to a common crystal clock generator, characterised in that the clock supply chips are constructed as phase controllers (PR1, TP1, O1 and PR2, TP2, O2, respectively), at least a part of the assemblies of each micro computer (MC1, MC2) being included in the associated phase controller (PR1, TP1, O1 and PR2, TP2, O2, respectively), in such a manner that an assembly output (A1 and A2, respectively) of the micro computer (MC1 and MC2, respectively) is connected to the input of a phase detector (PR1 and PR2, respectively) of the phase controller, which is also connected to the crystal clock generator (QR).
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19823241189 DE3241189A1 (en) | 1982-11-08 | 1982-11-08 | CLOCK POWER SUPPLY FOR A MULTIMICROCOMPUTER SYSTEM IN RAILWAY LOCKING SYSTEMS |
Publications (1)
Publication Number | Publication Date |
---|---|
ZA838260B true ZA838260B (en) | 1984-06-27 |
Family
ID=6177573
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ZA838260A ZA838260B (en) | 1982-11-08 | 1983-11-07 | A clock pulse train supply arrangement for a multiple-microcomputer system in railway safety installations |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0108284B1 (en) |
AT (1) | ATE45432T1 (en) |
DE (2) | DE3241189A1 (en) |
DK (1) | DK164009C (en) |
ZA (1) | ZA838260B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA1283738C (en) * | 1985-11-13 | 1991-04-30 | Atsushi Hasebe | Data processor |
US5239628A (en) * | 1985-11-13 | 1993-08-24 | Sony Corporation | System for asynchronously generating data block processing start signal upon the occurrence of processing end signal block start signal |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL7707260A (en) * | 1977-06-30 | 1979-01-03 | Bell Telephone Mfg | MOTHER CLOCK DEVICE. |
US4239982A (en) * | 1978-06-14 | 1980-12-16 | The Charles Stark Draper Laboratory, Inc. | Fault-tolerant clock system |
JPS5789170A (en) * | 1980-11-25 | 1982-06-03 | Hitachi Ltd | Duplex computer controlling system |
-
1982
- 1982-11-08 DE DE19823241189 patent/DE3241189A1/en not_active Withdrawn
-
1983
- 1983-10-13 EP EP83110222A patent/EP0108284B1/en not_active Expired
- 1983-10-13 AT AT83110222T patent/ATE45432T1/en not_active IP Right Cessation
- 1983-10-13 DE DE8383110222T patent/DE3380371D1/en not_active Expired
- 1983-11-07 DK DK509883A patent/DK164009C/en not_active IP Right Cessation
- 1983-11-07 ZA ZA838260A patent/ZA838260B/en unknown
Also Published As
Publication number | Publication date |
---|---|
DK509883A (en) | 1984-05-09 |
DE3241189A1 (en) | 1984-05-10 |
EP0108284A3 (en) | 1987-04-08 |
DK509883D0 (en) | 1983-11-07 |
EP0108284A2 (en) | 1984-05-16 |
ATE45432T1 (en) | 1989-08-15 |
DE3380371D1 (en) | 1989-09-14 |
DK164009B (en) | 1992-04-27 |
DK164009C (en) | 1992-09-21 |
EP0108284B1 (en) | 1989-08-09 |
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